diff --git a/embassy-stm32/Cargo.toml b/embassy-stm32/Cargo.toml
index 1eff10707..a380fb21f 100644
--- a/embassy-stm32/Cargo.toml
+++ b/embassy-stm32/Cargo.toml
@@ -58,7 +58,7 @@ rand_core = "0.6.3"
sdio-host = "0.5.0"
embedded-sdmmc = { git = "https://github.com/embassy-rs/embedded-sdmmc-rs", rev = "a4f293d3a6f72158385f79c98634cb8a14d0d2fc", optional = true }
critical-section = "1.1"
-stm32-metapac = { git = "https://github.com/embassy-rs/stm32-data-generated", tag = "stm32-data-5ecc410f93477d3d9314723ec26e637aa0c63b8f" }
+stm32-metapac = { git = "https://github.com/embassy-rs/stm32-data-generated", tag = "stm32-data-9330e31117668350a62572fdcd2598ec17d08042" }
vcell = "0.1.3"
bxcan = "0.7.0"
nb = "1.0.0"
@@ -76,7 +76,7 @@ critical-section = { version = "1.1", features = ["std"] }
[build-dependencies]
proc-macro2 = "1.0.36"
quote = "1.0.15"
-stm32-metapac = { git = "https://github.com/embassy-rs/stm32-data-generated", tag = "stm32-data-5ecc410f93477d3d9314723ec26e637aa0c63b8f", default-features = false, features = ["metadata"]}
+stm32-metapac = { git = "https://github.com/embassy-rs/stm32-data-generated", tag = "stm32-data-9330e31117668350a62572fdcd2598ec17d08042", default-features = false, features = ["metadata"]}
[features]
diff --git a/embassy-stm32/src/rcc/g4.rs b/embassy-stm32/src/rcc/g4.rs
index 32d14d2fe..ba2a5e19c 100644
--- a/embassy-stm32/src/rcc/g4.rs
+++ b/embassy-stm32/src/rcc/g4.rs
@@ -118,7 +118,7 @@ impl Default for Config {
apb2_pre: APBPrescaler::DIV1,
low_power_run: false,
pll: None,
- clock_48mhz_src: None,
+ clock_48mhz_src: Some(Clock48MhzSrc::Hsi48(None)),
adc12_clock_source: Adcsel::DISABLE,
adc345_clock_source: Adcsel::DISABLE,
ls: Default::default(),
diff --git a/embassy-stm32/src/rcc/l4l5.rs b/embassy-stm32/src/rcc/l4l5.rs
index 1a8974ff6..90c8923c1 100644
--- a/embassy-stm32/src/rcc/l4l5.rs
+++ b/embassy-stm32/src/rcc/l4l5.rs
@@ -192,6 +192,10 @@ pub(crate) unsafe fn init(config: Config) {
ClockSrc::PLL => pll._r.unwrap(),
};
+ #[cfg(stm32l4)]
+ RCC.ccipr().modify(|w| w.set_clk48sel(config.clk48_src));
+ #[cfg(stm32l5)]
+ RCC.ccipr1().modify(|w| w.set_clk48sel(config.clk48_src));
let _clk48 = match config.clk48_src {
Clk48Src::HSI48 => hsi48,
Clk48Src::MSI => msi,
diff --git a/embassy-stm32/src/rcc/u5.rs b/embassy-stm32/src/rcc/u5.rs
index fb9c163ee..aba5ca831 100644
--- a/embassy-stm32/src/rcc/u5.rs
+++ b/embassy-stm32/src/rcc/u5.rs
@@ -188,7 +188,7 @@ impl Default for Config {
apb1_pre: APBPrescaler::DIV1,
apb2_pre: APBPrescaler::DIV1,
apb3_pre: APBPrescaler::DIV1,
- hsi48: false,
+ hsi48: true,
voltage_range: VoltageScale::RANGE3,
ls: Default::default(),
}
diff --git a/embassy-stm32/src/rcc/wb.rs b/embassy-stm32/src/rcc/wb.rs
index a6cf118a8..64173fea8 100644
--- a/embassy-stm32/src/rcc/wb.rs
+++ b/embassy-stm32/src/rcc/wb.rs
@@ -40,6 +40,7 @@ pub struct Config {
pub hse: Option<Hse>,
pub sys: Sysclk,
pub mux: Option<PllMux>,
+ pub hsi48: bool,
pub pll: Option<Pll>,
pub pllsai: Option<Pll>,
@@ -63,6 +64,7 @@ pub const WPAN_DEFAULT: Config = Config {
source: PllSource::HSE,
prediv: Pllm::DIV2,
}),
+ hsi48: true,
ls: super::LsConfig::default_lse(),
@@ -90,6 +92,7 @@ impl Default for Config {
mux: None,
pll: None,
pllsai: None,
+ hsi48: true,
ls: Default::default(),
@@ -222,6 +225,13 @@ pub(crate) unsafe fn init(config: Config) {
_ => {}
}
+ let _hsi48 = config.hsi48.then(|| {
+ rcc.crrcr().modify(|w| w.set_hsi48on(true));
+ while !rcc.crrcr().read().hsi48rdy() {}
+
+ Hertz(48_000_000)
+ });
+
rcc.cfgr().modify(|w| {
w.set_sw(config.sys.into());
w.set_hpre(config.ahb1_pre);
diff --git a/embassy-stm32/src/rng.rs b/embassy-stm32/src/rng.rs
index fc003ebe6..5e6922e9b 100644
--- a/embassy-stm32/src/rng.rs
+++ b/embassy-stm32/src/rng.rs
@@ -85,7 +85,7 @@ impl<'d, T: Instance> Rng<'d, T> {
reg.set_ie(false);
reg.set_rngen(true);
});
- T::regs().cr().write(|reg| {
+ T::regs().cr().modify(|reg| {
reg.set_ced(false);
});
// wait for CONDRST to be set
diff --git a/tests/stm32/Cargo.toml b/tests/stm32/Cargo.toml
index fd18cd77c..9adff596d 100644
--- a/tests/stm32/Cargo.toml
+++ b/tests/stm32/Cargo.toml
@@ -6,26 +6,27 @@ license = "MIT OR Apache-2.0"
autobins = false
[features]
-stm32f103c8 = ["embassy-stm32/stm32f103c8", "not-gpdma"] # Blue Pill
-stm32f429zi = ["embassy-stm32/stm32f429zi", "chrono", "eth", "stop", "can", "not-gpdma", "dac-adc-pin"] # Nucleo "sdmmc"
-stm32g071rb = ["embassy-stm32/stm32g071rb", "not-gpdma", "dac-adc-pin"] # Nucleo
-stm32c031c6 = ["embassy-stm32/stm32c031c6", "not-gpdma"] # Nucleo
-stm32g491re = ["embassy-stm32/stm32g491re", "chrono", "not-gpdma"] # Nucleo
-stm32h755zi = ["embassy-stm32/stm32h755zi-cm7", "chrono", "not-gpdma", "eth", "dac-adc-pin"] # Nucleo
-stm32wb55rg = ["embassy-stm32/stm32wb55rg", "chrono", "not-gpdma", "ble", "mac" ] # Nucleo
-stm32h563zi = ["embassy-stm32/stm32h563zi", "chrono", "eth"] # Nucleo
-stm32u585ai = ["embassy-stm32/stm32u585ai", "chrono"] # IoT board
-stm32l073rz = ["embassy-stm32/stm32l073rz", "not-gpdma"] # Nucleo
-stm32l152re = ["embassy-stm32/stm32l152re", "chrono", "not-gpdma"] # Nucleo
-stm32l4a6zg = ["embassy-stm32/stm32l4a6zg", "chrono", "not-gpdma"] # Nucleo
-stm32l4r5zi = ["embassy-stm32/stm32l4r5zi", "chrono", "not-gpdma"] # Nucleo
-stm32l552ze = ["embassy-stm32/stm32l552ze", "not-gpdma"] # Nucleo
-stm32f767zi = ["embassy-stm32/stm32f767zi", "chrono", "not-gpdma", "eth"] # Nucleo
-stm32f207zg = ["embassy-stm32/stm32f207zg", "chrono", "not-gpdma", "eth"] # Nucleo
-stm32f303ze = ["embassy-stm32/stm32f303ze", "chrono", "not-gpdma"] # Nucleo
-stm32l496zg = ["embassy-stm32/stm32l496zg", "not-gpdma"] # Nucleo
+stm32f103c8 = ["embassy-stm32/stm32f103c8", "not-gpdma"]
+stm32f429zi = ["embassy-stm32/stm32f429zi", "chrono", "eth", "stop", "can", "not-gpdma", "dac-adc-pin", "rng"]
+stm32g071rb = ["embassy-stm32/stm32g071rb", "not-gpdma", "dac-adc-pin"]
+stm32c031c6 = ["embassy-stm32/stm32c031c6", "not-gpdma"]
+stm32g491re = ["embassy-stm32/stm32g491re", "chrono", "not-gpdma", "rng"]
+stm32h755zi = ["embassy-stm32/stm32h755zi-cm7", "chrono", "not-gpdma", "eth", "dac-adc-pin", "rng"]
+stm32wb55rg = ["embassy-stm32/stm32wb55rg", "chrono", "not-gpdma", "ble", "mac" , "rng"]
+stm32h563zi = ["embassy-stm32/stm32h563zi", "chrono", "eth", "rng"]
+stm32u585ai = ["embassy-stm32/stm32u585ai", "chrono", "rng"]
+stm32l073rz = ["embassy-stm32/stm32l073rz", "not-gpdma", "rng"]
+stm32l152re = ["embassy-stm32/stm32l152re", "chrono", "not-gpdma"]
+stm32l4a6zg = ["embassy-stm32/stm32l4a6zg", "chrono", "not-gpdma", "rng"]
+stm32l4r5zi = ["embassy-stm32/stm32l4r5zi", "chrono", "not-gpdma", "rng"]
+stm32l552ze = ["embassy-stm32/stm32l552ze", "not-gpdma", "rng"]
+stm32f767zi = ["embassy-stm32/stm32f767zi", "chrono", "not-gpdma", "eth", "rng"]
+stm32f207zg = ["embassy-stm32/stm32f207zg", "chrono", "not-gpdma", "eth", "rng"]
+stm32f303ze = ["embassy-stm32/stm32f303ze", "chrono", "not-gpdma"]
+stm32l496zg = ["embassy-stm32/stm32l496zg", "not-gpdma", "rng"]
eth = []
+rng = []
sdmmc = []
stop = ["embassy-stm32/low-power"]
chrono = ["embassy-stm32/chrono", "dep:chrono"]
@@ -86,6 +87,11 @@ name = "gpio"
path = "src/bin/gpio.rs"
required-features = []
+[[bin]]
+name = "rng"
+path = "src/bin/rng.rs"
+required-features = [ "rng",]
+
[[bin]]
name = "rtc"
path = "src/bin/rtc.rs"
diff --git a/tests/stm32/src/bin/rng.rs b/tests/stm32/src/bin/rng.rs
new file mode 100644
index 000000000..65da737d0
--- /dev/null
+++ b/tests/stm32/src/bin/rng.rs
@@ -0,0 +1,50 @@
+// required-features: rng
+#![no_std]
+#![no_main]
+#![feature(type_alias_impl_trait)]
+
+#[path = "../common.rs"]
+mod common;
+use common::*;
+use embassy_executor::Spawner;
+use embassy_stm32::rng::Rng;
+use embassy_stm32::{bind_interrupts, peripherals, rng};
+use {defmt_rtt as _, panic_probe as _};
+
+#[cfg(any(feature = "stm32l4a6zg", feature = "stm32h755zi", feature = "stm32f429zi"))]
+bind_interrupts!(struct Irqs {
+ HASH_RNG => rng::InterruptHandler<peripherals::RNG>;
+});
+#[cfg(any(feature = "stm32l073rz"))]
+bind_interrupts!(struct Irqs {
+ RNG_LPUART1 => rng::InterruptHandler<peripherals::RNG>;
+});
+#[cfg(not(any(
+ feature = "stm32l4a6zg",
+ feature = "stm32l073rz",
+ feature = "stm32h755zi",
+ feature = "stm32f429zi"
+)))]
+bind_interrupts!(struct Irqs {
+ RNG => rng::InterruptHandler<peripherals::RNG>;
+});
+
+#[embassy_executor::main]
+async fn main(_spawner: Spawner) {
+ let p: embassy_stm32::Peripherals = embassy_stm32::init(config());
+
+ let mut rng = Rng::new(p.RNG, Irqs);
+
+ let mut buf1 = [0u8; 16];
+ unwrap!(rng.async_fill_bytes(&mut buf1).await);
+ info!("random bytes: {:02x}", buf1);
+
+ let mut buf2 = [0u8; 16];
+ unwrap!(rng.async_fill_bytes(&mut buf2).await);
+ info!("random bytes: {:02x}", buf2);
+
+ defmt::assert!(buf1 != buf2);
+
+ info!("Test OK");
+ cortex_m::asm::bkpt();
+}