From 3539dd7d4cad23b1bdf7edbf7811fa2cd1755e72 Mon Sep 17 00:00:00 2001 From: gak Date: Sat, 3 Jun 2023 06:59:31 +1000 Subject: [PATCH] Fix #1528 HS USB on STM32F7 --- embassy-stm32/src/usb_otg/usb.rs | 24 ++++++++++++++++++++++++ 1 file changed, 24 insertions(+) diff --git a/embassy-stm32/src/usb_otg/usb.rs b/embassy-stm32/src/usb_otg/usb.rs index c7f19f6e9..e602bcb70 100644 --- a/embassy-stm32/src/usb_otg/usb.rs +++ b/embassy-stm32/src/usb_otg/usb.rs @@ -828,6 +828,30 @@ impl<'d, T: Instance> embassy_usb_driver::Bus for Bus<'d, T> { critical_section::with(|_| crate::pac::PWR.cr2().modify(|w| w.set_usv(true))); } + #[cfg(stm32f7)] + { + // Enable ULPI clock if external PHY is used + let ulpien = !self.phy_type.internal(); + critical_section::with(|_| { + crate::pac::RCC.ahb1enr().modify(|w| { + if T::HIGH_SPEED { + w.set_usb_otg_hsulpien(ulpien); + } else { + w.set_usb_otg_hsen(ulpien); + } + }); + + // Low power mode + crate::pac::RCC.ahb1lpenr().modify(|w| { + if T::HIGH_SPEED { + w.set_usb_otg_hsulpilpen(ulpien); + } else { + w.set_usb_otg_hslpen(ulpien); + } + }); + }); + } + #[cfg(stm32h7)] { // If true, VDD33USB is generated by internal regulator from VDD50USB