Update probe-rs-cli -> probe-rs
This commit is contained in:
parent
4f0aca481f
commit
f7ec579c18
45 changed files with 88 additions and 88 deletions
6
.vscode/settings.json
vendored
6
.vscode/settings.json
vendored
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@ -6,16 +6,16 @@
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"rust-analyzer.check.allTargets": false,
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"rust-analyzer.check.noDefaultFeatures": true,
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"rust-analyzer.cargo.noDefaultFeatures": true,
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"rust-analyzer.cargo.target": "thumbv7em-none-eabi",
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"rust-analyzer.cargo.target": "thumbv7m-none-eabi",
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//"rust-analyzer.cargo.target": "thumbv8m.main-none-eabihf",
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"rust-analyzer.cargo.features": [
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"nightly",
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///"nightly",
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],
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"rust-analyzer.linkedProjects": [
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// Declare for the target you wish to develop
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// "embassy-executor/Cargo.toml",
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// "embassy-sync/Cargo.toml",
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"examples/nrf52840/Cargo.toml",
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"examples/stm32wl/Cargo.toml",
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// "examples/nrf5340/Cargo.toml",
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// "examples/nrf-rtos-trace/Cargo.toml",
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// "examples/rp/Cargo.toml",
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@ -1,6 +1,6 @@
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# cyw43
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WIP driver for the CYW43439 wifi chip, used in the Raspberry Pi Pico W. Implementation based on [Infineon/wifi-host-driver](https://github.com/Infineon/wifi-host-driver).
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Rust driver for the CYW43439 wifi chip, used in the Raspberry Pi Pico W. Implementation based on [Infineon/wifi-host-driver](https://github.com/Infineon/wifi-host-driver).
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## Current status
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@ -19,18 +19,18 @@ Working:
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TODO:
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- Setting a custom MAC address.
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- Bus sleep (unclear what the benefit is. Is it needed for IRQs? or is it just power consumption optimization?)
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- Bus sleep (for power consumption optimization)
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## Running the examples
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- `cargo install probe-rs-cli`
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- `cd examples/rpi-pico-w`
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- `cargo install probe-rs --features cli`
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- `cd examples/rp`
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### Example 1: Scan the wifi stations
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- `cargo run --release --bin wifi_scan`
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### Example 2: Create an access point (IP and credentials in the code)
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- `cargo run --release --bin tcp_server_ap`
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- `cargo run --release --bin wifi_ap_tcp_server`
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### Example 3: Connect to an existing network and create a server
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- `WIFI_NETWORK=MyWifiNetwork WIFI_PASSWORD=MyWifiPassword cargo run --release`
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- `WIFI_NETWORK=MyWifiNetwork WIFI_PASSWORD=MyWifiPassword cargo run --release --bin wifi_tcp_server`
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After a few seconds, you should see that DHCP picks up an IP address like this
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```
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@ -410,13 +410,13 @@ pub fn init(config: config::Config) -> Peripherals {
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warn!(
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"You have requested enabling chip reset functionality on the reset pin, by not enabling the Cargo feature `reset-pin-as-gpio`.\n\
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However, UICR is already programmed to some other setting, and can't be changed without erasing it.\n\
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To fix this, erase UICR manually, for example using `probe-rs-cli erase` or `nrfjprog --eraseuicr`."
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To fix this, erase UICR manually, for example using `probe-rs erase` or `nrfjprog --eraseuicr`."
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);
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#[cfg(feature = "reset-pin-as-gpio")]
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warn!(
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"You have requested using the reset pin as GPIO, by enabling the Cargo feature `reset-pin-as-gpio`.\n\
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However, UICR is already programmed to some other setting, and can't be changed without erasing it.\n\
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To fix this, erase UICR manually, for example using `probe-rs-cli erase` or `nrfjprog --eraseuicr`."
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To fix this, erase UICR manually, for example using `probe-rs erase` or `nrfjprog --eraseuicr`."
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);
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}
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}
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@ -432,7 +432,7 @@ pub fn init(config: config::Config) -> Peripherals {
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warn!(
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"You have requested to use P0.09 and P0.10 pins for NFC, by not enabling the Cargo feature `nfc-pins-as-gpio`.\n\
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However, UICR is already programmed to some other setting, and can't be changed without erasing it.\n\
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To fix this, erase UICR manually, for example using `probe-rs-cli erase` or `nrfjprog --eraseuicr`."
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To fix this, erase UICR manually, for example using `probe-rs erase` or `nrfjprog --eraseuicr`."
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);
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}
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}
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@ -1,6 +1,6 @@
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[target.'cfg(all(target_arch = "arm", target_os = "none"))']
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# replace nRF82840_xxAA with your chip as listed in `probe-rs-cli chip list`
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runner = "probe-rs-cli run --chip nRF52840_xxAA"
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# replace nRF82840_xxAA with your chip as listed in `probe-rs chip list`
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runner = "probe-rs run --chip nRF52840_xxAA"
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[build]
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target = "thumbv7em-none-eabi"
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@ -3,7 +3,7 @@ build-std = ["core"]
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build-std-features = ["panic_immediate_abort"]
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[target.'cfg(all(target_arch = "arm", target_os = "none"))']
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runner = "probe-rs-cli run --chip RP2040"
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runner = "probe-rs run --chip RP2040"
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[build]
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target = "thumbv6m-none-eabi"
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@ -1,6 +1,6 @@
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[target.'cfg(all(target_arch = "arm", target_os = "none"))']
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# replace STM32F429ZITx with your chip as listed in `probe-rs-cli chip list`
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runner = "probe-rs-cli run --chip STM32F303VCTx"
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# replace STM32F429ZITx with your chip as listed in `probe-rs chip list`
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runner = "probe-rs run --chip STM32F303VCTx"
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[build]
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target = "thumbv7em-none-eabihf"
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@ -1,6 +1,6 @@
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[target.'cfg(all(target_arch = "arm", target_os = "none"))']
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# replace STM32F429ZITx with your chip as listed in `probe-rs-cli chip list`
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runner = "probe-rs-cli run --chip STM32F767ZITx"
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# replace STM32F429ZITx with your chip as listed in `probe-rs chip list`
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runner = "probe-rs run --chip STM32F767ZITx"
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[build]
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target = "thumbv7em-none-eabihf"
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@ -1,6 +1,6 @@
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[target.'cfg(all(target_arch = "arm", target_os = "none"))']
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# replace STM32F429ZITx with your chip as listed in `probe-rs-cli chip list`
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runner = "probe-rs-cli run --chip STM32H743ZITx"
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# replace STM32F429ZITx with your chip as listed in `probe-rs chip list`
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runner = "probe-rs run --chip STM32H743ZITx"
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[build]
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target = "thumbv7em-none-eabihf"
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@ -1,5 +1,5 @@
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#!/bin/bash
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probe-rs-cli erase --chip STM32H743ZITx
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probe-rs erase --chip STM32H743ZITx
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mv ../../bootloader/stm32/memory.x ../../bootloader/stm32/memory-old.x
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cp memory-bl.x ../../bootloader/stm32/memory.x
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@ -1,6 +1,6 @@
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[target.'cfg(all(target_arch = "arm", target_os = "none"))']
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# replace your chip as listed in `probe-rs-cli chip list`
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runner = "probe-rs-cli run --chip STM32L072CZTx"
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# replace your chip as listed in `probe-rs chip list`
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runner = "probe-rs run --chip STM32L072CZTx"
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[build]
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target = "thumbv6m-none-eabi"
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@ -1,6 +1,6 @@
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[target.'cfg(all(target_arch = "arm", target_os = "none"))']
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# replace your chip as listed in `probe-rs-cli chip list`
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runner = "probe-rs-cli run --chip STM32L151CBxxA"
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# replace your chip as listed in `probe-rs chip list`
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runner = "probe-rs run --chip STM32L151CBxxA"
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[build]
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target = "thumbv7m-none-eabi"
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@ -1,6 +1,6 @@
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[target.'cfg(all(target_arch = "arm", target_os = "none"))']
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# replace your chip as listed in `probe-rs-cli chip list`
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runner = "probe-rs-cli run --chip STM32L475VG"
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# replace your chip as listed in `probe-rs chip list`
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runner = "probe-rs run --chip STM32L475VG"
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[build]
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target = "thumbv7em-none-eabihf"
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@ -1,6 +1,6 @@
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[target.'cfg(all(target_arch = "arm", target_os = "none"))']
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# replace your chip as listed in `probe-rs-cli chip list`
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runner = "probe-rs-cli run --chip STM32WLE5JCIx"
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# replace your chip as listed in `probe-rs chip list`
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runner = "probe-rs run --chip STM32WLE5JCIx"
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[build]
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target = "thumbv7em-none-eabihf"
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@ -4,7 +4,7 @@ build-std-features = ["panic_immediate_abort"]
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[target.'cfg(all(target_arch = "arm", target_os = "none"))']
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#runner = "./fruitrunner"
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runner = "probe-rs-cli run --chip nrf52840_xxAA"
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runner = "probe-rs run --chip nrf52840_xxAA"
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rustflags = [
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# Code-size optimizations.
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@ -1,5 +1,5 @@
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[target.'cfg(all(target_arch = "arm", target_os = "none"))']
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runner = "probe-rs-cli run --chip RP2040"
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runner = "probe-rs run --chip RP2040"
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[build]
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target = "thumbv6m-none-eabi"
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@ -1,6 +1,6 @@
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[target.'cfg(all(target_arch = "arm", target_os = "none"))']
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# replace nRF82840_xxAA with your chip as listed in `probe-rs-cli chip list`
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runner = "probe-rs-cli run --chip nRF52840_xxAA"
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# replace nRF82840_xxAA with your chip as listed in `probe-rs chip list`
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runner = "probe-rs run --chip nRF52840_xxAA"
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[build]
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target = "thumbv7em-none-eabi"
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@ -1,6 +1,6 @@
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[target.'cfg(all(target_arch = "arm", target_os = "none"))']
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# replace nRF82840_xxAA with your chip as listed in `probe-rs-cli chip list`
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runner = "probe-rs-cli run --chip nRF52840_xxAA"
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# replace nRF82840_xxAA with your chip as listed in `probe-rs chip list`
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runner = "probe-rs run --chip nRF52840_xxAA"
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[build]
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target = "thumbv7em-none-eabi"
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@ -1,6 +1,6 @@
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[target.'cfg(all(target_arch = "arm", target_os = "none"))']
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# replace nRF82840_xxAA with your chip as listed in `probe-rs-cli chip list`
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runner = "probe-rs-cli run --chip nRF52840_xxAA"
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# replace nRF82840_xxAA with your chip as listed in `probe-rs chip list`
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runner = "probe-rs run --chip nRF52840_xxAA"
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[build]
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target = "thumbv7em-none-eabi"
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@ -14,7 +14,7 @@ async fn main(_spawner: Spawner) {
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let p = embassy_nrf::init(Default::default());
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info!("Hello NVMC!");
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// probe-rs-cli run breaks without this, I'm not sure why.
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// probe-rs run breaks without this, I'm not sure why.
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Timer::after(Duration::from_secs(1)).await;
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let mut f = Nvmc::new(p.NVMC);
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@ -16,7 +16,7 @@ async fn main(_spawner: Spawner) {
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let mut config = Config::default();
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config.timeout_ticks = 32768 * 3; // 3 seconds
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// This is needed for `probe-rs-cli run` to be able to catch the panic message
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// This is needed for `probe-rs run` to be able to catch the panic message
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// in the WDT interrupt. The core resets 2 ticks after firing the interrupt.
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config.run_during_debug_halt = false;
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[target.'cfg(all(target_arch = "arm", target_os = "none"))']
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# replace nRF5340_xxAA with your chip as listed in `probe-rs-cli chip list`
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runner = "probe-rs-cli run --chip nRF5340_xxAA"
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# replace nRF5340_xxAA with your chip as listed in `probe-rs chip list`
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runner = "probe-rs run --chip nRF5340_xxAA"
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[build]
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target = "thumbv8m.main-none-eabihf"
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@ -1,5 +1,5 @@
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[target.'cfg(all(target_arch = "arm", target_os = "none"))']
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runner = "probe-rs-cli run --chip RP2040"
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runner = "probe-rs run --chip RP2040"
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[build]
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target = "thumbv6m-none-eabi" # Cortex-M0 and Cortex-M0+
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@ -42,8 +42,8 @@ async fn main(spawner: Spawner) {
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// To make flashing faster for development, you may want to flash the firmwares independently
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// at hardcoded addresses, instead of baking them into the program with `include_bytes!`:
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// probe-rs-cli download 43439A0.bin --format bin --chip RP2040 --base-address 0x10100000
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// probe-rs-cli download 43439A0_clm.bin --format bin --chip RP2040 --base-address 0x10140000
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// probe-rs download 43439A0.bin --format bin --chip RP2040 --base-address 0x10100000
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// probe-rs download 43439A0_clm.bin --format bin --chip RP2040 --base-address 0x10140000
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//let fw = unsafe { core::slice::from_raw_parts(0x10100000 as *const u8, 224190) };
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//let clm = unsafe { core::slice::from_raw_parts(0x10140000 as *const u8, 4752) };
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@ -27,8 +27,8 @@ async fn main(spawner: Spawner) {
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// To make flashing faster for development, you may want to flash the firmwares independently
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// at hardcoded addresses, instead of baking them into the program with `include_bytes!`:
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// probe-rs-cli download 43439A0.bin --format bin --chip RP2040 --base-address 0x10100000
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// probe-rs-cli download 43439A0_clm.bin --format bin --chip RP2040 --base-address 0x10140000
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// probe-rs download 43439A0.bin --format bin --chip RP2040 --base-address 0x10100000
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// probe-rs download 43439A0_clm.bin --format bin --chip RP2040 --base-address 0x10140000
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//let fw = unsafe { core::slice::from_raw_parts(0x10100000 as *const u8, 224190) };
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//let clm = unsafe { core::slice::from_raw_parts(0x10140000 as *const u8, 4752) };
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@ -39,8 +39,8 @@ async fn main(spawner: Spawner) {
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// To make flashing faster for development, you may want to flash the firmwares independently
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// at hardcoded addresses, instead of baking them into the program with `include_bytes!`:
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// probe-rs-cli download 43439A0.bin --format bin --chip RP2040 --base-address 0x10100000
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// probe-rs-cli download 43439A0_clm.bin --format bin --chip RP2040 --base-address 0x10140000
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// probe-rs download 43439A0.bin --format bin --chip RP2040 --base-address 0x10100000
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// probe-rs download 43439A0_clm.bin --format bin --chip RP2040 --base-address 0x10140000
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//let fw = unsafe { core::slice::from_raw_parts(0x10100000 as *const u8, 224190) };
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//let clm = unsafe { core::slice::from_raw_parts(0x10140000 as *const u8, 4752) };
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@ -42,8 +42,8 @@ async fn main(spawner: Spawner) {
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// To make flashing faster for development, you may want to flash the firmwares independently
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// at hardcoded addresses, instead of baking them into the program with `include_bytes!`:
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// probe-rs-cli download 43439A0.bin --format bin --chip RP2040 --base-address 0x10100000
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// probe-rs-cli download 43439A0_clm.bin --format bin --chip RP2040 --base-address 0x10140000
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// probe-rs download 43439A0.bin --format bin --chip RP2040 --base-address 0x10100000
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// probe-rs download 43439A0_clm.bin --format bin --chip RP2040 --base-address 0x10140000
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//let fw = unsafe { core::slice::from_raw_parts(0x10100000 as *const u8, 224190) };
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//let clm = unsafe { core::slice::from_raw_parts(0x10140000 as *const u8, 4752) };
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[target.'cfg(all(target_arch = "arm", target_os = "none"))']
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# replace STM32G071C8Rx with your chip as listed in `probe-rs-cli chip list`
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runner = "probe-rs-cli run --speed 100 --chip STM32c031c6tx"
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# replace STM32G071C8Rx with your chip as listed in `probe-rs chip list`
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runner = "probe-rs run --speed 100 --chip STM32c031c6tx"
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[build]
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target = "thumbv6m-none-eabi"
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@ -1,5 +1,5 @@
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[target.thumbv6m-none-eabi]
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runner = 'probe-rs-cli run --chip STM32F091RCTX'
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runner = 'probe-rs run --chip STM32F091RCTX'
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[build]
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target = "thumbv6m-none-eabi"
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@ -1,6 +1,6 @@
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[target.'cfg(all(target_arch = "arm", target_os = "none"))']
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# replace STM32F103C8 with your chip as listed in `probe-rs-cli chip list`
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runner = "probe-rs-cli run --chip STM32F103C8"
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# replace STM32F103C8 with your chip as listed in `probe-rs chip list`
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runner = "probe-rs run --chip STM32F103C8"
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[build]
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target = "thumbv7m-none-eabi"
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@ -1,6 +1,6 @@
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[target.'cfg(all(target_arch = "arm", target_os = "none"))']
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# replace STM32F207ZGTx with your chip as listed in `probe-rs-cli chip list`
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runner = "probe-rs-cli run --chip STM32F207ZGTx"
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# replace STM32F207ZGTx with your chip as listed in `probe-rs chip list`
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runner = "probe-rs run --chip STM32F207ZGTx"
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[build]
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target = "thumbv7m-none-eabi"
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@ -1,6 +1,6 @@
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[target.'cfg(all(target_arch = "arm", target_os = "none"))']
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# replace STM32F429ZITx with your chip as listed in `probe-rs-cli chip list`
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runner = "probe-rs-cli run --chip STM32F303ZETx"
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# replace STM32F429ZITx with your chip as listed in `probe-rs chip list`
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runner = "probe-rs run --chip STM32F303ZETx"
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[build]
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target = "thumbv7em-none-eabihf"
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@ -1,6 +1,6 @@
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[target.'cfg(all(target_arch = "arm", target_os = "none"))']
|
||||
# replace STM32F429ZITx with your chip as listed in `probe-rs-cli chip list`
|
||||
runner = "probe-rs-cli run --chip STM32F429ZITx"
|
||||
# replace STM32F429ZITx with your chip as listed in `probe-rs chip list`
|
||||
runner = "probe-rs run --chip STM32F429ZITx"
|
||||
|
||||
[build]
|
||||
target = "thumbv7em-none-eabi"
|
||||
|
|
|
@ -1,6 +1,6 @@
|
|||
[target.'cfg(all(target_arch = "arm", target_os = "none"))']
|
||||
# replace STM32F429ZITx with your chip as listed in `probe-rs-cli chip list`
|
||||
runner = "probe-rs-cli run --chip STM32F767ZITx"
|
||||
# replace STM32F429ZITx with your chip as listed in `probe-rs chip list`
|
||||
runner = "probe-rs run --chip STM32F767ZITx"
|
||||
|
||||
[build]
|
||||
target = "thumbv7em-none-eabihf"
|
||||
|
|
|
@ -1,6 +1,6 @@
|
|||
[target.'cfg(all(target_arch = "arm", target_os = "none"))']
|
||||
# replace STM32G071C8Rx with your chip as listed in `probe-rs-cli chip list`
|
||||
runner = "probe-rs-cli run --chip STM32G071RBTx"
|
||||
# replace STM32G071C8Rx with your chip as listed in `probe-rs chip list`
|
||||
runner = "probe-rs run --chip STM32G071RBTx"
|
||||
|
||||
[build]
|
||||
target = "thumbv6m-none-eabi"
|
||||
|
|
|
@ -1,6 +1,6 @@
|
|||
[target.'cfg(all(target_arch = "arm", target_os = "none"))']
|
||||
# replace STM32G071C8Rx with your chip as listed in `probe-rs-cli chip list`
|
||||
runner = "probe-rs-cli run --chip STM32G484VETx"
|
||||
# replace STM32G071C8Rx with your chip as listed in `probe-rs chip list`
|
||||
runner = "probe-rs run --chip STM32G484VETx"
|
||||
|
||||
[build]
|
||||
target = "thumbv7em-none-eabi"
|
||||
|
|
|
@ -1,5 +1,5 @@
|
|||
[target.thumbv8m.main-none-eabihf]
|
||||
runner = 'probe-rs-cli run --chip STM32H563ZITx'
|
||||
runner = 'probe-rs run --chip STM32H563ZITx'
|
||||
|
||||
[build]
|
||||
target = "thumbv8m.main-none-eabihf"
|
||||
|
|
|
@ -1,5 +1,5 @@
|
|||
[target.thumbv7em-none-eabihf]
|
||||
runner = 'probe-rs-cli run --chip STM32H743ZITx'
|
||||
runner = 'probe-rs run --chip STM32H743ZITx'
|
||||
|
||||
[build]
|
||||
target = "thumbv7em-none-eabihf" # Cortex-M4F and Cortex-M7F (with FPU)
|
||||
|
|
|
@ -1,6 +1,6 @@
|
|||
[target.'cfg(all(target_arch = "arm", target_os = "none"))']
|
||||
# replace your chip as listed in `probe-rs-cli chip list`
|
||||
runner = "probe-rs-cli run --chip STM32L053R8Tx"
|
||||
# replace your chip as listed in `probe-rs chip list`
|
||||
runner = "probe-rs run --chip STM32L053R8Tx"
|
||||
|
||||
[build]
|
||||
target = "thumbv6m-none-eabi"
|
||||
|
|
|
@ -1,6 +1,6 @@
|
|||
[target.'cfg(all(target_arch = "arm", target_os = "none"))']
|
||||
# replace your chip as listed in `probe-rs-cli chip list`
|
||||
runner = "probe-rs-cli run --chip STM32L151CBxxA"
|
||||
# replace your chip as listed in `probe-rs chip list`
|
||||
runner = "probe-rs run --chip STM32L151CBxxA"
|
||||
|
||||
[build]
|
||||
target = "thumbv7m-none-eabi"
|
||||
|
|
|
@ -1,8 +1,8 @@
|
|||
[target.'cfg(all(target_arch = "arm", target_os = "none"))']
|
||||
# replace STM32F429ZITx with your chip as listed in `probe-rs-cli chip list`
|
||||
#runner = "probe-rs-cli run --chip STM32L475VGT6"
|
||||
#runner = "probe-rs-cli run --chip STM32L475VG"
|
||||
runner = "probe-rs-cli run --chip STM32L4S5VI"
|
||||
# replace STM32F429ZITx with your chip as listed in `probe-rs chip list`
|
||||
#runner = "probe-rs run --chip STM32L475VGT6"
|
||||
#runner = "probe-rs run --chip STM32L475VG"
|
||||
runner = "probe-rs run --chip STM32L4S5VI"
|
||||
|
||||
[build]
|
||||
target = "thumbv7em-none-eabi"
|
||||
|
|
|
@ -1,6 +1,6 @@
|
|||
[target.'cfg(all(target_arch = "arm", target_os = "none"))']
|
||||
# replace STM32L552ZETxQ with your chip as listed in `probe-rs-cli chip list`
|
||||
runner = "probe-rs-cli run --chip STM32L552ZETxQ"
|
||||
# replace STM32L552ZETxQ with your chip as listed in `probe-rs chip list`
|
||||
runner = "probe-rs run --chip STM32L552ZETxQ"
|
||||
|
||||
[build]
|
||||
target = "thumbv8m.main-none-eabihf"
|
||||
|
|
|
@ -1,6 +1,6 @@
|
|||
[target.'cfg(all(target_arch = "arm", target_os = "none"))']
|
||||
# replace STM32U585AIIx with your chip as listed in `probe-rs-cli chip list`
|
||||
runner = "probe-rs-cli run --chip STM32U585AIIx"
|
||||
# replace STM32U585AIIx with your chip as listed in `probe-rs chip list`
|
||||
runner = "probe-rs run --chip STM32U585AIIx"
|
||||
|
||||
[build]
|
||||
target = "thumbv8m.main-none-eabihf"
|
||||
|
|
|
@ -1,6 +1,6 @@
|
|||
[target.'cfg(all(target_arch = "arm", target_os = "none"))']
|
||||
# replace STM32WB55CCUx with your chip as listed in `probe-rs-cli chip list`
|
||||
# runner = "probe-rs-cli run --chip STM32WB55RGVx --speed 1000 --connect-under-reset"
|
||||
# replace STM32WB55CCUx with your chip as listed in `probe-rs chip list`
|
||||
# runner = "probe-rs run --chip STM32WB55RGVx --speed 1000 --connect-under-reset"
|
||||
runner = "teleprobe local run --chip STM32WB55RG --elf"
|
||||
|
||||
[build]
|
||||
|
|
|
@ -1,6 +1,6 @@
|
|||
[target.'cfg(all(target_arch = "arm", target_os = "none"))']
|
||||
# replace your chip as listed in `probe-rs-cli chip list`
|
||||
runner = "probe-rs-cli run --chip STM32WLE5JCIx"
|
||||
# replace your chip as listed in `probe-rs chip list`
|
||||
runner = "probe-rs run --chip STM32WLE5JCIx"
|
||||
|
||||
[build]
|
||||
target = "thumbv7em-none-eabihf"
|
||||
|
|
|
@ -44,8 +44,8 @@ async fn main(spawner: Spawner) {
|
|||
}
|
||||
|
||||
// cyw43 firmware needs to be flashed manually:
|
||||
// probe-rs-cli download 43439A0.bin --format bin --chip RP2040 --base-address 0x101c0000
|
||||
// probe-rs-cli download 43439A0_clm.bin --format bin --chip RP2040 --base-address 0x101f8000
|
||||
// probe-rs download 43439A0.bin --format bin --chip RP2040 --base-address 0x101c0000
|
||||
// probe-rs download 43439A0_clm.bin --format bin --chip RP2040 --base-address 0x101f8000
|
||||
let fw = unsafe { core::slice::from_raw_parts(0x101c0000 as *const u8, 224190) };
|
||||
let clm = unsafe { core::slice::from_raw_parts(0x101f8000 as *const u8, 4752) };
|
||||
|
||||
|
|
Loading…
Reference in a new issue