cleanup
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parent
68792bb918
commit
f90b170dad
7 changed files with 15 additions and 15 deletions
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@ -29,7 +29,7 @@ stm32wb-hci = { version = "0.1.2", features = ["version-5-0"], optional = true }
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bitflags = { version = "2.3.3", optional = true }
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[features]
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default = ["stm32wb55rg", "mac", "ble", "defmt"]
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default = []
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defmt = ["dep:defmt", "embassy-sync/defmt", "embassy-embedded-hal/defmt", "embassy-hal-common/defmt"]
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ble = ["dep:stm32wb-hci"]
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@ -98,8 +98,6 @@ impl Mac {
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let mut payload = [0u8; MAX_PACKET_SIZE];
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cmd.copy_into_slice(&mut payload);
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debug!("sending {}", &payload[..T::SIZE]);
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let response = self
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.tl_write_and_get_response(T::OPCODE as u16, &payload[..T::SIZE])
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.await;
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@ -28,8 +28,6 @@ impl ParseableMacEvent for AssociateConfirm {
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const SIZE: usize = 16;
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fn try_parse(buf: &[u8]) -> Result<Self, ()> {
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debug!("{}", buf);
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Self::validate(buf)?;
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Ok(Self {
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@ -50,7 +50,7 @@ impl Sys {
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}
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/// `HW_IPCC_SYS_CmdEvtNot`
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pub async fn write_and_get_response(&self, opcode: ShciOpcode, payload: &[u8]) -> SchiCommandStatus {
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pub async fn write_and_get_response(&self, opcode: ShciOpcode, payload: &[u8]) -> Result<SchiCommandStatus, ()> {
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self.write(opcode, payload).await;
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Ipcc::flush(channels::cpu1::IPCC_SYSTEM_CMD_RSP_CHANNEL).await;
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@ -59,12 +59,12 @@ impl Sys {
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let p_command_event = &((*p_event_packet).evt_serial.evt.payload) as *const _ as *const CcEvt;
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let p_payload = &((*p_command_event).payload) as *const u8;
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ptr::read_volatile(p_payload).try_into().unwrap()
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ptr::read_volatile(p_payload).try_into()
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}
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}
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#[cfg(feature = "mac")]
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pub async fn shci_c2_mac_802_15_4_init(&self) -> SchiCommandStatus {
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pub async fn shci_c2_mac_802_15_4_init(&self) -> Result<SchiCommandStatus, ()> {
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use crate::tables::{
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Mac802_15_4Table, TracesTable, MAC_802_15_4_CMD_BUFFER, MAC_802_15_4_NOTIF_RSP_EVT_BUFFER,
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TL_MAC_802_15_4_TABLE, TL_TRACES_TABLE, TRACES_EVT_QUEUE,
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@ -88,7 +88,7 @@ impl Sys {
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}
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#[cfg(feature = "ble")]
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pub async fn shci_c2_ble_init(&self, param: ShciBleInitCmdParam) -> SchiCommandStatus {
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pub async fn shci_c2_ble_init(&self, param: ShciBleInitCmdParam) -> Result<SchiCommandStatus, ()> {
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self.write_and_get_response(ShciOpcode::BleInit, param.payload()).await
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}
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@ -1,7 +1,7 @@
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[target.'cfg(all(target_arch = "arm", target_os = "none"))']
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# replace STM32WB55CCUx with your chip as listed in `probe-rs chip list`
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runner = "probe-run --chip STM32WB55RGVx --speed 1000 --connect-under-reset"
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# runner = "teleprobe local run --chip STM32WB55RG --elf"
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# runner = "probe-run --chip STM32WB55RGVx --speed 1000 --connect-under-reset"
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runner = "teleprobe local run --chip STM32WB55RG --elf"
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[build]
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target = "thumbv7em-none-eabihf"
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@ -168,9 +168,13 @@ async fn main(spawner: Spawner) {
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.unwrap(),
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MacEvent::McpsDataInd(data_ind) => {
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let data_addr = data_ind.msdu_ptr;
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let mut a = [0u8; 256];
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unsafe { data_addr.copy_to(&mut a as *mut _, data_ind.msdu_length as usize) }
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info!("{}", a[..data_ind.msdu_length as usize])
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let mut data = [0u8; 256];
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unsafe { data_addr.copy_to(&mut data as *mut _, data_ind.msdu_length as usize) }
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info!("{}", data[..data_ind.msdu_length as usize]);
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if &data[..data_ind.msdu_length as usize] == b"Hello from embassy!" {
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info!("success");
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}
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}
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_ => {}
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}
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@ -148,7 +148,7 @@ async fn main(spawner: Spawner) {
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.send_command(&DataRequest {
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src_addr_mode: AddressMode::Short,
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dst_addr_mode: AddressMode::Short,
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dst_pan_id: PanId::BROADCAST,
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dst_pan_id: PanId([0x1A, 0xAA]),
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dst_address: MacAddress::BROADCAST,
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msdu_handle: 0x02,
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ack_tx: 0x00,
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