NaxdyOrg/embassy
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Author SHA1 Message Date
xoviat
1f2be2dac5
Merge pull request #1569 from xoviat/tl-mbox-2 
wpan: misc. cleanup and add mac
 2023-06-21 21:50:12 +00:00
Dario Nieuwenhuis
2e625138ff
Merge pull request #1501 from xoviat/can 
async can
 2023-06-20 22:57:31 +00:00
xoviat
ca21027eea
Merge pull request #3 from schphil/can 
fix extended can id
 2023-06-20 17:45:28 -05:00
xoviat
0a551eb7c6 stm32/can: fix time 2023-06-20 17:39:00 -05:00
xoviat
0d67ef795e Merge branch 'main' of https://github.com/embassy-rs/embassy into tl-mbox-2 2023-06-19 21:18:46 -05:00
xoviat
0998221478 stm32/can: update interrupts 2023-06-19 16:05:59 -05:00
Dario Nieuwenhuis
428a4ba3f9 stm32/gpdma: clear all interrupts after reset. 
Reset doesn't clear them, this causes subsequent transfers to instantly
complete because the TC flag was set from before.
 2023-06-19 23:03:31 +02:00
xoviat
aaad906815 Merge branch 'main' of https://github.com/embassy-rs/embassy into can 2023-06-19 15:52:33 -05:00
Dario Nieuwenhuis
3c70f799a2
Merge pull request #1572 from whitequark/bdma-blocking_wait-stop 
BDMA: request stop after busy loop in blocking_wait()
 2023-06-19 09:55:07 +00:00
Catherine
bbc81146ec BDMA: request stop after busy loop in blocking_wait(). 
Otherwise the channel cannot be used again, since CR.EN remains set
and the DMA channel registers are read-only while it is set.
 2023-06-19 09:06:41 +00:00
Dario Nieuwenhuis
558918651e stm32: update stm32-metapac. 2023-06-19 03:22:12 +02:00
xoviat
748d1ea89d stm32/ipcc: minor cleanup 2023-06-18 10:10:05 -05:00
Dario Nieuwenhuis
adaed307b4
Merge pull request #1561 from petegibson/stm32-buffereduart-int-flags-fix 
Ensure idle & ove flags are cleared in BufferedUart ISR on STM32
 2023-06-18 10:40:22 +00:00
Peter Gibson
b4f96e192c Don't read data register to clear flags on usart v3 ^& v4 2023-06-18 08:45:58 +10:00
xoviat
ae83e6f536
Merge pull request #1566 from xoviat/tl-mbox-2 
tl-mbox: switch to new ipcc mechanism
 2023-06-17 20:48:37 +00:00
xoviat
6b5d55eb29 stm32/wpan: convert to new ipcc 2023-06-17 12:00:33 -05:00
xoviat
4c9b7befaa stm32/ipcc: add clear debug 2023-06-17 10:50:06 -05:00
Dario Nieuwenhuis
ec36225f8a
Merge pull request #1560 from kevswims/feature/stm32g4-pll-enhancements 
Feature/stm32g4 pll enhancements - Add PLL support for the P and Q outputs for G4 series chips
 2023-06-16 16:06:50 +00:00
Philipp Scheff
f6c1108bdf fix extended can id 2023-06-16 14:56:28 +02:00
Peter Gibson
d236f3dbf9 actually fix formatting 2023-06-15 18:35:58 +10:00
Peter Gibson
d23717904b fix formatting 2023-06-15 18:33:01 +10:00
Peter Gibson
837950cd74 ensure DR is read to clear idle/overflow interrupt when they occur independently of the rxne 2023-06-15 13:24:49 +10:00
Kevin Lannen
c94ba84892 stm32g4: PLL: Add support for configuring PLL_P and PLL_Q 2023-06-14 10:44:51 -06:00
goueslati
2d89cfb18f fix merge conflict 2023-06-12 14:27:53 +01:00
goueslati
ca8957da43 stm32/ipcc: move tl_mbox into embassy-stm32-wpan 2023-06-12 12:27:51 +01:00
Dario Nieuwenhuis
98c821ac39 Remove embassy-cortex-m crate, move stuff to embassy-hal-common. 2023-06-09 16:44:20 +02:00
Dario Nieuwenhuis
dc8e34420f Remove executor dep+reexports from HALs. 
Closes #1547
 2023-06-09 16:29:45 +02:00
Carl St-Laurent
8ddeaddc67
Rename to follow ref manual and CubeIDE 2023-06-08 20:46:48 -04:00
Carl St-Laurent
0915fb73b2
Merge branch 'master' into stm32g4-pll 2023-06-08 20:43:14 -04:00
Dario Nieuwenhuis
8c93805ab5 Add rt feature to HALs, cfg out interrupt handling when not set. 2023-06-08 18:57:03 +02:00
Dario Nieuwenhuis
5c2f02c735 Reexport NVIC_PRIO_BITS at HAL root. 
This allows using RTIC with `#[rtic::app(device = embassy_nrf, ...)]`
 2023-06-08 18:07:49 +02:00
Dario Nieuwenhuis
bce24e8005 asdg 2023-06-08 18:07:49 +02:00
Dario Nieuwenhuis
921780e6bf Make interrupt module more standard. 
- Move typelevel interrupts to a special-purpose mod: `embassy_xx::interrupt::typelevel`.
- Reexport the PAC interrupt enum in `embassy_xx::interrupt`.

This has a few advantages:
- The `embassy_xx::interrupt` module is now more "standard".
  - It works with `cortex-m` functions for manipulating interrupts, for example.
  - It works with RTIC.
- the interrupt enum allows holding value that can be "any interrupt at runtime", this can't be done with typelevel irqs.
- When "const-generics on enums" is stable, we can remove the typelevel interrupts without disruptive changes to `embassy_xx::interrupt`.
 2023-06-08 18:00:48 +02:00
goueslati
ce1d72c609 wip 2023-06-08 16:26:47 +01:00
ExplodingWaffle
a4b8fc420a Replace Into<bool> for Level with From<Level> for bool 2023-06-05 01:37:56 +01:00
Carl St-Laurent
4185c10bf8
Cleanup 2023-06-04 12:09:03 -04:00
Carl St-Laurent
ade46489f1
Added Vcore boost mode and Flash wait state 2023-06-04 11:57:42 -04:00
Carl St-Laurent
6fe853a7d3
Better comments 2023-06-04 10:58:44 -04:00
Carl St-Laurent
2f269f3256
stm32/rcc: Implement basic PLL support for STM32G4 series 2023-06-03 22:05:24 -04:00
gak
3539dd7d4c
Fix #1528 HS USB on STM32F7 2023-06-03 07:00:31 +10:00
Dario Nieuwenhuis
404aa29289 cortex-m: remove owned interrupts. 2023-06-01 03:25:19 +02:00
Dario Nieuwenhuis
7fcded5705 stm32/rtc: fix build failure in some L4s 2023-05-31 20:03:52 +02:00
xoviat
35083b262b
Merge branch 'main' into can 2023-05-30 21:15:26 -05:00
xoviat
16bfbd4e99 stm32/can: add hw test and cleanup 2023-05-30 21:14:25 -05:00
xoviat
f8d35806dc stm32/can: move to irq binding use embassy channel 2023-05-29 19:09:52 -05:00
xoviat
da0be7114f stm32/uart: fix dma ringbuf tests 2023-05-29 15:14:43 -05:00
xoviat
68441a74c2 Merge branch 'main' of https://github.com/embassy-rs/embassy into uart 2023-05-29 15:07:21 -05:00
xoviat
aba0f8fd6c stm32/uart: refactor rx ringbuffer 
- remove some race conditions
- allow full use of rx buffer
 2023-05-29 14:49:43 -05:00
Dario Nieuwenhuis
46961cfdf7 Fix tests. 2023-05-29 19:46:28 +02:00
bors[bot]
bab03a3927
Merge #1489 #1500 
1489: stm32/ipcc: make IPCC methods static r=xoviat a=OueslatiGhaith



1500: stm32/tests: disable sdmmc test for now r=xoviat a=xoviat



Co-authored-by: goueslati <ghaith.oueslati@habemus.com>
Co-authored-by: Ghaith Oueslati <73850124+OueslatiGhaith@users.noreply.github.com>
Co-authored-by: xoviat <xoviat@users.noreply.github.com>
 2023-05-29 14:42:51 +00:00