eZio Pan
47c579eba2
update metapac
2024-02-29 00:11:40 +08:00
Dario Nieuwenhuis
5ced938184
Merge pull request #2634 from maiaherringfish/stm32h7-fdcansel-fix
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adding FDCANSEL logic for STM32H7x
2024-02-28 00:54:43 +00:00
Dario Nieuwenhuis
da4ccb62e4
Merge pull request #2635 from MaxiluxSystems/fdcan-refactor
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stm32: can: fd: some refactoring
2024-02-28 00:50:40 +00:00
Torin Cooper-Bennun
a8da42943f
stm32: can: fd: rm some irrelevant commented code and dead code
2024-02-27 23:47:41 +00:00
Torin Cooper-Bennun
0ed402fd79
stm32: can: fd: refactor out some duplicate code
2024-02-27 23:47:25 +00:00
Maia
b7e0964a07
added FDCANSEL logic for H7
2024-02-27 11:07:05 -08:00
Dario Nieuwenhuis
62c5df7e5b
Merge pull request #2631 from MaxiluxSystems/small-fdcan-fixes
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stm32: can: fd: fix SID read/write and BRS setting for TX
2024-02-27 12:19:03 +00:00
Dario Nieuwenhuis
55cda6ad97
Merge pull request #2628 from eZioPan/iwdg-v3-psc
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allow higher psc value for iwdg_v3 ...
2024-02-27 11:47:45 +00:00
Dario Nieuwenhuis
140848c503
Merge pull request #2630 from plaes/nrf-spim-reduce-spam
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nrf: spim: Hide the "Copying SPIM tx buffer into RAM for DMA" traces
2024-02-27 11:34:35 +00:00
Torin Cooper-Bennun
9a4f58fe15
stm32: can: fd: only TX with BRS if also TXing with FDF
2024-02-27 10:38:40 +00:00
Torin Cooper-Bennun
e63b0d7a2f
stm32: can: fd: fix SID read/write from buf elems
2024-02-27 10:38:07 +00:00
Ulf Lilleengen
8f11b12319
Merge pull request #2629 from plaes/nrf-drop-embedded-storage-async-dep
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nrf: Bump embedded-storage-async to 0.4.1
2024-02-27 08:54:31 +00:00
Priit Laes
137855418a
nrf: Bump embedded-storage-async to 0.4.1
2024-02-27 10:40:10 +02:00
Priit Laes
0bcbca9e5b
nrf: spim: Hide the "Copying SPIM tx buffer into RAM for DMA" traces
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Now that SPIM driver seems to be properly working, hide the trace logs
which occur whenever tx buffer needs to be copied into RAM.
2024-02-27 10:37:45 +02:00
eZio Pan
bf44adc4bc
allow higher psc value for iwdg_v3
2024-02-27 14:20:58 +08:00
Dario Nieuwenhuis
d5a2b3be58
Merge pull request #2614 from MaxiluxSystems/time_driver_tim1
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stm32: time_driver: allow use of TIM1 for driver
2024-02-26 12:08:32 +00:00
Dario Nieuwenhuis
3499806a3d
Merge pull request #2627 from HaoboGu/main
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Bump `usbd-hid` version to 0.7.0
2024-02-26 11:50:48 +00:00
Torin Cooper-Bennun
5c45723777
stm32: timers: use TIMx_CC interrupt source for advanced timers
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fixes (hopefully) time driver when using TIM1/8/20
2024-02-26 10:03:51 +00:00
Haobo Gu
a0afd378f4
update usbd-hid to latest
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Signed-off-by: Haobo Gu <haobogu@outlook.com>
2024-02-26 17:28:29 +08:00
Dario Nieuwenhuis
1ad28581c7
Merge pull request #2625 from OroArmor/add-pll1_p_mul_2-clock
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Add `PLL1_P_MUL_2` clock.
2024-02-26 02:16:41 +00:00
Dario Nieuwenhuis
c83ab20526
stm32: update metapac.
2024-02-26 03:02:58 +01:00
Dario Nieuwenhuis
72c6f9a101
stm32/adc: reexport enums from PAC to avoid boilerplate hell.
2024-02-26 03:02:58 +01:00
Dario Nieuwenhuis
a308b9ac2f
Merge branch 'adc_h5' into add-pll1_p_mul_2-clock
2024-02-26 02:14:38 +01:00
Eli Orona
abde7891e3
Update metapac version
2024-02-25 16:44:46 -08:00
Eli Orona
2dfd66b7c4
🤦
2024-02-25 16:25:42 -08:00
Eli Orona
7dbae799dc
Rust FMT
2024-02-25 16:24:52 -08:00
Eli Orona
c23b59bdc8
Add pll1_p_mul_2 clock.
2024-02-25 16:12:32 -08:00
Dario Nieuwenhuis
fd5058875a
Merge pull request #2624 from embassy-rs/stm32-rcc-sysclk-naming
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stm32/rcc: unify naming sysclk field to `sys`, enum to `Sysclk`.
2024-02-25 23:04:57 +00:00
Dario Nieuwenhuis
489d0be2a2
stm32/rcc: unify naming sysclk field to sys, enum to Sysclk.
2024-02-26 00:00:17 +01:00
Dario Nieuwenhuis
497515ed57
Merge pull request #2583 from OroArmor/tim_pll_clk
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Enable PLL Clocks for TIMx peripherals on STM32F3xx Chips
2024-02-25 22:45:48 +00:00
Dario Nieuwenhuis
326e32adc4
Merge pull request #2623 from cschuhen/feature/fdcan_pac_cleanup
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Cleanup of FDCAN module, mostly review comments.
2024-02-25 21:06:59 +00:00
Corey Schuhen
a737a7350e
FDCAN: Remove history from comments.
2024-02-25 10:14:12 +10:00
Corey Schuhen
1327a644b6
FDCAN: Don't require internal module for public API.
2024-02-25 10:14:12 +10:00
Corey Schuhen
0565098b06
FDCAN: Fix some indenting in macros
2024-02-25 10:14:12 +10:00
Corey Schuhen
a061cf3133
FDCAN: Allow access to buffered senders and receivers.
2024-02-25 10:14:12 +10:00
Corey Schuhen
779898c0e7
FDCAN: Expose some pub types in API
2024-02-25 10:14:12 +10:00
Corey Schuhen
2d634d07e0
FDCAN: Remove extra traits from.
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Comments
Fix.
2024-02-25 10:13:58 +10:00
Eli Orona
394abda092
Fix report with the same name
2024-02-24 12:58:38 -08:00
Eli Orona
e79d2dd756
Move to internal mod and re-export the enums
2024-02-24 12:54:58 -08:00
Dario Nieuwenhuis
4657c10547
Merge pull request #2606 from embassy-rs/dma-refactor
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stm32/dma: add AnyChannel, add support for BDMA on H7.
2024-02-24 01:56:10 +00:00
Dario Nieuwenhuis
e67dfcb04f
stm32/dma: add AnyChannel, add support for BDMA on H7.
2024-02-24 02:41:41 +01:00
Torin Cooper-Bennun
86ccf0bc3e
stm32: remove TIM11 as time driver candidate (only 1 CC channel)
2024-02-23 14:35:12 +00:00
Torin Cooper-Bennun
44534abf32
stm32: sync available TIMs in Cargo.toml, build.rs
2024-02-23 14:35:12 +00:00
Torin Cooper-Bennun
a11e3146f8
stm32: time_driver: allow use of TIM1 for driver
2024-02-23 14:35:12 +00:00
Dario Nieuwenhuis
f77d59500e
Merge pull request #2618 from barnabywalters/g4rcc
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[embassy-stm32] G4 RCC refactor amendments and additions
2024-02-23 13:05:01 +00:00
Barnaby Walters
b091ffcb55
[embassy-stm32] G4 RCC refactor amendments and additions
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* Added assertions for a variety of clock frequencies, based on the reference manual and
stm32g474 datasheet. The family and numbers are consistent enough that I’m assuming
these numbers will work for the other chips.
* Corrected value of pll1_q in set_clocks call, added pll1_r value
2024-02-23 01:59:24 +01:00
Dario Nieuwenhuis
840a9a9ce7
Merge pull request #2597 from fe1es/stm32l0-reset-rtc
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stm32/rcc: reset RTC on stm32l0
2024-02-23 00:50:09 +00:00
Dario Nieuwenhuis
a6a5d9913c
Merge branch 'main' into stm32l0-reset-rtc
2024-02-23 01:45:10 +01:00
Dario Nieuwenhuis
2855bb6968
Merge pull request #2617 from embassy-rs/u5-rcc
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stm32/rcc: port U5 to new API, add all PLLs, all HSE modes.
2024-02-23 00:37:20 +00:00
Dario Nieuwenhuis
d24349f57c
stm32/tests: run stm32u5a5zj from flash due to wrong RAM size in stm32-data.
2024-02-23 01:33:37 +01:00
