Commit graph

4024 commits

Author SHA1 Message Date
xoviat
4de4039417 stm32/rtc: build more chips 2023-04-18 20:38:28 -05:00
xoviat
f589247c1f stm32/rtc: cleanup and consolidate 2023-04-18 20:38:18 -05:00
Dario Nieuwenhuis
46227bec1e
Merge pull request #1375 from embassy-rs/stm32-sdmmc-refactor
stm32/sdmmc: refactor, simplify code, add HIL test
2023-04-17 22:14:19 +02:00
Dario Nieuwenhuis
e63a34ba21 stm32/sdmmc: add hil test for f4. 2023-04-17 21:49:34 +02:00
Dario Nieuwenhuis
82dd7a5f8c stm32/sdmmc: add init_card retry. 2023-04-17 21:48:47 +02:00
Dario Nieuwenhuis
0dfa192992 stm32/sdmmc: remove "inner" layer. 2023-04-17 19:23:18 +02:00
Dario Nieuwenhuis
e14fa11fc3 stm32/sdmmc: remove unneeded pointer casts. 2023-04-17 17:52:02 +02:00
Dario Nieuwenhuis
df7ef1d98f stm32/sdmmc: remove cfg_if. 2023-04-17 17:52:02 +02:00
bors[bot]
9202dbf32a
Merge #1369
1369: Lora AFIT r=Dirbaio a=Dirbaio

Extracted out of #1367 

Probably we should wait until `rust-lorawan` is merged+released?

Co-authored-by: Ulf Lilleengen <lulf@redhat.com>
2023-04-17 13:50:49 +00:00
Ulf Lilleengen
4044d728a6
update to released versions 2023-04-17 15:44:58 +02:00
bors[bot]
6acc361109
Merge #1371 #1374
1371: RTC r=Dirbaio a=xoviat

This adds RTC for most of the stm32 chips. Nearly all of the work was not done by me, but I took it the last bit by disabling the chips that weren't working. I think it would be easier to enable them in future PRs if requested.

1374: stm32: remove TIMX singleton when used on timer driver r=Dirbaio a=xoviat

After multiple ways of looking at this, this is the best solution I could think of.

Co-authored-by: Mathias <mk@blackbird.online>
Co-authored-by: xoviat <xoviat@users.noreply.github.com>
2023-04-17 01:29:05 +00:00
xoviat
27ec29e2c5 stm32/rtc: remove unused import 2023-04-16 19:32:15 -05:00
xoviat
90c1422381 stm32/rtc: remove chrono datetime and add converters 2023-04-16 19:30:42 -05:00
xoviat
9e1ddeac86 stm32: fix defective example 2023-04-16 18:32:55 -05:00
bors[bot]
99dcbf00c4
Merge #1372
1372: rp: add division intrinsics r=Dirbaio a=pennae

rp2040-hal adds division intrinsics using the hardware divider unit in the SIO, as does the pico-sdk itself. using the hardware is faster than the compiler_rt implementations, and more compact too.

since embassy does not expose the hardware divider in any way (yet?) we could go even further an remove the state-saving code rp2040-hal needs, but that doesn't seem to be worth it.

Co-authored-by: pennae <github@quasiparticle.net>
2023-04-16 23:23:47 +00:00
xoviat
776e001b5b stm32: remove TIMX singleton when used on timer driver
fixes #1316.
2023-04-16 17:47:25 -05:00
bors[bot]
6ba2bb1a7f
Merge #1373
1373: rp: switch to released rp-pac v1.0 r=Dirbaio a=Dirbaio

bors r+

Co-authored-by: Dario Nieuwenhuis <dirbaio@dirbaio.net>
2023-04-16 22:00:07 +00:00
Dario Nieuwenhuis
a258e15c23 rp: switch to released rp-pac v1.0 2023-04-16 23:59:26 +02:00
pennae
7a682ec02a rp: add division intrinsics
rp2040-hal adds division intrinsics using the hardware divider unit in
the SIO, as does the pico-sdk itself. using the hardware is faster than
the compiler_rt implementations, and more compact too.
2023-04-16 19:45:18 +02:00
xoviat
e9ede443bc stm32/rtc: disable nonworking versions 2023-04-16 11:14:17 -05:00
xoviat
bc550cbfda adjust .vscode file 2023-04-16 11:06:24 -05:00
xoviat
8da9c07a65 stm32/rtc: disable nonworking versions 2023-04-16 11:06:05 -05:00
xoviat
bd6bb2d248 Merge branch 'embassy-stm32/rtc' of https://github.com/MathiasKoch/embassy into rtc 2023-04-16 10:06:00 -05:00
bors[bot]
1fdce6e52a
Merge #1360 #1361
1360: stm32/rcc: add i2s pll on some f4 micros r=Dirbaio a=xoviat

Adds the i2s pll on some f4 micros. 

1361: Executor: Replace unnecessary atomics in runqueue r=Dirbaio a=GrantM11235

Only the head pointer needs to be atomic. The `RunQueueItem` pointers are only loaded and stored, and never concurrently

Co-authored-by: xoviat <xoviat@users.noreply.github.com>
Co-authored-by: Grant Miller <GrantM11235@gmail.com>
2023-04-15 10:38:28 +00:00
xoviat
f395ec44e8 stm32/rcc: add pllsai clock 2023-04-14 21:28:27 -05:00
Ulf Lilleengen
63941432e3 Update to rust-lorawan with afit support 2023-04-15 01:00:12 +02:00
bors[bot]
be0f93ff37
Merge #1368
1368: AFIT cleanup r=Dirbaio a=Dirbaio

bors r+

Co-authored-by: Dario Nieuwenhuis <dirbaio@dirbaio.net>
2023-04-14 22:59:49 +00:00
Dario Nieuwenhuis
224eaaf797 stm32/sdmmc: switch to AFIT. 2023-04-15 00:58:58 +02:00
Dario Nieuwenhuis
f681b9d4e5 Remove the _todo_embedded_hal_serial impls. EH will probably not have these serial traits. 2023-04-15 00:58:58 +02:00
xoviat
650589ab3f stm32/rcc: add plli2s to Clocks and cfg directives 2023-04-14 16:30:36 -05:00
Dario Nieuwenhuis
a3ecf5caf6
Merge pull request #1363 from embassy-rs/embassy-time-released
time: remove embassy-sync dep, release v0.1.1
2023-04-14 00:19:33 +02:00
Dario Nieuwenhuis
a7629299f4 Release embassy-time v0.1.1 2023-04-13 23:57:20 +02:00
Dario Nieuwenhuis
e7ff759f1c time: remove dependency on embassy-sync. 2023-04-13 23:57:20 +02:00
Dario Nieuwenhuis
62ecd97350
Merge pull request #1362 from embassy-rs/embassy-sync-v0.2.0
Release embassy-sync v0.2.0
2023-04-13 23:56:32 +02:00
Dario Nieuwenhuis
577f060d24 Release embassy-sync v0.2.0 2023-04-13 23:40:49 +02:00
Grant Miller
6a6c673c5f Executor: Replace unnecessary atomics in runqueue 2023-04-13 14:21:41 -05:00
xoviat
c1d5f86871 stm32/rcc: fix warnings 2023-04-12 18:11:55 -05:00
xoviat
0289630fe4 stm32/rcc: add i2s pll on some f4 micros 2023-04-12 18:04:44 -05:00
bors[bot]
5a03b2e9e8
Merge #1359
1359: Make Hertz constructors `const` r=Dirbaio a=sgoll

This PR makes `Hertz` associated functions `hz()`, `khz()`, `mhz()` and their unassociated variants `const`, allowing `Hertz` to be used more easily in constant values:

```rust
const FREQ1: Hertz = Hertz::khz(120);
const FREQ2: Hertz = mhz(1);
```

This follows the pattern used for similar types such as `Duration` and `Instant`, from `embassy-time/src/duration.rs` and `embassy-time/src/instant.rs`, respectively.

ba8cafb20c/embassy-time/src/duration.rs (L44-L47)

ba8cafb20c/embassy-time/src/instant.rs (L29-L34)

Co-authored-by: Sebastian Goll <sebastian.goll@gmx.de>
2023-04-12 22:13:44 +00:00
Sebastian Goll
4863f88d02 Make Hertz constructors const
This allows them to be used in constant values.
2023-04-13 00:06:14 +02:00
bors[bot]
ba8cafb20c
Merge #1358
1358: Fix typo in derivation of PLLP divisor for STM32F2 family r=Dirbaio a=sgoll

This PR fixes a typo in the derivation of the PLLP divisor for the STM32F2 family.

Fixes #1357 

Co-authored-by: Sebastian Goll <sebastian.goll@gmx.de>
2023-04-12 01:09:41 +00:00
Sebastian Goll
f3699e67b9 Fix typo in derivation of PLLP divisor 2023-04-12 02:07:31 +02:00
Dario Nieuwenhuis
201a038134
Merge pull request #1356 from embassy-rs/peripheralref-no-mut
Do not require mut in PeripheralRef clone_unchecked, make nRF timer `cc()` borrows less strict.
2023-04-12 00:03:46 +02:00
Dario Nieuwenhuis
8fd8ef9ca7 nrf/timer: make cc() borrows less strict. 2023-04-11 23:09:02 +02:00
Dario Nieuwenhuis
9a677ab618 common/peripheral: do not require mut in PeripheralRef clone_unchecked. 2023-04-11 23:09:02 +02:00
bors[bot]
5c42ca13bd
Merge #1353
1353: Add empty test binary for riscv r=Dirbaio a=royb3

As discussed with `@Dirbaio,` this empty test binary should cause a build to fail when it is not possible to build or link a riscv binary.

Co-authored-by: Roy Buitenhuis <roy.buitenhuis@technolution.nl>
2023-04-11 16:20:08 +00:00
Roy Buitenhuis
f426c47747 Remove empty line, causing build issues. 2023-04-11 17:40:05 +02:00
Roy Buitenhuis
6e947c83b6 Move linker flags to build script. 2023-04-11 17:22:47 +02:00
Roy Buitenhuis
e183801957 Rustfmt 2023-04-11 17:04:25 +02:00
Roy Buitenhuis
00258bca43 Add empty test binary for riscv 2023-04-11 16:53:04 +02:00