Commit graph

69 commits

Author SHA1 Message Date
Dario Nieuwenhuis
2a589b7904 ci: replace openid connect with static secret.
The oidc token is only valid for 5min, builds are starting to fail because HIL tests
take more than 5 min and we only obtain it once at start.

Instead of fixing it, let's remove it. My hope for OIDC was to allow running
HIL tests on PRs from forks if the author is in a list of trusted users.
However GHA simply doesn't give the ID token to PRs from forks. 🤷
Same limitation as with static tokens. So it's useless complexity, let's kill it.
2023-05-25 03:54:49 +02:00
Dirk Stolle
5df263db38 Update GitHub Actions CI
The following updates are performed:
* update actions/cache to v3
* update actions/checkout to v3
2023-05-08 23:28:01 +02:00
sander
a73f9474a0 embassy-boot: ensure tests can run on the stable compiler 2023-04-20 10:56:59 +02:00
sander
3bf41e9a06 ci: ad nightly flag to embassy-boot tests 2023-04-20 10:47:40 +02:00
huntc
b0529bc943 Support codesigning in the firmware updater
This commit provides a method to verify that firmware has been signed with a private key given its public key. The implementation uses ed25519-dalek as the signature verifier. An "ed25519" feature is required to enable the functionality. When disabled (the default), calling the firmware updater's verify method will return a failure.
2023-01-12 13:30:58 +11:00
Dario Nieuwenhuis
753781a263 Build docs in CI 2022-10-02 23:30:12 +02:00
Dario Nieuwenhuis
21072bee48 split embassy-util into embassy-futures, embassy-sync. 2022-08-22 22:18:13 +02:00
Dario Nieuwenhuis
a0f1b0ee01 Split embassy crate into embassy-executor, embassy-util. 2022-07-29 23:40:36 +02:00
Dario Nieuwenhuis
9252e8bb88 Update cargo-batch. 2022-04-08 00:35:00 +02:00
Dario Nieuwenhuis
1904906b36 ci: add build with stable. 2022-02-12 01:16:31 +01:00
Dario Nieuwenhuis
63cfa7cd6a Update cargo-batch. 2022-02-11 20:31:37 +01:00
Dario Nieuwenhuis
dd32358d6b stm32: add gpio HIL test 2021-12-06 22:05:41 +01:00
Dario Nieuwenhuis
f9934fb56b ci: do main build with fully generated stm32-metapac. 2021-11-24 01:43:53 +01:00
Dario Nieuwenhuis
c8e69a14eb Faster CI with cargo-batch 2021-11-22 01:25:07 +01:00
bors[bot]
5322e293bd
Merge #461
461: nrf: add initial nrf5340 support r=Dirbaio a=Dirbaio

Thanks to `@diondokter's` work on DPPI this was quite easy! :) 

TODO:
- [ ] Add config option to enable 128mhz
- [ ] Add config option to unlock APPROTECT automatically.
- [ ] Add a way to boot net (config option or API?)
- [ ] Support WDT (there's WDT0, WDT1. Needs some refactor)
- [ ] Support NVMC
- [ ] Support TEMP

Co-authored-by: Dario Nieuwenhuis <dirbaio@dirbaio.net>
2021-11-07 22:58:27 +00:00
Bob McWhirter
ee1ea44b60 Add stm32u5 examples to CI run. 2021-11-02 15:11:30 -04:00
Dario Nieuwenhuis
663141b4e4 nrf: add initial nrf5340 support 2021-10-28 03:36:25 +02:00
bors[bot]
dfccb84fcb
Merge #457
457: nrf91: support running in both S and NS mode. r=Dirbaio a=Dirbaio

- Cargo feature `nrf9160` is now `nrf9160-s` or `nrf9160-ns`
- "fake-PAC" renames everything appropriately so there's no need to spam cfg's everywhere.

With `nrf9160-s`  you can now run code without flashing any weird SPM/bootloader. Tested on nrf9160-dk.

Co-authored-by: Dario Nieuwenhuis <dirbaio@dirbaio.net>
2021-10-27 22:43:35 +00:00
Dario Nieuwenhuis
c995a97f20 nrf91: support running in both S and NS mode. 2021-10-26 17:40:07 +02:00
Dario Nieuwenhuis
cf47676dac Add stm32f7 to CI 2021-10-26 17:33:28 +02:00
bors[bot]
05bc4d198e
Merge #423
423: nRF9160 support r=Dirbaio a=diondokter

- Created a chip file with all the peripherals, interrupts and peripheral implementations.
- All peripherals now use an alias for the NS (non-secure) version of the nRF9160 version.
- Implementations of peripherals that don't exist are ignored.
- Most PPI functionality has been stubbed out because the nRF91 has the newer DPPI which is not compatible with the current API. (The channels are also set to not configurable, so they are kinda useless now, but in principle the stubs should never be called)


Co-authored-by: Dion Dokter <dion@tweedegolf.com>
2021-10-13 21:11:41 +00:00
Dion Dokter
c1c704bfc8 - Removed the enable assert from UARTE.
- Added nRF9160 to CI.
2021-10-13 15:00:08 +02:00
Dario Nieuwenhuis
db289d6d5e Add bors 2021-10-12 01:52:26 +02:00
Mariusz Ryndzionek
bce909ec1e Initial STM32F1 family support with two examples for STM32F103C8 (Blue Pill) 2021-09-28 18:31:04 +02:00
Ulf Lilleengen
c79485c286 Support for STM32L1
* Add RCC
* Fix more issues with dash in chip names
* Update stm32-data version
* Add blinky and spi example
2021-09-21 14:50:23 +02:00
Ulf Lilleengen
e24528051b Add WASM support for executor
* Adds an executor for WASM runtimes based on wasm_bindgen.
* Add time driver based on JS time handling.
* Add example that can run in browser locally.
* Update to critical-section version that supports 'std' flag
2021-09-13 16:42:39 +02:00
Dario Nieuwenhuis
da707051b0 stm32: add G0 to Ci 2021-08-20 01:29:37 +02:00
Ulf Lilleengen
919cdfe8c4
Add STM32WL55 examples to CI (#361)
* Add STM32WL55 examples to CI and fix warnings
2021-08-18 09:35:08 +02:00
Dario Nieuwenhuis
0ea6a2d890 time: replace dyn clock/alarm with a global Driver trait 2021-08-05 19:14:09 +02:00
Dario Nieuwenhuis
87f27d5ed6 ci: rustfmt check all .rs files
The old script was missing many .rs files that were not enabled due to cfg's.
2021-08-04 15:23:32 +02:00
Bob McWhirter
d8c6ffe3a2 Revert "Optimize CI"
This reverts commit fe58e9541d.
2021-07-28 09:24:45 -04:00
Dario Nieuwenhuis
fe58e9541d Optimize CI 2021-07-24 15:29:31 +02:00
Thales Fragoso
697f93ad42 stm32: Add F0 example 2021-07-15 13:50:39 -03:00
Dario Nieuwenhuis
1d64421fb4 Fix "can't find crate for std" for stm32-metapac-gen deps. 2021-07-13 05:47:10 +02:00
huntc
e13aa4c2a0 Add tests to our CI
Also found some doctests that were failing
2021-07-06 12:29:08 +10:00
Dario Nieuwenhuis
e4145bf08b Deny warnings in CI 2021-07-05 02:44:12 +02:00
Ulf Lilleengen
b6a8703698 Add support for generating PAC for dual cores
* Chips that have multiple cores will be exposed as chipname_corename,
  i.e. stm32wl55jc_cm4
* Chips that have single cores will use the chip family as feature name
  and pick the first and only core from the list
* Add support for stm32wl55 chip family
2021-06-16 15:12:07 +02:00
Dominik Boehi
b82e2627aa Add STM32WB55 examples to CI, fix example crate name 2021-06-12 07:06:42 +02:00
Dario Nieuwenhuis
c5a418a9a6 Run metapac full gen in Ci 2021-06-10 03:05:44 +02:00
Ulf Lilleengen
1bb7123156 Add examples for STM32L0 2021-06-09 23:09:48 +02:00
Bob McWhirter
4f1f63f336 Initial swag at h7 examples. 2021-06-08 15:25:38 -04:00
Bob McWhirter
a407558e3f Add to GHA. 2021-06-08 10:41:18 -04:00
Dario Nieuwenhuis
dff03ecfc7 Move examples to a subdirectory 2021-06-02 01:32:19 +02:00
Dario Nieuwenhuis
f4700e072d Really checkout submodules in CI 2021-05-31 03:07:46 +02:00
Dario Nieuwenhuis
2729adc68a Checkout submodules in ci 2021-05-31 02:51:47 +02:00
Dario Nieuwenhuis
99048b91e9 net: add ci 2021-05-28 23:13:23 +02:00
Dario Nieuwenhuis
38f59c4dea Add stm32l0 to CI 2021-05-21 19:05:26 +02:00
Dario Nieuwenhuis
16f8db4fcd Build with executor-agnostic in CI 2021-05-19 12:57:22 +02:00
Dario Nieuwenhuis
9206d4b33d Add more chips to CI 2021-05-17 03:28:24 +02:00
Dario Nieuwenhuis
410b24d54b Add more chips to CI 2021-05-17 03:25:30 +02:00