Commit graph

98 commits

Author SHA1 Message Date
bors[bot]
855c0d1423
Merge #1376
1376: rtc: cleanup and consolidate r=Dirbaio a=xoviat

This removes an extra file that I left in, adds an example, and consolidates the files into one 'v2' file.

Co-authored-by: xoviat <xoviat@users.noreply.github.com>
2023-05-01 19:32:06 +00:00
pennae
b58b9ff390 rp/uart: report errors from dma receive 2023-05-01 15:36:53 +02:00
pennae
861f49cfd4 rp/uart: report errors from buffered uart
this reports errors at the same location the blocking uart would, which
works out to being mostly exact (except in the case of overruns, where
one extra character is dropped). this is actually easier than going
nuclear in the case of errors and nuking both the buffer contents and
the rx fifo, both of which are things we'd have to do in addition to
what's added here, and neither are needed for correctness.
2023-05-01 15:32:58 +02:00
pennae
1c8492bab2 tests/rp: test error conditions for uart 2023-05-01 15:22:56 +02:00
pennae
bcbe3040a1 tests/rp: fix buffered uart test
the rp uart receive fifo is 32 entries deep, so the 31 byte test data
fits into it without needing any buffering. extend to 48 bytes to fill
the entire fifo and the 16 byte test buffer.
2023-05-01 13:00:40 +02:00
Ulf Lilleengen
42a8f1671d Bump versions preparing for -macros and -executor release 2023-04-27 11:54:22 +02:00
xoviat
0d82ebea29 stm32/rtc: fix datetime and add f4 test 2023-04-25 17:35:01 -05:00
pennae
a4866ad278 rp: add PWM api 2023-04-23 22:49:15 +02:00
pennae
fdd6e08ed6 rp: hook up softfloat rom intrinsics
rp-hal has done this very well already, so we'll just copy their entire
impl again. only div.rs needed some massaging because our sio access
works a little differently, everything else worked as is.
2023-04-19 23:04:47 +02:00
Dario Nieuwenhuis
e63a34ba21 stm32/sdmmc: add hil test for f4. 2023-04-17 21:49:34 +02:00
Dario Nieuwenhuis
577f060d24 Release embassy-sync v0.2.0 2023-04-13 23:40:49 +02:00
Roy Buitenhuis
6e947c83b6 Move linker flags to build script. 2023-04-11 17:22:47 +02:00
Roy Buitenhuis
e183801957 Rustfmt 2023-04-11 17:04:25 +02:00
Roy Buitenhuis
00258bca43 Add empty test binary for riscv 2023-04-11 16:53:04 +02:00
Dario Nieuwenhuis
f5df567619 stm32/test: add C0 hil tests. 2023-04-11 14:16:32 +02:00
Dario Nieuwenhuis
dbfd28130f stm32/test: add h5 hil tests. 2023-04-10 15:25:11 +02:00
Dario Nieuwenhuis
be37eee13d Update embedded-hal crates. 2023-04-06 22:41:50 +02:00
bors[bot]
5923e143e3
Merge #1321
1321: executor: add Pender, rework Cargo features. r=Dirbaio a=Dirbaio

This introduces a `Pender` struct with enum cases for thread-mode, interrupt-mode and
custom callback executors. This avoids calls through function pointers when using only
the thread or interrupt executors. Faster, and friendlier to `cargo-call-stack`.

`embassy-executor` now has `arch-xxx` Cargo features to select the arch and to enable
the builtin executors (thread and interrupt).

Co-authored-by: Dario Nieuwenhuis <dirbaio@dirbaio.net>
2023-04-04 15:50:12 +00:00
Ulf Lilleengen
ae26a08026 Add HIL test for timer on nrf 2023-04-03 22:55:21 +02:00
Dario Nieuwenhuis
d3c4e4a20a executor: add Pender, rework Cargo features.
This introduces a `Pender` struct with enum cases for thread-mode, interrupt-mode and
custom callback executors. This avoids calls through function pointers when using only
the thread or interrupt executors. Faster, and friendlier to `cargo-call-stack`.

`embassy-executor` now has `arch-xxx` Cargo features to select the arch and to enable
the builtin executors (thread and interrupt).
2023-04-03 03:09:11 +02:00
Lachezar Lechev
7be63b3468
fix: spi transfer bug and additions to test
Signed-off-by: Lachezar Lechev <elpiel93@gmail.com>
2023-03-26 18:14:17 +03:00
Lachezar Lechev
cd2f28d2ab
chore: add spi_async tests for uneven buffers
Signed-off-by: Lachezar Lechev <elpiel93@gmail.com>
2023-03-24 12:14:38 +02:00
Mathias
89a371d10c Add HIL test for into_buffered uart on embassy-rp 2023-03-14 12:46:58 +01:00
Dario Nieuwenhuis
9cf000ef4e nrf/uart: switch to new interrupt binding. 2023-03-06 00:17:51 +01:00
Dario Nieuwenhuis
7650fea5f2 nrf/buffered_uarte: add HIL tests. 2023-03-04 15:12:49 +01:00
kalkyl
13d9d8fde1 Refactor after review 2022-12-13 13:49:51 +01:00
kalkyl
d8821cfd41 Feature gate critical-section-impl 2022-12-10 12:57:45 +01:00
kalkyl
cc0248d83a Select critical-section in tests 2022-12-10 12:42:08 +01:00
Dario Nieuwenhuis
54c153673d rp: add OutputOpenDrain input test. 2022-12-06 21:09:27 +01:00
Dario Nieuwenhuis
1dcb0ea1f5 Bump defmt-rtt to 0.4 2022-11-29 21:15:24 +01:00
Dario Nieuwenhuis
7b838d0336 rp/uart: use lockfree ringbuffer.
This gets rid of another PeripheralMutex usage.
2022-11-25 22:30:47 +01:00
Dario Nieuwenhuis
1e2fb0459d Switch to async-fn-in-trait 2022-11-25 21:02:06 +01:00
Mathias
bc21b6efaf Add delay to flash test to allow time to parse RTT header 2022-10-27 12:49:20 +02:00
Mathias
a7b90c7fb6 Remove unused imports from test 2022-10-27 11:36:46 +02:00
Mathias
c871fe0848 Rebase on master 2022-10-27 07:12:34 +02:00
Guillaume MICHEL
9cac649fcf stm32: Add support for read_until_idle on UART 2022-10-26 19:06:18 +02:00
Dario Nieuwenhuis
eeb072d9cb Update Rust nightly. 2022-10-26 16:47:29 +02:00
Mathias
80e58426fc Add flash example & flash HIL test 2022-10-26 12:24:04 +02:00
chrysn
6718ca3a94 all Cargo.toml: Add license to all crate Cargo.toml files
Closes: https://github.com/embassy-rs/embassy/issues/1002
2022-10-07 12:41:56 +02:00
Ulf Lilleengen
72c2e985bb Update embedded-hal versions and explicitly pin 2022-09-29 11:27:46 +02:00
Mathias
e129a97d48 Fix bufferedUart read and write tests 2022-09-27 07:45:10 +02:00
Mathias
93354b812c Extend buffered-uart test to transmit 32 bytes 2022-09-27 05:54:31 +02:00
Dario Nieuwenhuis
c863acd24f rp: set correct teleprobe target for rpi-pico tests. 2022-09-26 20:36:06 +02:00
Mathias
f76444bdc4 Add HIL test for bufferedUart 2022-09-26 20:34:55 +02:00
Dario Nieuwenhuis
75e93cc142 rp: enable time-driver in Cargo.toml instead of ci.sh 2022-09-26 20:33:20 +02:00
Dario Nieuwenhuis
10d1ad2343 Replace futures::future::join -> embassy_futures::join::join. 2022-09-22 16:48:35 +02:00
Dario Nieuwenhuis
5327b9c289 time: add more tick rates, use 1mhz as default. 2022-09-02 00:59:34 +02:00
Henrik Alsér
9ff5c50774 Cleanup examples 2022-09-01 15:12:44 +02:00
Henrik Alsér
7954cbc4e7 Add HIL tests 2022-09-01 15:12:44 +02:00
Mathias
bd27b9080f Add HIL tests of DMA & UART, and correctly set DREQ for uart DMA 2022-08-26 12:55:15 +02:00