huntc
8c9e50b378
Conflates the negative and positive types as they are the same, and renames pin to input as they can be more than pins
2021-10-11 09:38:35 +11:00
huntc
b043778f75
Removed the NotConnected as it isn't used.
2021-10-11 09:08:58 +11:00
huntc
25d6a2cd13
No use case understood for NotConnected, so hiding it for now
2021-10-11 08:56:53 +11:00
huntc
617a976e96
No need for unwrap
2021-10-11 08:54:24 +11:00
huntc
5f5470a320
Need to borrow the pins for the lifetime of the config, and subsequently the one shot.
2021-10-11 08:52:45 +11:00
huntc
cef6158c31
Extend SAADC one shot support
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One-shot mode now permits the sampling of differential pins, and the sampling of multiple pins simultaneously.
A new ChannelConfig structure has been introduced so that multiple channels can be configured individually. Further, the `sample` method now accepts a buffer into which samples are written.
Along the way, I've reset some default configuration to align with Nordic's settings in their nrfx saadc driver. Specifically, the channel gain defaults to 6 (from 4) and the time defaults to 10us (from 20us).
2021-10-09 11:25:18 +11:00
Dario Nieuwenhuis
009b77c1b9
Merge pull request #414 from embassy-rs/nrf-saadc-remove-trait
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nrf/saadc: remove Sample trait.
2021-10-07 02:15:19 +02:00
Dario Nieuwenhuis
0e05ba688d
nrf/saadc: remove Sample trait.
2021-10-07 02:10:22 +02:00
Dario Nieuwenhuis
a816776cb5
Add matrix bot
2021-10-06 20:34:38 +02:00
Dario Nieuwenhuis
d9e2d17625
Merge pull request #380 from bgamari/stm32g0-adc
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Fix STM32G0 ADC
2021-09-29 06:58:33 +02:00
Ben Gamari
006bbea51a
stm32/adc: Add IN0 channel
2021-09-29 00:32:40 -04:00
Ben Gamari
5a38cc2140
stm32/dac: Ensure that clock is enabled
2021-09-29 00:32:40 -04:00
Ben Gamari
0b9961584b
stm32/adc: Ensure that clock is enabled
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Sadly due to the inconsistency in clocking configuration across devices
we cannot use RccPeripheral.
2021-09-29 00:32:40 -04:00
Ben Gamari
573e6ec373
stm32g0: Add support for low-power run
2021-09-28 21:19:10 -04:00
Ben Gamari
794798e225
stm32g0: Add support for HSI divider
2021-09-28 21:19:10 -04:00
Ben Gamari
aa4069fe10
stm32/adc: Fix ADC support for STM32G0
2021-09-28 21:19:10 -04:00
Ben Gamari
e2e0464d04
stm32/adc: Factor out conversion logic
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Also guard errata workaround correctly.
2021-09-28 18:00:05 -04:00
Dario Nieuwenhuis
b6f84efd90
Merge pull request #406 from mryndzionek/stm32f1_support
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Basic STM32F1 support
2021-09-28 19:20:23 +02:00
Mariusz Ryndzionek
d14e555ee7
Bump stm32-data
2021-09-28 19:11:33 +02:00
Mariusz Ryndzionek
ce361abb1b
Changing the casts (code review request)
2021-09-28 18:31:04 +02:00
Mariusz Ryndzionek
bce909ec1e
Initial STM32F1 family support with two examples for STM32F103C8 (Blue Pill)
2021-09-28 18:31:04 +02:00
Dario Nieuwenhuis
1650983e46
Merge pull request #407 from theunkn0wn1/fix/into_af
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Fix: erroneous behavior of pins being configured into AF
2021-09-28 00:54:15 +02:00
Joshua Salzedo
ab60cfd64b
Patch additional regressions
2021-09-27 15:48:56 -07:00
Joshua Salzedo
67e2f9159c
set moder::ALTERNATE last when configuring pins to AF modes.
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- as per STM32F4xx_hal's impl
2021-09-27 15:27:43 -07:00
Dario Nieuwenhuis
6aa675994d
Merge pull request #405 from theunkn0wn1/feature/crc_hal
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Feature: CRC HAL
2021-09-27 23:55:38 +02:00
Joshua Salzedo
07e20a7443
Pub use version-specific CRC symbols, not just the CRC struct.
2021-09-27 11:17:31 -07:00
Joshua Salzedo
a26ffeb84b
Cargo fmt
2021-09-27 10:49:32 -07:00
Joshua Salzedo
e36d4f460a
Fix variable names in crc_v2/v3.
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removed `reclaim` in crc_v1.
used write instead of modify.
renamed `init` to `reset` in crc_v1.
2021-09-27 10:46:09 -07:00
Joshua Salzedo
43ad28b9f9
Use unborrow for CRC constructor
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sort feature gates
fix repetition in CRC config names
2021-09-27 10:38:55 -07:00
Joshua Salzedo
7392e33ad5
cargo fmt
2021-09-26 19:20:21 -07:00
Joshua Salzedo
e67af514e9
Fix v2/3 module paths
2021-09-26 19:15:54 -07:00
Joshua Salzedo
642b0825a6
V3 is just an extension of V2, merge modules.
2021-09-26 19:14:08 -07:00
Joshua Salzedo
f9ff5336d4
Merge all of the crc_v2 configurations into a single modify call
2021-09-26 18:46:19 -07:00
Joshua Salzedo
8fac444c4e
Flesh out v2 config writes
2021-09-26 18:39:55 -07:00
Joshua Salzedo
afef19d813
Start work towards CRC_V2
2021-09-26 18:26:20 -07:00
Joshua Salzedo
7899d73359
Expose read so the value can be obtained without a write.
2021-09-26 17:28:58 -07:00
Joshua Salzedo
c892289b2c
Actually export CRC
2021-09-26 17:26:33 -07:00
Joshua Salzedo
24dea91f5a
Fix interface changes
2021-09-26 17:24:48 -07:00
Joshua Salzedo
4760afd9f4
Update stm32-data
2021-09-26 16:53:32 -07:00
Joshua Salzedo
e18a27eea2
First pass at CRC_V1
2021-09-26 16:46:17 -07:00
Joshua Salzedo
e527892d89
Start work on CRC_v1
2021-09-26 16:29:22 -07:00
Dario Nieuwenhuis
f8d833e0c5
Merge pull request #403 from mryndzionek/af_type
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Small adjustment to 'set_as_af' interface
2021-09-24 20:20:45 +02:00
Mariusz Ryndzionek
e4b37c40c9
Code review request - moving OutputType to mod sealed
2021-09-24 19:56:48 +02:00
Mariusz Ryndzionek
d371298a27
Small adjustment to 'set_as_af' interface
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Small adjustment to 'set_as_af' interface - v2
2021-09-24 18:39:07 +02:00
Vincent Stakenburg
c8394ea7b9
add latest stm32-data
2021-09-24 18:27:39 +02:00
Vincent Stakenburg
7d6d274d55
Add MSI and PLL clock source for L4
2021-09-24 18:27:39 +02:00
Ulf Lilleengen
b6fc19182b
Add pwr for L1 and update RCC to new reg block
2021-09-23 14:51:16 +02:00
Dario Nieuwenhuis
d5b21b881e
Merge pull request #399 from lulf/stm32l1
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Support for STM32L1
2021-09-22 12:22:42 +02:00
Ulf Lilleengen
9d45018077
Refactor V1 SPI
2021-09-21 14:50:23 +02:00
Ulf Lilleengen
c79485c286
Support for STM32L1
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* Add RCC
* Fix more issues with dash in chip names
* Update stm32-data version
* Add blinky and spi example
2021-09-21 14:50:23 +02:00
