Commit graph

590 commits

Author SHA1 Message Date
Dario Nieuwenhuis
a8bd3ab952 Add missing + 'd on unborrows. 2022-02-10 16:06:42 +01:00
Dario Nieuwenhuis
550da471be stm32: Remove OptionalPin
The idea behind OptionalPin has a few problems:

- you need to impl the signal traits for NoPin which is a bit weird https://github.com/embassy-rs/embassy/blob/master/embassy-stm32/src/dcmi.rs#L413-L416
- you can pass any combination of set/unset pins, which needs checking at runtime  https://github.com/embassy-rs/embassy/blob/master/embassy-stm32/src/dcmi.rs#L130

The replacement is to do multiple `new` constructors for each combination of pins you want to take.
2022-02-10 02:38:10 +01:00
bors[bot]
1d265b73b2
Merge #601
601: [part 1/n] Change macrotables to build.rs codegen r=lulf a=Dirbaio

This PR replaces the "macrotables" (the macros like `stm32_data::peripherals!`) with a `const METADATA`.

Macrotables had some problems:

- Hard to debug
- Somewhat footgunny (typo the "pattern" and then nothing matches and the macro now expands to nothing, silently!)
- Limited power
  - Can't count, so we had to add a [special macrotable for that](f50f3f0a73/embassy-stm32/src/dma/bdma.rs (L26)).
  - Can't remove duplicates, so we had to fallback to [Rust code in build.rs](f50f3f0a73/embassy-stm32/build.rs (L105-L145))
  - Can't include the results as a listto another macro, so again [build.rs](https://github.com/embassy-rs/embassy/blob/master/embassy-stm32/build.rs#L100-L101).

They work fine for the 95% of cases, but for the remaining 5% we need Rust code in build.rs. So we might as well do everything with Rust code, so everything is consistent.

The new approach generates a `const METADATA: Metadata = Metadata { ... }` with [these structs](https://github.com/embassy-rs/embassy/blob/unmacrotablize/stm32-metapac-gen/src/assets/metadata.rs) in `stm32-metapac`. `build.rs` can then read that and generate whatever code.


Co-authored-by: Dario Nieuwenhuis <dirbaio@dirbaio.net>
2022-02-09 15:27:35 +00:00
bors[bot]
d91bd0b9a6
Merge #602
602: Add stm32 USB OTG peripherals r=Dirbaio a=chemicstry

Fixes #557. This is similar to #580, but for synopsys IP.

I could add examples to other chips, but I have no way of testing them. The F4 example is tested and working.

Co-authored-by: chemicstry <chemicstry@gmail.com>
2022-02-09 00:29:00 +00:00
chemicstry
10981ee809 Cleanup 2022-02-09 02:10:54 +02:00
chemicstry
1f81a69347 Merge USB FS and HS peripherals. Add ULPI. 2022-02-09 02:02:23 +02:00
Dario Nieuwenhuis
8160af6af9 stm32: replace peripheral_rcc! macrotable with build.rs 2022-02-09 00:58:17 +01:00
Dario Nieuwenhuis
d1a9680422 stm32: change interrupt declarations from macrotables to build.rs. 2022-02-09 00:45:52 +01:00
Dario Nieuwenhuis
940412c034 stm32/build.rs: switch to using stm32-metapac metadata and quote. 2022-02-09 00:31:21 +01:00
Matous Hybl
d37d714314 stm32: Add support for FMC 2022-02-08 17:30:20 +01:00
Matous Hybl
fee1de109d Fix RCC configuration for H7. 2022-02-08 14:36:53 +01:00
chemicstry
db0d798b48 Add stm32 USB OTG peripherals 2022-02-08 01:46:32 +02:00
Dario Nieuwenhuis
fbaa7e59d5 stm32/dma: fix interrupt codegen for new stm32-data 2022-02-05 03:03:32 +01:00
Dario Nieuwenhuis
f8b8872fa6
Merge pull request #593 from embassy-rs/remove-traits
traits: migrate Delay to embedded-hal 1.0+async, remove Rng and Flash.
2022-02-05 01:53:01 +01:00
Greg V
8bb41a3281 stm32f3: fix nonexistent cfg tests
The rcc code was taken from stm32-rs which uses 'x' features, but
embassy uses features with full chip names.

Add these 'x' wildcards as cfgs and use them in rcc.
They will be useful for USB too.
2022-02-02 22:53:03 +03:00
Dario Nieuwenhuis
0719b05d63 traits: migrate Delay to embedded-hal 1.0+async, remove Rng and Flash. 2022-01-27 00:08:02 +01:00
Ulf Lilleengen
4032fc0655 Support unstable-trait feature for stm32 2022-01-26 22:39:06 +01:00
Sam Lakerveld
3fc54236ea
stm32/i2c: allow empty transfers with async api 2022-01-25 16:28:49 +01:00
Dario Nieuwenhuis
a8580ec78a stm32/rcc: fix stm32f410 2022-01-24 00:50:35 +01:00
Dario Nieuwenhuis
533ceb707c stm32: add tim4, tim5 support for time-driver (stm32f410 doesn't have tim2, tim3) 2022-01-24 00:50:10 +01:00
Dario Nieuwenhuis
79f60adbfb stm32: add time-driver-any cargo feature that automatically picks one available timer. 2022-01-24 00:24:53 +01:00
Dario Nieuwenhuis
889d757ab8 stm32/spi: expose all functionality as inherent methods. 2022-01-19 17:59:55 +01:00
Dario Nieuwenhuis
3d27a0e7cb stm32/dma: make lowlevel api take ptrs instead of slices. 2022-01-19 17:59:55 +01:00
Dario Nieuwenhuis
97ab859f00 stm32/i2c: expose all functionality as inherent methods. 2022-01-19 17:59:55 +01:00
Dario Nieuwenhuis
c949519714 stm32/usart: expose all functionality as inherent methods. 2022-01-19 17:59:55 +01:00
Dario Nieuwenhuis
ade44e91c4 stm32/exti: add wait_for_high, wait_for_low. 2022-01-19 17:59:55 +01:00
Dario Nieuwenhuis
b526addf7b stm32/exti: expose all functionality as inherent methods. 2022-01-19 17:59:55 +01:00
Dario Nieuwenhuis
58fc64722c stm32/gpio: expose all functionality as inherent methods. 2022-01-19 17:59:55 +01:00
Dario Nieuwenhuis
52e156b429 stm32: use critical_section instead of cortex_m::interrupt 2022-01-19 17:59:55 +01:00
Dario Nieuwenhuis
ecda57dff1 stm32: remove unused .pep8 file 2022-01-19 17:59:55 +01:00
Matous Hybl
4988dfe981 Make advanced timer trait not require general purpose timer trait as the timers are too different. 2022-01-18 11:18:54 +01:00
Greg V
9fcc207629 stm32l1/rcc: fix clock frequency assertion
It was comparing a number in Hz (!) to "32" (MHz).
embassy-stm32's units don't work like those used by stm32-hal :/
2022-01-14 22:59:57 +03:00
Greg V
456b56d4fd stm32l1/rcc: set required flash bits for high frequencies
As is done for lots of other families
2022-01-14 22:59:57 +03:00
Matous Hybl
66e46d8012 Add the possibility to reconfigure Spi mode and bit order configuration on the fly. 2022-01-14 12:50:58 +01:00
Matous Hybl
e07df92651 Make RCC accessible using low-level API. 2022-01-13 16:12:45 +01:00
Matous Hybl
16d09f074a Add simple PWM, add PWM pin definitions also accessible from low-level API. 2022-01-13 16:05:54 +01:00
Matous Hybl
a1f7a94c69 Add low level timer API. 2022-01-13 16:05:54 +01:00
Ulf Lilleengen
2bc105803a Make exti an optional feature
* Add embassy-stm32 build with exti
* Add exti to examples
2022-01-12 14:28:10 +01:00
Dario Nieuwenhuis
3486d59d73 stm32: remove Dbgmcu from public API.
The use case is already covered by `config.enable_debug_during_sleep`.
2022-01-05 00:00:44 +01:00
Dario Nieuwenhuis
2eb0cc5df7 stm32/rcc: remove Rcc struct, RccExt trait.
All the RCC configuration is executed in init().
2022-01-05 00:00:44 +01:00
Dario Nieuwenhuis
c3fd9a0f44 stm32/rcc: f4/f7 cleanup and make a bit more consistent. 2022-01-04 21:17:17 +01:00
Dario Nieuwenhuis
b06e705a73 stm32/rcc: change family-specific code from dirs to single files.
Consistent with how other peripherals handle their versions.
2022-01-04 19:28:15 +01:00
Dario Nieuwenhuis
89b009b11d stm32h7/rcc: remove unneeded DMA enable settings.
These are automatically enabled by dma::init().
2022-01-04 13:31:30 +01:00
Dario Nieuwenhuis
5d2f40b337 stm32wl/rcc: remove unneded gpio enables in RCC.
These are already done by gpio::init().
2022-01-04 13:31:30 +01:00
Dario Nieuwenhuis
cdc66e110f stm32/rcc: remove builders on Config.
This makes API consistent with other Config structs in Embassy, where
the convention is to not use builders.
2022-01-04 13:31:30 +01:00
bors[bot]
cdfd128185
Merge #545
545: Add adapter for implementing async traits for blocking types r=lulf a=lulf

This allows writing drivers relying on async traits, while still
functioning with implementations that already implement the embedded-hal
traits.

Co-authored-by: Ulf Lilleengen <lulf@redhat.com>
2022-01-03 14:17:21 +00:00
bors[bot]
c0e94a7042
Merge #563
563: Initial ADC support for on STM32F1xx  r=Dirbaio a=sjoerdsimons

Add an ADC implementation for F1 based chips. Primarily tested using ADC1, proper functionality for ADC2 probably needs some extra work as it's mainly a slave and can't e.g. measure vrefint by itself.

Needs https://github.com/embassy-rs/stm32-data/pull/115

Co-authored-by: Sjoerd Simons <sjoerd@collabora.com>
Co-authored-by: Dario Nieuwenhuis <dirbaio@dirbaio.net>
2022-01-01 11:45:23 +00:00
bors[bot]
c20ef419a6
Merge #558
558: Port buffered uart to v1 stm32 hardware r=Dirbaio a=DCNick3

#526 seems to suggest that it will be rewritten for DMA support, but I am not sure how to implement it and the port was quite straightforward, so here it is. It might be immediately useful before DMA version will be implemented

Note that I have not tested this on v2 hardware

Co-authored-by: Nikita Strygin <nikita6@bk.ru>
2022-01-01 10:51:14 +00:00
Sjoerd Simons
92f2c6d09c adc: Implement support for f1 ADC block
Add basic support for the STM32F1xx ADC blocks.
2021-12-30 10:51:54 +01:00
Sjoerd Simons
a93b1141e9 stm32f1: Store adc clock rate in Clocks struct 2021-12-30 10:50:28 +01:00