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573 commits

Author SHA1 Message Date
Sam Lakerveld
3fc54236ea
stm32/i2c: allow empty transfers with async api 2022-01-25 16:28:49 +01:00
Dario Nieuwenhuis
a8580ec78a stm32/rcc: fix stm32f410 2022-01-24 00:50:35 +01:00
Dario Nieuwenhuis
533ceb707c stm32: add tim4, tim5 support for time-driver (stm32f410 doesn't have tim2, tim3) 2022-01-24 00:50:10 +01:00
Dario Nieuwenhuis
79f60adbfb stm32: add time-driver-any cargo feature that automatically picks one available timer. 2022-01-24 00:24:53 +01:00
Dario Nieuwenhuis
889d757ab8 stm32/spi: expose all functionality as inherent methods. 2022-01-19 17:59:55 +01:00
Dario Nieuwenhuis
3d27a0e7cb stm32/dma: make lowlevel api take ptrs instead of slices. 2022-01-19 17:59:55 +01:00
Dario Nieuwenhuis
97ab859f00 stm32/i2c: expose all functionality as inherent methods. 2022-01-19 17:59:55 +01:00
Dario Nieuwenhuis
c949519714 stm32/usart: expose all functionality as inherent methods. 2022-01-19 17:59:55 +01:00
Dario Nieuwenhuis
ade44e91c4 stm32/exti: add wait_for_high, wait_for_low. 2022-01-19 17:59:55 +01:00
Dario Nieuwenhuis
b526addf7b stm32/exti: expose all functionality as inherent methods. 2022-01-19 17:59:55 +01:00
Dario Nieuwenhuis
58fc64722c stm32/gpio: expose all functionality as inherent methods. 2022-01-19 17:59:55 +01:00
Dario Nieuwenhuis
52e156b429 stm32: use critical_section instead of cortex_m::interrupt 2022-01-19 17:59:55 +01:00
Dario Nieuwenhuis
ecda57dff1 stm32: remove unused .pep8 file 2022-01-19 17:59:55 +01:00
Matous Hybl
4988dfe981 Make advanced timer trait not require general purpose timer trait as the timers are too different. 2022-01-18 11:18:54 +01:00
Greg V
9fcc207629 stm32l1/rcc: fix clock frequency assertion 
It was comparing a number in Hz (!) to "32" (MHz).
embassy-stm32's units don't work like those used by stm32-hal :/
 2022-01-14 22:59:57 +03:00
Greg V
456b56d4fd stm32l1/rcc: set required flash bits for high frequencies 
As is done for lots of other families
 2022-01-14 22:59:57 +03:00
Matous Hybl
66e46d8012 Add the possibility to reconfigure Spi mode and bit order configuration on the fly. 2022-01-14 12:50:58 +01:00
Matous Hybl
e07df92651 Make RCC accessible using low-level API. 2022-01-13 16:12:45 +01:00
Matous Hybl
16d09f074a Add simple PWM, add PWM pin definitions also accessible from low-level API. 2022-01-13 16:05:54 +01:00
Matous Hybl
a1f7a94c69 Add low level timer API. 2022-01-13 16:05:54 +01:00
Ulf Lilleengen
2bc105803a Make exti an optional feature 
* Add embassy-stm32 build with exti
* Add exti to examples
 2022-01-12 14:28:10 +01:00
Dario Nieuwenhuis
3486d59d73 stm32: remove Dbgmcu from public API. 
The use case is already covered by `config.enable_debug_during_sleep`.
 2022-01-05 00:00:44 +01:00
Dario Nieuwenhuis
2eb0cc5df7 stm32/rcc: remove Rcc struct, RccExt trait. 
All the RCC configuration is executed in init().
 2022-01-05 00:00:44 +01:00
Dario Nieuwenhuis
c3fd9a0f44 stm32/rcc: f4/f7 cleanup and make a bit more consistent. 2022-01-04 21:17:17 +01:00
Dario Nieuwenhuis
b06e705a73 stm32/rcc: change family-specific code from dirs to single files. 
Consistent with how other peripherals handle their versions.
 2022-01-04 19:28:15 +01:00
Dario Nieuwenhuis
89b009b11d stm32h7/rcc: remove unneeded DMA enable settings. 
These are automatically enabled by dma::init().
 2022-01-04 13:31:30 +01:00
Dario Nieuwenhuis
5d2f40b337 stm32wl/rcc: remove unneded gpio enables in RCC. 
These are already done by gpio::init().
 2022-01-04 13:31:30 +01:00
Dario Nieuwenhuis
cdc66e110f stm32/rcc: remove builders on Config. 
This makes API consistent with other Config structs in Embassy, where
the convention is to not use builders.
 2022-01-04 13:31:30 +01:00
bors[bot]
cdfd128185
Merge #545 
545: Add adapter for implementing async traits for blocking types r=lulf a=lulf

This allows writing drivers relying on async traits, while still
functioning with implementations that already implement the embedded-hal
traits.

Co-authored-by: Ulf Lilleengen <lulf@redhat.com>
 2022-01-03 14:17:21 +00:00
bors[bot]
c0e94a7042
Merge #563 
563: Initial ADC support for on STM32F1xx  r=Dirbaio a=sjoerdsimons

Add an ADC implementation for F1 based chips. Primarily tested using ADC1, proper functionality for ADC2 probably needs some extra work as it's mainly a slave and can't e.g. measure vrefint by itself.

Needs https://github.com/embassy-rs/stm32-data/pull/115

Co-authored-by: Sjoerd Simons <sjoerd@collabora.com>
Co-authored-by: Dario Nieuwenhuis <dirbaio@dirbaio.net>
 2022-01-01 11:45:23 +00:00
bors[bot]
c20ef419a6
Merge #558 
558: Port buffered uart to v1 stm32 hardware r=Dirbaio a=DCNick3

#526 seems to suggest that it will be rewritten for DMA support, but I am not sure how to implement it and the port was quite straightforward, so here it is. It might be immediately useful before DMA version will be implemented

Note that I have not tested this on v2 hardware

Co-authored-by: Nikita Strygin <nikita6@bk.ru>
 2022-01-01 10:51:14 +00:00
Sjoerd Simons
92f2c6d09c adc: Implement support for f1 ADC block 
Add basic support for the STM32F1xx ADC blocks.
 2021-12-30 10:51:54 +01:00
Sjoerd Simons
a93b1141e9 stm32f1: Store adc clock rate in Clocks struct 2021-12-30 10:50:28 +01:00
Ben Gamari
8da6471a50 stm32/dac: Fix disable_channel 
Previously disable_channel enabled rather than disabled the requested
channel due to an apparent copy-paste error. Refactor to eliminate this
sort of issue by construction.
 2021-12-28 23:27:59 -05:00
Nikita Strygin
a94932be02 Mark clear_interrupt_flag as unsafe 2021-12-26 18:29:41 +03:00
Nikita Strygin
6b08c70273 Port buffered uart to v1 stm32 hardware 
- No DMA
- Create clear_interrupt_flag function to
    handle differences between v1 and v2 hardware
 2021-12-26 18:13:19 +03:00
Dario Nieuwenhuis
d1740b10f0 Lower some verbose logs to trace. 2021-12-23 13:43:14 +01:00
Ulf Lilleengen
3811c0a401 Add adapter for implementing async traits for blocking types 
This allows writing drivers relying on async traits, while still
functioning with implementations that already implement the embedded-hal
traits.

Add examples to stm32l4 for using this feature.
 2021-12-17 12:54:51 +01:00
Ulf Lilleengen
2bbd1ddb8a Remove unneeded rustfmt::skip 2021-12-16 11:37:53 +01:00
Ulf Lilleengen
985c11fad5 Update rust-toolchain 2021-12-16 11:34:20 +01:00
bors[bot]
d5a3064c2c
Merge #540 
540: Initial support for STM32F3 r=Dirbaio a=VasanthakumarV

The [companion PR](https://github.com/embassy-rs/stm32-data/pull/109) in `stm32-data` should be merged before this PR.
The examples were tested on an STM32F303VC MCU.

Co-authored-by: VasanthakumarV <vasanth260m12@gmail.com>
Co-authored-by: Dario Nieuwenhuis <dirbaio@dirbaio.net>
 2021-12-16 07:30:03 +00:00
Grant Miller
6597e67036 Add finish_dma function 2021-12-14 17:46:25 -06:00
Grant Miller
a13a7a6616 Replace wait_for_idle with spin_until_idle 2021-12-14 17:46:25 -06:00
Grant Miller
e75cb1a564 Regs type alias 2021-12-14 15:39:00 -06:00
Grant Miller
b06658c195 Refactor new 2021-12-14 15:39:00 -06:00
VasanthakumarV
78c5d65ca9 [lint] Add newline in pwr file 2021-12-13 18:16:58 +05:30
VasanthakumarV
3f33d307ff [feature] Add rcc register support for F3 2021-12-13 14:50:13 +05:30
VasanthakumarV
e2c074d133 [feature] Add pwr register support for F3 2021-12-13 13:49:41 +05:30
VasanthakumarV
7733d11f90 [generate] Add stm32f3 chips to the Cargo manifest 2021-12-13 13:49:41 +05:30
huntc
45ef944457 Stm flush required implementing also, along with std alloc split 2021-12-10 15:11:41 +11:00