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Author SHA1 Message Date
Dario Nieuwenhuis
e613324e16 stm32/eth: rename new_rmii to new, update metapac to fix issues with PC2_C. 2024-02-01 01:39:52 +01:00
Simon B. Gasse
42d8f3930a Implement MII interface 
- Extend the eth/v2 module to support MII besides RMII.
- Replace `Ethernet::new` with `Ethernet::new_mii` and
  `Ethernet::new_rmii`.
- Update ethernet examples.
- Add example for MII ethernet.
 2024-02-01 01:33:34 +01:00
Corey Schuhen
1de78d0490 Initial FDCAN driver implementation. 
Original author:
    Torin Cooper-Bennun <tcbennun@maxiluxsystems.com>

Cleanup and documentaion by:
    Tomasz bla Fortuna <bla@reactor.local>
    Corey Schuhen <cschuhen@gmail.com>

Use new PAC method now that the names are common.

Use broken out definitions that can be shared with bxcan

Populate Rx struct with an embassy timestamp.

Remove use of RefCell.

As per review comment. - THis will probably get squashed down.

Fix
 2024-01-31 05:40:05 +10:00
Tomasz bla Fortuna
03ba45065e Add FDCAN clock registers to G4 RCC. 
Author: Adam Morgan <adam@luci.com>

Break definitions out of bxcan that can be used innm fdcan.

Typo
 2024-01-31 05:40:05 +10:00
Tomasz bla Fortuna
a91a7a8557 Add FDCAN dependency in correct flavor based on selected chip. 
Author: Torin Cooper-Bennun <tcbennun@maxiluxsystems.com>

Change from review.
 2024-01-31 05:40:05 +10:00
Dario Nieuwenhuis
5b2293e2b1 update stm32-metapac. 2024-01-30 02:34:12 +01:00
Dario Nieuwenhuis
3387ee7238 stm32/gpio: remove generics. 2024-01-22 21:31:06 +01:00
Dario Nieuwenhuis
43b6258a69
Merge pull request #2416 from andresv/stm32-fix-buffered-uart-flush 
stm32: fix buffered uart flush
 2024-01-20 01:50:55 +00:00
Dario Nieuwenhuis
67159d80bb
Merge pull request #2429 from jr-oss/stm32_simple_pwm_add_set_output_compare_mode 
stm32/simple_pwm: add set_output_compare_mode
 2024-01-20 01:33:49 +00:00
Dario Nieuwenhuis
326bff322e
Merge pull request #2415 from hdoordt/patch-1 
Make adc::Resolution::to_max_count const
 2024-01-20 01:31:22 +00:00
Andres Vahter
ec2e3de0f4 stm32 uart: fix buffered flush for usart_v1, usart_v2 
There is one caveat. For some reason with first send using usart_v1/usart_v2 TC flag appears right after first byte from buffer is written to DR. Consecutive transfers work as expected - TC flag appears when last byte is fully transferred to wire.
 2024-01-20 00:15:40 +01:00
Andres Vahter
534c53c901 stm32 uart: remove unwrap 
unwraps take more space because of panics
 2024-01-20 00:15:40 +01:00
Andres Vahter
c936d66934 stm32 uart: fix flush for non usart_v4 variants 
Byte was written to TDR and right after that waker was called. This means `flush` would see that `tx_buf` is empty and can return Ready although actually hardware was still writing this last byte to the wire.
With this change non `usart_v4 ` variants would also use TC interrupt to check when last byte was sent out.
 2024-01-20 00:15:39 +01:00
Andres Vahter
17d6e4eefe stm32 uart: do not wake after sending each byte 
usart_v4 uses TC interrupt to see if all bytes are sent out from the FIFO and waker is called from this interrupt. This minimises unnecessary wakeups during sending.
 2024-01-20 00:15:39 +01:00
Andres Vahter
ec47e931ac stm32: fix buffered uart flush 
usart_v4 uses internal FIFO and therefore actually all bytes are not yet sent out although state.tx_buf.is_empty()
 2024-01-20 00:15:39 +01:00
Harry Brooke
d781e231cd make usart::State private 2024-01-19 23:20:20 +01:00
Dario Nieuwenhuis
9cd0beaee3
Merge pull request #2450 from shufps/feat/timer-driver-tim22-tim23 
adds timer-driver for tim21 and tim22 (on L0)
 2024-01-15 12:01:22 +01:00
shufps
e969b88e5a fixed trailing white spaces 2024-01-15 11:23:41 +01:00
shufps
2b64913664 fixed tim21 2024-01-15 08:11:35 +01:00
shufps
4e2361c024 adds timer-driver for tim21 and tim22 (on L0) 2024-01-15 08:11:22 +01:00
Dario Nieuwenhuis
583555bc8a Suppress "unused" warnings. 2024-01-14 23:20:51 +01:00
shufps
018c48cf1c changes to get usb working on a L1. Adds a usb_serial example too 2024-01-14 22:43:22 +01:00
Dario Nieuwenhuis
4c23f197b3 Fix invalid "async" crates.io category. 2024-01-12 00:39:01 +01:00
Dario Nieuwenhuis
6a1c415a4c Complete cargo.tomls more. 2024-01-12 00:32:47 +01:00
Dario Nieuwenhuis
9f6517e408 stm32,nrf: add warning on docs.rs directing the user to docs.embassy.dev. 2024-01-11 23:43:17 +01:00
Dario Nieuwenhuis
5304994363 Add docs.rs metadata to all crates. 2024-01-11 23:17:02 +01:00
Dario Nieuwenhuis
22197320ff bump embassy-time 0.3, embassy-executor 0.5, embassy-net 0.4. 2024-01-11 23:01:24 +01:00
Dario Nieuwenhuis
b3ab2d91f7 stm32: use released metapac. 2024-01-11 22:05:01 +01:00
Dario Nieuwenhuis
e18d673721 More readme fixes. 2024-01-11 21:23:07 +01:00
Barnaby Walters
557399e2d6 Included README.md in docs 2024-01-11 20:00:33 +01:00
Barnaby Walters
1697386820 Correction from review 2024-01-11 19:57:24 +01:00
Barnaby Walters
ccf61f50fe Corrections from review 2024-01-11 19:55:15 +01:00
Barnaby Walters
4caafe10ae Expanded readme for crates release 2024-01-11 19:49:05 +01:00
Dario Nieuwenhuis
15f94fb0fc time: split driver into a separate embassy-time-driver crate. 2024-01-11 16:56:08 +01:00
Ralf
db776c9623 stm32/simple_pwm: add set_output_compare_mode 2024-01-10 18:48:26 +01:00
Dario Nieuwenhuis
3bc6e414f7 stm32: update metapac. 2024-01-10 18:06:47 +01:00
Dario Nieuwenhuis
495b8b739a Change GPIO inherent methods back to &self. 
With the embedded-hal rc3 update I changed them to require `&mut self`, but
in retrospect I think `&self` is better, for extra flexibility.

This PR reverts the changes from the rc3 update to inherent methods.
 2024-01-10 00:00:10 +01:00
Dario Nieuwenhuis
c9ac39df94 Update embedded-hal to v1.0 2024-01-09 23:37:14 +01:00
Henk Oordt
45b7645525
Make adc::Resolution::to_max_count const 2024-01-08 13:56:21 +01:00
Dario Nieuwenhuis
294046cddb
Merge pull request #2405 from Sizurka/stm32g0-usb 
stm32: Add G0 USB RCC and example
 2024-01-06 00:03:54 +00:00
Dario Nieuwenhuis
208ad8fbfc stm32/flash: add support for f1. 2024-01-05 23:49:10 +01:00
Derek Hageman
801a36c7b4 stm32: Add G0 USB RCC 
Add configuration for STM32G0 USB clock.
 2024-01-05 07:56:22 -07:00
Dario Nieuwenhuis
03ba4ae386 stm32: update metapac. 2024-01-03 18:39:22 +01:00
Tyler Gilbert
7944e854dd Fix formatting of comments 2024-01-03 11:07:57 -06:00
Tyler
727906fa04
Update u5.rs 
Update comments on p and q divider values to correctly describe what the clock outputs are used for.
 2024-01-03 11:04:48 -06:00
Tyler Gilbert
31bf127807 Update STM32 RCC U5 to support P and Q dividers 2024-01-03 10:46:45 -06:00
Dario Nieuwenhuis
5fb6ad9a6a update stm32data, fixes missing interrupts. 2024-01-03 02:10:42 +01:00
Adin Ackerman
d372cba266 additional chip variants required more clocks 2024-01-02 16:25:51 -08:00
Adin Ackerman
34713b4910 fix g0 being left out of some clock controls 2024-01-02 16:03:23 -08:00
Christian Enderle
7f00d7aa0c allow unused variable 2024-01-02 23:29:33 +01:00