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Author SHA1 Message Date
Henrik Alsér
f30ff9cadc Shared buses with SetConfig 2022-07-08 15:47:47 +02:00
bors[bot]
6baddaf539
Merge #845 
845: Add blocking shared bus for i2c and SPI r=Dirbaio a=kalkyl

Blocking versions of the shared buses

Co-authored-by: Henrik Alsér <henrik.alser@me.com>
Co-authored-by: Dario Nieuwenhuis <dirbaio@dirbaio.net>
 2022-07-06 14:59:29 +00:00
Dario Nieuwenhuis
455374b7f9 spi shared bus: assert/deassert CS inside the lock. 2022-07-06 16:57:29 +02:00
Henrik Alsér
ba2412ff7e Mutex for SPI 2022-07-06 03:47:55 +02:00
Henrik Alsér
d3d82ad87d Mutex 2022-07-06 03:31:21 +02:00
Henrik Alsér
264b32d71b Add blocking shared bus for i2c and SPI 2022-07-06 02:35:46 +02:00
bors[bot]
5fef527764
Merge #844 
844: Use correct chip family name for example r=Dirbaio a=lulf

bors r+

Co-authored-by: Ulf Lilleengen <lulf@redhat.com>
 2022-07-05 11:51:18 +00:00
Ulf Lilleengen
6f425d7721 Use correct chip family name for example 2022-07-05 13:17:55 +02:00
bors[bot]
87e3ae321b
Merge #843 
843: Document configuration options and handle optional downlink r=lulf a=lulf



Co-authored-by: Ulf Lilleengen <lulf@redhat.com>
 2022-07-04 08:59:06 +00:00
Ulf Lilleengen
daf3ea24d7 Document configuration options and handle optional downlink 2022-07-04 10:33:29 +02:00
bors[bot]
0ed4e57ea4
Merge #838 
838: embassy-boot touchups r=lulf a=FrozenDroid



Co-authored-by: Vincent Stakenburg <v.stakenburg@cosinuss.nl>
 2022-06-30 12:59:41 +00:00
Vincent Stakenburg
3dc26bbe39 simplify set_magic 2022-06-30 14:56:40 +02:00
Vincent Stakenburg
0e55bb2a20 add log feature to embassy-boot-stm32 2022-06-30 14:56:36 +02:00
bors[bot]
2ee398b5d2
Merge #837 
837: Use base address for RAM for stm32 r=Dirbaio a=lulf



Co-authored-by: Ulf Lilleengen <lulf@redhat.com>
 2022-06-29 17:21:02 +00:00
Ulf Lilleengen
7b47bea72c Remove unused imports 2022-06-29 19:19:24 +02:00
Ulf Lilleengen
7b35b4ebee Fix RAM origin copy paste from nrf 2022-06-29 19:14:07 +02:00
bors[bot]
e0e675042b
Merge #803 
803: Initial independent watchdog implementation r=FrozenDroid a=FrozenDroid



Co-authored-by: Vincent Stakenburg <v.stakenburg@cosinuss.nl>
 2022-06-28 11:40:51 +00:00
Vincent Stakenburg
d1d07cd9e3 fix case when chip has multiple iwdg 2022-06-28 13:22:43 +02:00
Vincent Stakenburg
f2ad9c2d9d rebase and fix unborrow 2022-06-28 12:51:08 +02:00
Vincent Stakenburg
74bbf5aa02 address review 2022-06-28 12:46:17 +02:00
Vincent Stakenburg
5cf3fbece4 initial independent watchdog implementation 2022-06-28 12:46:17 +02:00
bors[bot]
c7703ba17c
Merge #831 
831: Move bootloader main to examples r=lulf a=lulf

This should remove some confusion around embassy-boot-* being a library
vs. a binary. The binary is now an example bootloader instead.

Co-authored-by: Ulf Lilleengen <ulf.lilleengen@gmail.com>
Co-authored-by: Ulf Lilleengen <lulf@redhat.com>
 2022-06-27 12:46:19 +00:00
Ulf Lilleengen
f1f90b17b5 Add build.rs to detect armv6 2022-06-27 14:24:19 +02:00
Dario Nieuwenhuis
42bc510eff Remove STM32L485 "ghost chips" 2022-06-27 02:47:15 +02:00
Dario Nieuwenhuis
52abfba8eb
Merge pull request #836 from embassy-rs/fixes 
More misc fixes.
 2022-06-27 02:33:44 +02:00
Dario Nieuwenhuis
a855889f70 Update stm32-data 2022-06-27 02:10:01 +02:00
Dario Nieuwenhuis
edb9eedb45 stm32: add f100 to CI. 2022-06-26 23:56:44 +02:00
Dario Nieuwenhuis
948bb93dc2 docs: Add $COMMIT to git srclinks. 2022-06-26 23:55:38 +02:00
Dario Nieuwenhuis
065a1d097a cortex-m: document Interrupt changes depending on Cargo features. 2022-06-26 23:53:03 +02:00
Dario Nieuwenhuis
397722c328 stm32: fix f100 build. 2022-06-26 23:52:38 +02:00
bors[bot]
ffc32d3ddb
Merge #833 
833: nrf/uart: add support for tx-only and rx-only uart. r=Dirbaio a=Dirbaio

Allow creating UarteRx/UarteTx directly. This allows using uart unidirectionally
(rx-only or tx-only), without having to 'waste' a pin for the unused direction.

Co-authored-by: Dario Nieuwenhuis <dirbaio@dirbaio.net>
 2022-06-25 23:45:01 +00:00
Dario Nieuwenhuis
c460af62e0
Merge pull request #835 from embassy-rs/fixes 
Misc API and doc fixes.
 2022-06-26 01:09:53 +02:00
Dario Nieuwenhuis
5903e08f4b embassy: add missing docs, add warn(missing_docs). 2022-06-26 00:53:35 +02:00
Dario Nieuwenhuis
f4e2686eca embassy: Improve RawMutex docs, mark it as unsafe. 2022-06-26 00:35:30 +02:00
Dario Nieuwenhuis
17cab1a2d4 embassy: Clippy fixes. 2022-06-26 00:14:28 +02:00
Dario Nieuwenhuis
935def4a0b executor: mark task_from_waker as safe. 2022-06-26 00:13:31 +02:00
Dario Nieuwenhuis
29cdb91b13
Merge pull request #834 from embassy-rs/cortex-m-executor-reexport 
cortex-m: reexport all items from embassy::executor.
 2022-06-26 00:11:06 +02:00
Dario Nieuwenhuis
e7584ccbfa cortex-m: reexport all items from embassy::executor. 2022-06-25 23:55:40 +02:00
Dario Nieuwenhuis
0beea82f40 nrf/uart: add support for tx-only and rx-only uart. 
Allow creating UarteRx/UarteTx directly. This allows using uart unidirectionally
(rx-only or tx-only), without having to 'waste' a pin for the unused direction.
 2022-06-25 23:54:00 +02:00
bors[bot]
a51df0dec6
Merge #824 
824: embassy/time: round up by default in duration conversions. Fixes #823 r=Dirbaio a=Dirbaio



Co-authored-by: Dario Nieuwenhuis <dirbaio@dirbaio.net>
 2022-06-24 21:29:29 +00:00
Dario Nieuwenhuis
571e4f2b01 embassy/time: round up by default in Duration::from_*. Fixes #823 2022-06-24 23:27:46 +02:00
Ulf Lilleengen
776be79f7b Move bootloader main to examples 
This should remove some confusion around embassy-boot-* being a library
vs. a binary. The binary is now an example bootloader instead.
 2022-06-24 19:56:15 +02:00
bors[bot]
0ec32d53ed
Merge #828 
828: More API docs r=lulf a=lulf

embassy-cortex-m is covered now, making some progress on embassy-nrf, but not complete.

Co-authored-by: Ulf Lilleengen <lulf@redhat.com>
 2022-06-24 17:23:25 +00:00
Ulf Lilleengen
ca59c1ff35 Add more API docs for embassy-cortex-m and embassy-nrf 2022-06-23 13:17:56 +02:00
Ulf Lilleengen
6d3a652026 Fix new warnings for embassy docs 2022-06-23 13:01:10 +02:00
bors[bot]
84628d36cf
Merge #826 
826: Bump bxcan version r=chemicstry a=chemicstry



Co-authored-by: chemicstry <chemicstry@gmail.com>
 2022-06-22 23:48:45 +00:00
bors[bot]
cf69f78162
Merge #827 
827: Fix PWM for advanced timers r=Dirbaio a=chemicstry

Advanced timers have additional BDTR register, which has a global output enable bit and it is disabled by default.

Also added an example for F4, but it will only work once https://github.com/embassy-rs/stm32-data/pull/149 is merged. We can also move it to some other chip, but I don't have anything else to test on atm.

Co-authored-by: chemicstry <chemicstry@gmail.com>
 2022-06-22 23:33:29 +00:00
chemicstry
88c3737722 Simplify example 2022-06-23 02:30:55 +03:00
chemicstry
3cdd8c1aeb Fix PWM for advanced timers 2022-06-23 02:27:39 +03:00
chemicstry
31177d994f Fix example 2022-06-23 02:01:23 +03:00