167 lines
5.2 KiB
Rust
167 lines
5.2 KiB
Rust
//! Async I2C API
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//!
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//! This API supports 7-bit and 10-bit addresses. Traits feature an `AddressMode`
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//! marker type parameter. Two implementation of the `AddressMode` exist:
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//! `SevenBitAddress` and `TenBitAddress`.
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//!
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//! Through this marker types it is possible to implement each address mode for
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//! the traits independently in `embedded-hal` implementations and device drivers
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//! can depend only on the mode that they support.
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//!
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//! Additionally, the I2C 10-bit address mode has been developed to be fully
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//! backwards compatible with the 7-bit address mode. This allows for a
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//! software-emulated 10-bit addressing implementation if the address mode
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//! is not supported by the hardware.
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//!
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//! Since 7-bit addressing is the mode of the majority of I2C devices,
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//! `SevenBitAddress` has been set as default mode and thus can be omitted if desired.
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//!
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//! ### Device driver compatible only with 7-bit addresses
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//!
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//! For demonstration purposes the address mode parameter has been omitted in this example.
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//!
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//! ```
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//! # use embedded_hal::blocking::i2c::WriteRead;
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//! const ADDR: u8 = 0x15;
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//! # const TEMP_REGISTER: u8 = 0x1;
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//! pub struct TemperatureSensorDriver<I2C> {
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//! i2c: I2C,
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//! }
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//!
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//! impl<I2C, E> TemperatureSensorDriver<I2C>
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//! where
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//! I2C: WriteRead<Error = E>,
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//! {
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//! pub fn read_temperature(&mut self) -> Result<u8, E> {
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//! let mut temp = [0];
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//! self.i2c
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//! .write_read(ADDR, &[TEMP_REGISTER], &mut temp)
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//! .await
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//! .and(Ok(temp[0]))
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//! }
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//! }
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//! ```
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//!
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//! ### Device driver compatible only with 10-bit addresses
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//!
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//! ```
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//! # use embedded_hal::blocking::i2c::{TenBitAddress, WriteRead};
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//! const ADDR: u16 = 0x158;
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//! # const TEMP_REGISTER: u8 = 0x1;
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//! pub struct TemperatureSensorDriver<I2C> {
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//! i2c: I2C,
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//! }
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//!
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//! impl<I2C, E> TemperatureSensorDriver<I2C>
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//! where
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//! I2C: WriteRead<TenBitAddress, Error = E>,
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//! {
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//! pub fn read_temperature(&mut self) -> Result<u8, E> {
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//! let mut temp = [0];
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//! self.i2c
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//! .write_read(ADDR, &[TEMP_REGISTER], &mut temp)
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//! .await
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//! .and(Ok(temp[0]))
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//! }
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//! }
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//! ```
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use core::future::Future;
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mod private {
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pub trait Sealed {}
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}
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/// Address mode (7-bit / 10-bit)
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///
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/// Note: This trait is sealed and should not be implemented outside of this crate.
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pub trait AddressMode: private::Sealed {}
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/// 7-bit address mode type
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pub type SevenBitAddress = u8;
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/// 10-bit address mode type
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pub type TenBitAddress = u16;
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impl private::Sealed for SevenBitAddress {}
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impl private::Sealed for TenBitAddress {}
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impl AddressMode for SevenBitAddress {}
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impl AddressMode for TenBitAddress {}
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pub trait I2c<A: AddressMode = SevenBitAddress> {
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/// Error type
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type Error;
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type ReadFuture<'a>: Future<Output = Result<(), Self::Error>> + 'a;
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type WriteFuture<'a>: Future<Output = Result<(), Self::Error>> + 'a;
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type WriteReadFuture<'a>: Future<Output = Result<(), Self::Error>> + 'a;
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/// Reads enough bytes from slave with `address` to fill `buffer`
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///
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/// # I2C Events (contract)
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///
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/// ``` text
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/// Master: ST SAD+R MAK MAK ... NMAK SP
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/// Slave: SAK B0 B1 ... BN
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/// ```
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///
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/// Where
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///
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/// - `ST` = start condition
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/// - `SAD+R` = slave address followed by bit 1 to indicate reading
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/// - `SAK` = slave acknowledge
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/// - `Bi` = ith byte of data
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/// - `MAK` = master acknowledge
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/// - `NMAK` = master no acknowledge
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/// - `SP` = stop condition
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fn read<'a>(&'a mut self, address: A, buffer: &mut [u8]) -> Self::ReadFuture<'a>;
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/// Sends bytes to slave with address `address`
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///
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/// # I2C Events (contract)
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///
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/// ``` text
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/// Master: ST SAD+W B0 B1 ... BN SP
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/// Slave: SAK SAK SAK ... SAK
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/// ```
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///
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/// Where
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///
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/// - `ST` = start condition
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/// - `SAD+W` = slave address followed by bit 0 to indicate writing
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/// - `SAK` = slave acknowledge
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/// - `Bi` = ith byte of data
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/// - `SP` = stop condition
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fn write<'a>(&'a mut self, address: A, bytes: &[u8]) -> Self::WriteFuture<'a>;
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/// Sends bytes to slave with address `address` and then reads enough bytes to fill `buffer` *in a
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/// single transaction*
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///
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/// # I2C Events (contract)
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///
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/// ``` text
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/// Master: ST SAD+W O0 O1 ... OM SR SAD+R MAK MAK ... NMAK SP
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/// Slave: SAK SAK SAK ... SAK SAK I0 I1 ... IN
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/// ```
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///
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/// Where
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///
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/// - `ST` = start condition
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/// - `SAD+W` = slave address followed by bit 0 to indicate writing
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/// - `SAK` = slave acknowledge
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/// - `Oi` = ith outgoing byte of data
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/// - `SR` = repeated start condition
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/// - `SAD+R` = slave address followed by bit 1 to indicate reading
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/// - `Ii` = ith incoming byte of data
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/// - `MAK` = master acknowledge
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/// - `NMAK` = master no acknowledge
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/// - `SP` = stop condition
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fn write_read<'a>(
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&'a mut self,
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address: A,
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bytes: &[u8],
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buffer: &mut [u8],
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) -> Self::WriteReadFuture<'a>;
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}
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