forked from Mirror/Ryujinx
ec8d4f3af5
* Replace unicorn bindings with Nuget package * Use nameof for ValueSource args * Remove redundant code from test projects * Fix wrong values for EmuStart() Add notes to address this later again * Improve formatting * Fix formatting/alignment issues
325 lines
No EOL
12 KiB
C#
325 lines
No EOL
12 KiB
C#
#define Simd32
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using ARMeilleure.State;
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using NUnit.Framework;
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using System.Collections.Generic;
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namespace Ryujinx.Tests.Cpu
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{
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[Category("Simd32")]
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public sealed class CpuTestSimd32 : CpuTest32
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{
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#if Simd32
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#region "ValueSource (Opcodes)"
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private static uint[] _Vabs_Vneg_Vpaddl_I_()
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{
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return new[]
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{
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0xf3b10300u, // VABS.S8 D0, D0
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0xf3b10380u, // VNEG.S8 D0, D0
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0xf3b00200u // VPADDL.S8 D0, D0
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};
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}
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private static uint[] _Vabs_Vneg_F_()
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{
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return new[]
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{
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0xf3b90700u, // VABS.F32 D0, D0
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0xf3b90780u // VNEG.F32 D0, D0
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};
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}
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#endregion
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#region "ValueSource (Types)"
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private static ulong[] _8B4H2S_()
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{
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return new[] { 0x0000000000000000ul, 0x7F7F7F7F7F7F7F7Ful,
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0x8080808080808080ul, 0x7FFF7FFF7FFF7FFFul,
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0x8000800080008000ul, 0x7FFFFFFF7FFFFFFFul,
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0x8000000080000000ul, 0xFFFFFFFFFFFFFFFFul };
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}
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private static IEnumerable<ulong> _1S_F_()
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{
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yield return 0x00000000FF7FFFFFul; // -Max Normal (float.MinValue)
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yield return 0x0000000080800000ul; // -Min Normal
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yield return 0x00000000807FFFFFul; // -Max Subnormal
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yield return 0x0000000080000001ul; // -Min Subnormal (-float.Epsilon)
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yield return 0x000000007F7FFFFFul; // +Max Normal (float.MaxValue)
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yield return 0x0000000000800000ul; // +Min Normal
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yield return 0x00000000007FFFFFul; // +Max Subnormal
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yield return 0x0000000000000001ul; // +Min Subnormal (float.Epsilon)
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if (!NoZeros)
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{
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yield return 0x0000000080000000ul; // -Zero
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yield return 0x0000000000000000ul; // +Zero
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}
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if (!NoInfs)
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{
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yield return 0x00000000FF800000ul; // -Infinity
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yield return 0x000000007F800000ul; // +Infinity
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}
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if (!NoNaNs)
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{
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yield return 0x00000000FFC00000ul; // -QNaN (all zeros payload) (float.NaN)
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yield return 0x00000000FFBFFFFFul; // -SNaN (all ones payload)
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yield return 0x000000007FC00000ul; // +QNaN (all zeros payload) (-float.NaN) (DefaultNaN)
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yield return 0x000000007FBFFFFFul; // +SNaN (all ones payload)
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}
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for (int cnt = 1; cnt <= RndCnt; cnt++)
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{
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ulong grbg = TestContext.CurrentContext.Random.NextUInt();
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ulong rnd1 = GenNormalS();
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ulong rnd2 = GenSubnormalS();
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yield return (grbg << 32) | rnd1;
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yield return (grbg << 32) | rnd2;
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}
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}
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private static IEnumerable<ulong> _2S_F_()
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{
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yield return 0xFF7FFFFFFF7FFFFFul; // -Max Normal (float.MinValue)
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yield return 0x8080000080800000ul; // -Min Normal
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yield return 0x807FFFFF807FFFFFul; // -Max Subnormal
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yield return 0x8000000180000001ul; // -Min Subnormal (-float.Epsilon)
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yield return 0x7F7FFFFF7F7FFFFFul; // +Max Normal (float.MaxValue)
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yield return 0x0080000000800000ul; // +Min Normal
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yield return 0x007FFFFF007FFFFFul; // +Max Subnormal
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yield return 0x0000000100000001ul; // +Min Subnormal (float.Epsilon)
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if (!NoZeros)
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{
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yield return 0x8000000080000000ul; // -Zero
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yield return 0x0000000000000000ul; // +Zero
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}
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if (!NoInfs)
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{
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yield return 0xFF800000FF800000ul; // -Infinity
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yield return 0x7F8000007F800000ul; // +Infinity
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}
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if (!NoNaNs)
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{
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yield return 0xFFC00000FFC00000ul; // -QNaN (all zeros payload) (float.NaN)
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yield return 0xFFBFFFFFFFBFFFFFul; // -SNaN (all ones payload)
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yield return 0x7FC000007FC00000ul; // +QNaN (all zeros payload) (-float.NaN) (DefaultNaN)
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yield return 0x7FBFFFFF7FBFFFFFul; // +SNaN (all ones payload)
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}
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for (int cnt = 1; cnt <= RndCnt; cnt++)
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{
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ulong rnd1 = GenNormalS();
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ulong rnd2 = GenSubnormalS();
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yield return (rnd1 << 32) | rnd1;
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yield return (rnd2 << 32) | rnd2;
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}
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}
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private static IEnumerable<ulong> _1D_F_()
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{
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yield return 0xFFEFFFFFFFFFFFFFul; // -Max Normal (double.MinValue)
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yield return 0x8010000000000000ul; // -Min Normal
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yield return 0x800FFFFFFFFFFFFFul; // -Max Subnormal
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yield return 0x8000000000000001ul; // -Min Subnormal (-double.Epsilon)
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yield return 0x7FEFFFFFFFFFFFFFul; // +Max Normal (double.MaxValue)
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yield return 0x0010000000000000ul; // +Min Normal
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yield return 0x000FFFFFFFFFFFFFul; // +Max Subnormal
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yield return 0x0000000000000001ul; // +Min Subnormal (double.Epsilon)
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if (!NoZeros)
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{
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yield return 0x8000000000000000ul; // -Zero
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yield return 0x0000000000000000ul; // +Zero
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}
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if (!NoInfs)
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{
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yield return 0xFFF0000000000000ul; // -Infinity
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yield return 0x7FF0000000000000ul; // +Infinity
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}
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if (!NoNaNs)
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{
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yield return 0xFFF8000000000000ul; // -QNaN (all zeros payload) (double.NaN)
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yield return 0xFFF7FFFFFFFFFFFFul; // -SNaN (all ones payload)
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yield return 0x7FF8000000000000ul; // +QNaN (all zeros payload) (-double.NaN) (DefaultNaN)
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yield return 0x7FF7FFFFFFFFFFFFul; // +SNaN (all ones payload)
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}
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for (int cnt = 1; cnt <= RndCnt; cnt++)
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{
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ulong rnd1 = GenNormalD();
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ulong rnd2 = GenSubnormalD();
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yield return rnd1;
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yield return rnd2;
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}
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}
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private static IEnumerable<ulong> _GenPopCnt8B_()
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{
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for (ulong cnt = 0ul; cnt <= 255ul; cnt++)
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{
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yield return (cnt << 56) | (cnt << 48) | (cnt << 40) | (cnt << 32) |
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(cnt << 24) | (cnt << 16) | (cnt << 08) | cnt;
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}
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}
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#endregion
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private const int RndCnt = 2;
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private static readonly bool NoZeros = false;
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private static readonly bool NoInfs = false;
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private static readonly bool NoNaNs = false;
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[Test, Pairwise, Description("SHA256SU0.32 <Qd>, <Qm>")]
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public void Sha256su0_V([Values(0xF3BA03C0u)] uint opcode,
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[Values(0u)] uint rd,
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[Values(2u)] uint rm,
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[Values(0x9BCBBF7443FB4F91ul)] ulong z0,
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[Values(0x482C58A58CBCBD59ul)] ulong z1,
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[Values(0xA0099B803625F82Aul)] ulong a0,
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[Values(0x1AA3B0B4E1AB4C8Cul)] ulong a1,
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[Values(0x29A44D72598F15F3ul)] ulong resultL,
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[Values(0x74CED221E2793F07ul)] ulong resultH)
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{
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opcode |= ((rd & 0xf) << 12) | ((rd & 0x10) << 18);
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opcode |= ((rm & 0xf) << 0) | ((rm & 0x10) << 1);
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V128 v0 = MakeVectorE0E1(z0, z1);
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V128 v1 = MakeVectorE0E1(a0, a1);
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ExecutionContext context = SingleOpcode(opcode, v0: v0, v1: v1, runUnicorn: false);
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Assert.Multiple(() =>
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{
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Assert.That(GetVectorE0(context.GetV(0)), Is.EqualTo(resultL));
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Assert.That(GetVectorE1(context.GetV(0)), Is.EqualTo(resultH));
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});
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// Unicorn does not yet support hash instructions in A32.
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// CompareAgainstUnicorn();
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}
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[Test, Pairwise]
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public void Vabs_Vneg_Vpaddl_V_I([ValueSource(nameof(_Vabs_Vneg_Vpaddl_I_))] uint opcode,
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[Range(0u, 3u)] uint rd,
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[Range(0u, 3u)] uint rm,
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[ValueSource(nameof(_8B4H2S_))] ulong z,
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[ValueSource(nameof(_8B4H2S_))] ulong b,
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[Values(0u, 1u, 2u)] uint size, // <S8, S16, S32>
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[Values] bool q)
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{
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if (q)
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{
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opcode |= 1 << 6;
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rd >>= 1; rd <<= 1;
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rm >>= 1; rm <<= 1;
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}
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opcode |= ((rd & 0xf) << 12) | ((rd & 0x10) << 18);
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opcode |= ((rm & 0xf) << 0) | ((rm & 0x10) << 1);
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opcode |= (size & 0x3) << 18;
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V128 v0 = MakeVectorE0E1(z, ~z);
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V128 v1 = MakeVectorE0E1(b, ~b);
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SingleOpcode(opcode, v0: v0, v1: v1);
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CompareAgainstUnicorn();
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}
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[Test, Pairwise]
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public void Vabs_Vneg_V_F32([ValueSource(nameof(_Vabs_Vneg_F_))] uint opcode,
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[Range(0u, 3u)] uint rd,
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[Range(0u, 3u)] uint rm,
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[ValueSource(nameof(_2S_F_))] ulong z,
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[ValueSource(nameof(_2S_F_))] ulong b,
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[Values] bool q)
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{
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if (q)
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{
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opcode |= 1 << 6;
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rd >>= 1; rd <<= 1;
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rm >>= 1; rm <<= 1;
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}
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opcode |= ((rd & 0xf) << 12) | ((rd & 0x10) << 18);
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opcode |= ((rm & 0xf) << 0) | ((rm & 0x10) << 1);
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V128 v0 = MakeVectorE0E1(z, ~z);
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V128 v1 = MakeVectorE0E1(b, ~b);
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SingleOpcode(opcode, v0: v0, v1: v1);
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CompareAgainstUnicorn();
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}
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[Test, Pairwise, Description("VCNT.8 D0, D0 | VCNT.8 Q0, Q0")]
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public void Vcnt([Values(0u, 1u)] uint rd,
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[Values(0u, 1u)] uint rm,
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[ValueSource(nameof(_GenPopCnt8B_))] ulong d0,
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[Values] bool q)
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{
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ulong d1 = ~d0; // It's expensive to have a second generator.
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uint opcode = 0xf3b00500u; // VCNT.8 D0, D0
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if (q)
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{
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opcode |= 1u << 6;
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rd &= ~1u;
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rm &= ~1u;
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}
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opcode |= ((rd & 0xf) << 12) | ((rd & 0x10) << 18);
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opcode |= ((rm & 0xf) << 0) | ((rm & 0x10) << 1);
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V128 v0 = MakeVectorE0E1(d0, d1);
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SingleOpcode(opcode, v0: v0);
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CompareAgainstUnicorn();
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}
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[Test, Pairwise]
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public void Vmovn_V([Range(0u, 3u)] uint rd,
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[Range(0u, 3u)] uint rm,
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[ValueSource(nameof(_8B4H2S_))] ulong z,
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[ValueSource(nameof(_8B4H2S_))] ulong b,
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[Values(0u, 1u, 2u, 3u)] uint op,
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[Values(0u, 1u, 2u)] uint size) // <S8, S16, S32>
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{
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rm >>= 1; rm <<= 1;
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uint opcode = 0xf3b20200u; // VMOVN.S16 D0, Q0
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opcode |= ((rd & 0xf) << 12) | ((rd & 0x10) << 18);
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opcode |= ((rm & 0xf) << 0) | ((rm & 0x10) << 1);
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opcode |= (op & 0x3) << 6;
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opcode |= (size & 0x3) << 18;
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V128 v0 = MakeVectorE0E1(z, ~z);
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V128 v1 = MakeVectorE0E1(b, ~b);
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SingleOpcode(opcode, v0: v0, v1: v1);
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CompareAgainstUnicorn();
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}
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#endif
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}
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} |