diff --git a/Ryujinx.Graphics.GAL/Capabilities.cs b/Ryujinx.Graphics.GAL/Capabilities.cs index 54a9ae3bf4..c7cedb34b5 100644 --- a/Ryujinx.Graphics.GAL/Capabilities.cs +++ b/Ryujinx.Graphics.GAL/Capabilities.cs @@ -6,6 +6,7 @@ namespace Ryujinx.Graphics.GAL public bool HasVectorIndexingBug { get; } public bool SupportsAstcCompression { get; } + public bool SupportsBgraFormat { get; } public bool SupportsR4G4Format { get; } public bool SupportsFragmentShaderInterlock { get; } public bool SupportsFragmentShaderOrderingIntel { get; } @@ -25,6 +26,7 @@ namespace Ryujinx.Graphics.GAL bool hasFrontFacingBug, bool hasVectorIndexingBug, bool supportsAstcCompression, + bool supportsBgraFormat, bool supportsR4G4Format, bool supportsFragmentShaderInterlock, bool supportsFragmentShaderOrderingIntel, @@ -42,6 +44,7 @@ namespace Ryujinx.Graphics.GAL HasFrontFacingBug = hasFrontFacingBug; HasVectorIndexingBug = hasVectorIndexingBug; SupportsAstcCompression = supportsAstcCompression; + SupportsBgraFormat = supportsBgraFormat; SupportsR4G4Format = supportsR4G4Format; SupportsFragmentShaderInterlock = supportsFragmentShaderInterlock; SupportsFragmentShaderOrderingIntel = supportsFragmentShaderOrderingIntel; diff --git a/Ryujinx.Graphics.Gpu/Shader/TextureDescriptorCapableGpuAccessor.cs b/Ryujinx.Graphics.Gpu/Shader/TextureDescriptorCapableGpuAccessor.cs index 50039a90ac..3a8ee67a94 100644 --- a/Ryujinx.Graphics.Gpu/Shader/TextureDescriptorCapableGpuAccessor.cs +++ b/Ryujinx.Graphics.Gpu/Shader/TextureDescriptorCapableGpuAccessor.cs @@ -36,6 +36,12 @@ namespace Ryujinx.Graphics.Gpu.Shader /// Host storage buffer alignment in bytes public int QueryHostStorageBufferOffsetAlignment() => _context.Capabilities.StorageBufferOffsetAlignment; + /// + /// Queries host support for texture formats with BGRA component order (such as BGRA8). + /// + /// True if BGRA formats are supported, false otherwise + public bool QueryHostSupportsBgraFormat() => _context.Capabilities.SupportsBgraFormat; + /// /// Queries host support for fragment shader ordering critical sections on the shader code. /// diff --git a/Ryujinx.Graphics.OpenGL/Renderer.cs b/Ryujinx.Graphics.OpenGL/Renderer.cs index 7806157dc1..d725eb7c18 100644 --- a/Ryujinx.Graphics.OpenGL/Renderer.cs +++ b/Ryujinx.Graphics.OpenGL/Renderer.cs @@ -104,6 +104,7 @@ namespace Ryujinx.Graphics.OpenGL hasFrontFacingBug: HwCapabilities.Vendor == HwCapabilities.GpuVendor.IntelWindows, hasVectorIndexingBug: HwCapabilities.Vendor == HwCapabilities.GpuVendor.AmdWindows, supportsAstcCompression: HwCapabilities.SupportsAstcCompression, + supportsBgraFormat: false, supportsR4G4Format: false, supportsFragmentShaderInterlock: HwCapabilities.SupportsFragmentShaderInterlock, supportsFragmentShaderOrderingIntel: HwCapabilities.SupportsFragmentShaderOrdering, diff --git a/Ryujinx.Graphics.Shader/IGpuAccessor.cs b/Ryujinx.Graphics.Shader/IGpuAccessor.cs index a6ccdedd5d..27f6f53b03 100644 --- a/Ryujinx.Graphics.Shader/IGpuAccessor.cs +++ b/Ryujinx.Graphics.Shader/IGpuAccessor.cs @@ -61,6 +61,11 @@ namespace Ryujinx.Graphics.Shader return 16; } + bool QueryHostSupportsBgraFormat() + { + return true; + } + bool QueryHostSupportsFragmentShaderInterlock() { return true; diff --git a/Ryujinx.Graphics.Shader/Translation/EmitterContext.cs b/Ryujinx.Graphics.Shader/Translation/EmitterContext.cs index 2f839b7adb..3dcb04ade9 100644 --- a/Ryujinx.Graphics.Shader/Translation/EmitterContext.cs +++ b/Ryujinx.Graphics.Shader/Translation/EmitterContext.cs @@ -167,6 +167,7 @@ namespace Ryujinx.Graphics.Shader.Translation this.Copy(dest, src); } + bool supportsBgra = Config.GpuAccessor.QueryHostSupportsBgraFormat(); int regIndexBase = 0; for (int rtIndex = 0; rtIndex < 8; rtIndex++) @@ -185,7 +186,7 @@ namespace Ryujinx.Graphics.Shader.Translation Operand src = Register(regIndexBase + component, RegisterType.Gpr); // Perform B <-> R swap if needed, for BGRA formats (not supported on OpenGL). - if (component == 0 || component == 2) + if (!supportsBgra && (component == 0 || component == 2)) { Operand isBgra = Attribute(AttributeConsts.FragmentOutputIsBgraBase + rtIndex * 4);