forked from Mirror/Ryujinx
aef25980a7
* Salieri: Add blacklist system and blacklist shaders using bindless Currently the shader cache doesn't have the right format to support bindless textures correctly and may cache shaders that it cannot rebuild after host invalidation. This PR address the issue by blacklisting shaders using bindless textures. THis also support detection of already cached broken shader and handle removal of those. * Move to a feature flags design to avoid intrusive changes in the translator This remove the auto correct behaviour * Reduce diff on TranslationFlags * Reduce comma on last entry of TranslationFlags * Fix inverted logic and remove leftovers * remove debug edits oops
285 lines
No EOL
9.3 KiB
C#
285 lines
No EOL
9.3 KiB
C#
using Ryujinx.Graphics.Shader.CodeGen.Glsl;
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using Ryujinx.Graphics.Shader.Decoders;
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using Ryujinx.Graphics.Shader.IntermediateRepresentation;
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using Ryujinx.Graphics.Shader.StructuredIr;
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using Ryujinx.Graphics.Shader.Translation.Optimizations;
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using System.Collections.Generic;
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using static Ryujinx.Graphics.Shader.IntermediateRepresentation.OperandHelper;
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namespace Ryujinx.Graphics.Shader.Translation
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{
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public static class Translator
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{
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private const int HeaderSize = 0x50;
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internal struct FunctionCode
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{
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public Operation[] Code { get; }
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public FunctionCode(Operation[] code)
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{
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Code = code;
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}
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}
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public static TranslatorContext CreateContext(
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ulong address,
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IGpuAccessor gpuAccessor,
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TranslationFlags flags,
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TranslationCounts counts = null)
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{
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counts ??= new TranslationCounts();
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Block[][] cfg = DecodeShader(address, gpuAccessor, flags, counts, out ShaderConfig config);
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return new TranslatorContext(address, cfg, config);
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}
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private static void ScanForBindless(BasicBlock[] blocks, ShaderConfig config)
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{
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for (int blkIndex = 0; blkIndex < blocks.Length; blkIndex++)
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{
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// Right now the guest shader cache cannot handle bindless textures correctly.
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for (LinkedListNode<INode> node = blocks[blkIndex].Operations.First; node != null; node = node.Next)
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{
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if (node.Value is TextureOperation texOp && (texOp.Flags & TextureFlags.Bindless) != 0)
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{
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config.SetUsedFeature(FeatureFlags.Bindless);
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break;
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}
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}
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}
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}
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internal static ShaderProgram Translate(FunctionCode[] functions, ShaderConfig config, out ShaderProgramInfo shaderProgramInfo)
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{
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var cfgs = new ControlFlowGraph[functions.Length];
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var frus = new RegisterUsage.FunctionRegisterUsage[functions.Length];
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for (int i = 0; i < functions.Length; i++)
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{
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cfgs[i] = ControlFlowGraph.Create(functions[i].Code);
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if (i != 0)
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{
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frus[i] = RegisterUsage.RunPass(cfgs[i]);
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}
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}
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Function[] funcs = new Function[functions.Length];
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for (int i = 0; i < functions.Length; i++)
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{
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var cfg = cfgs[i];
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int inArgumentsCount = 0;
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int outArgumentsCount = 0;
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if (i != 0)
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{
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var fru = frus[i];
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inArgumentsCount = fru.InArguments.Length;
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outArgumentsCount = fru.OutArguments.Length;
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}
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if (cfg.Blocks.Length != 0)
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{
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RegisterUsage.FixupCalls(cfg.Blocks, frus);
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Dominance.FindDominators(cfg);
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Dominance.FindDominanceFrontiers(cfg.Blocks);
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ScanForBindless(cfg.Blocks, config);
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Ssa.Rename(cfg.Blocks);
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Optimizer.RunPass(cfg.Blocks, config);
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Rewriter.RunPass(cfg.Blocks, config);
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}
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funcs[i] = new Function(cfg.Blocks, $"fun{i}", false, inArgumentsCount, outArgumentsCount);
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}
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StructuredProgramInfo sInfo = StructuredProgram.MakeStructuredProgram(funcs, config);
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GlslProgram program = GlslGenerator.Generate(sInfo, config);
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shaderProgramInfo = new ShaderProgramInfo(
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program.CBufferDescriptors,
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program.SBufferDescriptors,
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program.TextureDescriptors,
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program.ImageDescriptors,
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sInfo.UsesInstanceId);
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string glslCode = program.Code;
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return new ShaderProgram(config.Stage, glslCode);
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}
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private static Block[][] DecodeShader(
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ulong address,
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IGpuAccessor gpuAccessor,
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TranslationFlags flags,
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TranslationCounts counts,
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out ShaderConfig config)
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{
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Block[][] cfg;
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ulong maxEndAddress = 0;
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if ((flags & TranslationFlags.Compute) != 0)
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{
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config = new ShaderConfig(gpuAccessor, flags, counts);
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cfg = Decoder.Decode(gpuAccessor, address);
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}
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else
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{
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config = new ShaderConfig(new ShaderHeader(gpuAccessor, address), gpuAccessor, flags, counts);
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cfg = Decoder.Decode(gpuAccessor, address + HeaderSize);
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}
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for (int funcIndex = 0; funcIndex < cfg.Length; funcIndex++)
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{
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for (int blkIndex = 0; blkIndex < cfg[funcIndex].Length; blkIndex++)
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{
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Block block = cfg[funcIndex][blkIndex];
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if (maxEndAddress < block.EndAddress)
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{
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maxEndAddress = block.EndAddress;
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}
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for (int index = 0; index < block.OpCodes.Count; index++)
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{
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if (block.OpCodes[index] is OpCodeTextureBase texture)
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{
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config.TextureHandlesForCache.Add(texture.HandleOffset);
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}
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}
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}
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}
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config.SizeAdd((int)maxEndAddress + (flags.HasFlag(TranslationFlags.Compute) ? 0 : HeaderSize));
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return cfg;
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}
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internal static FunctionCode[] EmitShader(Block[][] cfg, ShaderConfig config)
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{
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Dictionary<ulong, int> funcIds = new Dictionary<ulong, int>();
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for (int funcIndex = 0; funcIndex < cfg.Length; funcIndex++)
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{
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funcIds.Add(cfg[funcIndex][0].Address, funcIndex);
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}
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List<FunctionCode> funcs = new List<FunctionCode>();
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for (int funcIndex = 0; funcIndex < cfg.Length; funcIndex++)
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{
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EmitterContext context = new EmitterContext(config, funcIndex != 0, funcIds);
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for (int blkIndex = 0; blkIndex < cfg[funcIndex].Length; blkIndex++)
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{
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Block block = cfg[funcIndex][blkIndex];
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context.CurrBlock = block;
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context.MarkLabel(context.GetLabel(block.Address));
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EmitOps(context, block);
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}
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funcs.Add(new FunctionCode(context.GetOperations()));
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}
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return funcs.ToArray();
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}
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private static void EmitOps(EmitterContext context, Block block)
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{
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for (int opIndex = 0; opIndex < block.OpCodes.Count; opIndex++)
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{
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OpCode op = block.OpCodes[opIndex];
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if ((context.Config.Flags & TranslationFlags.DebugMode) != 0)
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{
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string instName;
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if (op.Emitter != null)
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{
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instName = op.Emitter.Method.Name;
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}
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else
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{
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instName = "???";
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context.Config.GpuAccessor.Log($"Invalid instruction at 0x{op.Address:X6} (0x{op.RawOpCode:X16}).");
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}
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string dbgComment = $"0x{op.Address:X6}: 0x{op.RawOpCode:X16} {instName}";
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context.Add(new CommentNode(dbgComment));
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}
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if (op.NeverExecute)
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{
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continue;
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}
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Operand predSkipLbl = null;
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bool skipPredicateCheck = op is OpCodeBranch opBranch && !opBranch.PushTarget;
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if (op is OpCodeBranchPop opBranchPop)
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{
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// If the instruction is a SYNC or BRK instruction with only one
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// possible target address, then the instruction is basically
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// just a simple branch, we can generate code similar to branch
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// instructions, with the condition check on the branch itself.
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skipPredicateCheck = opBranchPop.Targets.Count < 2;
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}
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if (!(op.Predicate.IsPT || skipPredicateCheck))
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{
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Operand label;
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if (opIndex == block.OpCodes.Count - 1 && block.Next != null)
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{
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label = context.GetLabel(block.Next.Address);
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}
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else
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{
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label = Label();
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predSkipLbl = label;
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}
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Operand pred = Register(op.Predicate);
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if (op.InvertPredicate)
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{
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context.BranchIfTrue(label, pred);
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}
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else
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{
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context.BranchIfFalse(label, pred);
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}
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}
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context.CurrOp = op;
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op.Emitter?.Invoke(context);
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if (predSkipLbl != null)
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{
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context.MarkLabel(predSkipLbl);
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}
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}
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}
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}
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} |