forked from Mirror/Ryujinx
22b2cb39af
* Turn `MemoryOperand` into a struct
* Remove `IntrinsicOperation`
* Remove `PhiNode`
* Remove `Node`
* Turn `Operand` into a struct
* Turn `Operation` into a struct
* Clean up pool management methods
* Add `Arena` allocator
* Move `OperationHelper` to `Operation.Factory`
* Move `OperandHelper` to `Operand.Factory`
* Optimize `Operation` a bit
* Fix `Arena` initialization
* Rename `NativeList<T>` to `ArenaList<T>`
* Reduce `Operand` size from 88 to 56 bytes
* Reduce `Operation` size from 56 to 40 bytes
* Add optimistic interning of Register & Constant operands
* Optimize `RegisterUsage` pass a bit
* Optimize `RemoveUnusedNodes` pass a bit
Iterating in reverse-order allows killing dependency chains in a single
pass.
* Fix PPTC symbols
* Optimize `BasicBlock` a bit
Reduce allocations from `_successor` & `DominanceFrontiers`
* Fix `Operation` resize
* Make `Arena` expandable
Change the arena allocator to be expandable by allocating in pages, with
some of them being pooled. Currently 32 pages are pooled. An LRU removal
mechanism should probably be added to it.
Apparently MHR can allocate bitmaps large enough to exceed the 16MB
limit for the type.
* Move `Arena` & `ArenaList` to `Common`
* Remove `ThreadStaticPool` & co
* Add `PhiOperation`
* Reduce `Operand` size from 56 from 48 bytes
* Add linear-probing to `Operand` intern table
* Optimize `HybridAllocator` a bit
* Add `Allocators` class
* Tune `ArenaAllocator` sizes
* Add page removal mechanism to `ArenaAllocator`
Remove pages which have not been used for more than 5s after each reset.
I am on fence if this would be better using a Gen2 callback object like
the one in System.Buffers.ArrayPool<T>, to trim the pool. Because right
now if a large translation happens, the pages will be freed only after a
reset. This reset may not happen for a while because no new translation
is hit, but the arena base sizes are rather small.
* Fix `OOM` when allocating larger than page size in `ArenaAllocator`
Tweak resizing mechanism for Operand.Uses and Assignemnts.
* Optimize `Optimizer` a bit
* Optimize `Operand.Add<T>/Remove<T>` a bit
* Clean up `PreAllocator`
* Fix phi insertion order
Reduce codegen diffs.
* Fix code alignment
* Use new heuristics for degree of parallelism
* Suppress warnings
* Address gdkchan's feedback
Renamed `GetValue()` to `GetValueUnsafe()` to make it more clear that
`Operand.Value` should usually not be modified directly.
* Add fast path to `ArenaAllocator`
* Assembly for `ArenaAllocator.Allocate(ulong)`:
.L0:
mov rax, [rcx+0x18]
lea r8, [rax+rdx]
cmp r8, [rcx+0x10]
ja short .L2
.L1:
mov rdx, [rcx+8]
add rax, [rdx+8]
mov [rcx+0x18], r8
ret
.L2:
jmp ArenaAllocator.AllocateSlow(UInt64)
A few variable/field had to be changed to ulong so that RyuJIT avoids
emitting zero-extends.
* Implement a new heuristic to free pooled pages.
If an arena is used often, it is more likely that its pages will be
needed, so the pages are kept for longer (e.g: during PPTC rebuild or
burst sof compilations). If is not used often, then it is more likely
that its pages will not be needed (e.g: after PPTC rebuild or bursts
of compilations).
* Address riperiperi's feedback
* Use `EqualityComparer<T>` in `IntrusiveList<T>`
Avoids a potential GC hole in `Equals(T, T)`.
526 lines
18 KiB
C#
526 lines
18 KiB
C#
using ARMeilleure.Common;
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using ARMeilleure.Decoders;
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using ARMeilleure.Diagnostics;
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using ARMeilleure.Instructions;
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using ARMeilleure.IntermediateRepresentation;
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using ARMeilleure.Memory;
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using ARMeilleure.Signal;
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using ARMeilleure.State;
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using ARMeilleure.Translation.Cache;
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using ARMeilleure.Translation.PTC;
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using Ryujinx.Common;
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using System;
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using System.Collections.Concurrent;
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using System.Collections.Generic;
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using System.Diagnostics;
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using System.Threading;
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using static ARMeilleure.IntermediateRepresentation.Operand.Factory;
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namespace ARMeilleure.Translation
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{
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public class Translator
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{
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private static readonly AddressTable<ulong>.Level[] Levels64Bit =
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new AddressTable<ulong>.Level[]
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{
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new(31, 17),
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new(23, 8),
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new(15, 8),
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new( 7, 8),
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new( 2, 5)
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};
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private static readonly AddressTable<ulong>.Level[] Levels32Bit =
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new AddressTable<ulong>.Level[]
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{
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new(31, 17),
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new(23, 8),
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new(15, 8),
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new( 7, 8),
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new( 1, 6)
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};
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private readonly IJitMemoryAllocator _allocator;
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private readonly ConcurrentQueue<KeyValuePair<ulong, TranslatedFunction>> _oldFuncs;
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private readonly ConcurrentDictionary<ulong, object> _backgroundSet;
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private readonly ConcurrentStack<RejitRequest> _backgroundStack;
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private readonly AutoResetEvent _backgroundTranslatorEvent;
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private readonly ReaderWriterLock _backgroundTranslatorLock;
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internal ConcurrentDictionary<ulong, TranslatedFunction> Functions { get; }
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internal AddressTable<ulong> FunctionTable { get; }
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internal EntryTable<uint> CountTable { get; }
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internal TranslatorStubs Stubs { get; }
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internal IMemoryManager Memory { get; }
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private volatile int _threadCount;
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// FIXME: Remove this once the init logic of the emulator will be redone.
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public static readonly ManualResetEvent IsReadyForTranslation = new(false);
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public Translator(IJitMemoryAllocator allocator, IMemoryManager memory, bool for64Bits)
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{
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_allocator = allocator;
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Memory = memory;
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_oldFuncs = new ConcurrentQueue<KeyValuePair<ulong, TranslatedFunction>>();
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_backgroundSet = new ConcurrentDictionary<ulong, object>();
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_backgroundStack = new ConcurrentStack<RejitRequest>();
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_backgroundTranslatorEvent = new AutoResetEvent(false);
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_backgroundTranslatorLock = new ReaderWriterLock();
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JitCache.Initialize(allocator);
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CountTable = new EntryTable<uint>();
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Functions = new ConcurrentDictionary<ulong, TranslatedFunction>();
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FunctionTable = new AddressTable<ulong>(for64Bits ? Levels64Bit : Levels32Bit);
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Stubs = new TranslatorStubs(this);
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FunctionTable.Fill = (ulong)Stubs.SlowDispatchStub;
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if (memory.Type.IsHostMapped())
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{
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NativeSignalHandler.InitializeSignalHandler();
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}
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}
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private void TranslateStackedSubs()
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{
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while (_threadCount != 0)
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{
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_backgroundTranslatorLock.AcquireReaderLock(Timeout.Infinite);
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if (_backgroundStack.TryPop(out RejitRequest request) &&
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_backgroundSet.TryRemove(request.Address, out _))
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{
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TranslatedFunction func = Translate(request.Address, request.Mode, highCq: true);
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Functions.AddOrUpdate(request.Address, func, (key, oldFunc) =>
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{
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EnqueueForDeletion(key, oldFunc);
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return func;
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});
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if (PtcProfiler.Enabled)
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{
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PtcProfiler.UpdateEntry(request.Address, request.Mode, highCq: true);
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}
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RegisterFunction(request.Address, func);
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_backgroundTranslatorLock.ReleaseReaderLock();
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}
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else
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{
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_backgroundTranslatorLock.ReleaseReaderLock();
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_backgroundTranslatorEvent.WaitOne();
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}
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}
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// Wake up any other background translator threads, to encourage them to exit.
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_backgroundTranslatorEvent.Set();
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}
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public void Execute(State.ExecutionContext context, ulong address)
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{
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if (Interlocked.Increment(ref _threadCount) == 1)
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{
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IsReadyForTranslation.WaitOne();
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if (Ptc.State == PtcState.Enabled)
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{
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Debug.Assert(Functions.Count == 0);
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Ptc.LoadTranslations(this);
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Ptc.MakeAndSaveTranslations(this);
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}
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PtcProfiler.Start();
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Ptc.Disable();
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// Simple heuristic, should be user configurable in future. (1 for 4 core/ht or less, 2 for 6 core + ht
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// etc). All threads are normal priority except from the last, which just fills as much of the last core
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// as the os lets it with a low priority. If we only have one rejit thread, it should be normal priority
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// as highCq code is performance critical.
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//
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// TODO: Use physical cores rather than logical. This only really makes sense for processors with
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// hyperthreading. Requires OS specific code.
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int unboundedThreadCount = Math.Max(1, (Environment.ProcessorCount - 6) / 3);
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int threadCount = Math.Min(4, unboundedThreadCount);
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for (int i = 0; i < threadCount; i++)
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{
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bool last = i != 0 && i == unboundedThreadCount - 1;
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Thread backgroundTranslatorThread = new Thread(TranslateStackedSubs)
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{
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Name = "CPU.BackgroundTranslatorThread." + i,
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Priority = last ? ThreadPriority.Lowest : ThreadPriority.Normal
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};
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backgroundTranslatorThread.Start();
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}
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}
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Statistics.InitializeTimer();
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NativeInterface.RegisterThread(context, Memory, this);
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if (Optimizations.UseUnmanagedDispatchLoop)
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{
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Stubs.DispatchLoop(context.NativeContextPtr, address);
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}
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else
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{
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do
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{
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address = ExecuteSingle(context, address);
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}
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while (context.Running && address != 0);
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}
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NativeInterface.UnregisterThread();
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if (Interlocked.Decrement(ref _threadCount) == 0)
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{
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_backgroundTranslatorEvent.Set();
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ClearJitCache();
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Stubs.Dispose();
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FunctionTable.Dispose();
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CountTable.Dispose();
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}
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}
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public ulong ExecuteSingle(State.ExecutionContext context, ulong address)
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{
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TranslatedFunction func = GetOrTranslate(address, context.ExecutionMode);
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Statistics.StartTimer();
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ulong nextAddr = func.Execute(context);
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Statistics.StopTimer(address);
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return nextAddr;
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}
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internal TranslatedFunction GetOrTranslate(ulong address, ExecutionMode mode)
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{
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if (!Functions.TryGetValue(address, out TranslatedFunction func))
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{
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func = Translate(address, mode, highCq: false);
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TranslatedFunction oldFunc = Functions.GetOrAdd(address, func);
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if (oldFunc != func)
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{
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JitCache.Unmap(func.FuncPtr);
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func = oldFunc;
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}
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if (PtcProfiler.Enabled)
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{
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PtcProfiler.AddEntry(address, mode, highCq: false);
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}
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RegisterFunction(address, func);
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}
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return func;
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}
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internal void RegisterFunction(ulong guestAddress, TranslatedFunction func)
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{
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if (FunctionTable.IsValid(guestAddress) && (Optimizations.AllowLcqInFunctionTable || func.HighCq))
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{
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Volatile.Write(ref FunctionTable.GetValue(guestAddress), (ulong)func.FuncPtr);
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}
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}
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internal TranslatedFunction Translate(ulong address, ExecutionMode mode, bool highCq)
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{
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var context = new ArmEmitterContext(
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Memory,
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CountTable,
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FunctionTable,
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Stubs,
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address,
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highCq,
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mode: Aarch32Mode.User);
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Logger.StartPass(PassName.Decoding);
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Block[] blocks = Decoder.Decode(Memory, address, mode, highCq, singleBlock: false);
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Logger.EndPass(PassName.Decoding);
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Logger.StartPass(PassName.Translation);
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EmitSynchronization(context);
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if (blocks[0].Address != address)
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{
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context.Branch(context.GetLabel(address));
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}
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ControlFlowGraph cfg = EmitAndGetCFG(context, blocks, out Range funcRange, out Counter<uint> counter);
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ulong funcSize = funcRange.End - funcRange.Start;
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Logger.EndPass(PassName.Translation, cfg);
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Logger.StartPass(PassName.RegisterUsage);
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RegisterUsage.RunPass(cfg, mode);
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Logger.EndPass(PassName.RegisterUsage);
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OperandType[] argTypes = new OperandType[] { OperandType.I64 };
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CompilerOptions options = highCq ? CompilerOptions.HighCq : CompilerOptions.None;
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GuestFunction func;
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if (!context.HasPtc)
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{
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func = Compiler.Compile<GuestFunction>(cfg, argTypes, OperandType.I64, options);
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}
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else
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{
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using PtcInfo ptcInfo = new PtcInfo();
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func = Compiler.Compile<GuestFunction>(cfg, argTypes, OperandType.I64, options, ptcInfo);
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Hash128 hash = Ptc.ComputeHash(Memory, address, funcSize);
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Ptc.WriteInfoCodeRelocUnwindInfo(address, funcSize, hash, highCq, ptcInfo);
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}
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var result = new TranslatedFunction(func, counter, funcSize, highCq);
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Allocators.ResetAll();
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return result;
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}
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private struct Range
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{
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public ulong Start { get; }
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public ulong End { get; }
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public Range(ulong start, ulong end)
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{
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Start = start;
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End = end;
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}
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}
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private static ControlFlowGraph EmitAndGetCFG(
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ArmEmitterContext context,
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Block[] blocks,
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out Range range,
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out Counter<uint> counter)
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{
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counter = null;
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ulong rangeStart = ulong.MaxValue;
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ulong rangeEnd = 0;
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for (int blkIndex = 0; blkIndex < blocks.Length; blkIndex++)
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{
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Block block = blocks[blkIndex];
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if (!block.Exit)
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{
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if (rangeStart > block.Address)
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{
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rangeStart = block.Address;
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}
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if (rangeEnd < block.EndAddress)
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{
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rangeEnd = block.EndAddress;
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}
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}
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if (block.Address == context.EntryAddress && !context.HighCq)
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{
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EmitRejitCheck(context, out counter);
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}
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context.CurrBlock = block;
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context.MarkLabel(context.GetLabel(block.Address));
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if (block.Exit)
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{
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// Left option here as it may be useful if we need to return to managed rather than tail call in
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// future. (eg. for debug)
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bool useReturns = false;
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InstEmitFlowHelper.EmitVirtualJump(context, Const(block.Address), isReturn: useReturns);
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}
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else
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{
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for (int opcIndex = 0; opcIndex < block.OpCodes.Count; opcIndex++)
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{
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OpCode opCode = block.OpCodes[opcIndex];
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context.CurrOp = opCode;
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bool isLastOp = opcIndex == block.OpCodes.Count - 1;
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if (isLastOp && block.Branch != null && !block.Branch.Exit && block.Branch.Address <= block.Address)
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{
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EmitSynchronization(context);
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}
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Operand lblPredicateSkip = default;
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if (opCode is OpCode32 op && op.Cond < Condition.Al)
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{
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lblPredicateSkip = Label();
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InstEmitFlowHelper.EmitCondBranch(context, lblPredicateSkip, op.Cond.Invert());
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}
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if (opCode.Instruction.Emitter != null)
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{
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opCode.Instruction.Emitter(context);
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}
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else
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{
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throw new InvalidOperationException($"Invalid instruction \"{opCode.Instruction.Name}\".");
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}
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if (lblPredicateSkip != default)
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{
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context.MarkLabel(lblPredicateSkip);
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}
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}
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}
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}
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range = new Range(rangeStart, rangeEnd);
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return context.GetControlFlowGraph();
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}
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internal static void EmitRejitCheck(ArmEmitterContext context, out Counter<uint> counter)
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{
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const int MinsCallForRejit = 100;
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counter = new Counter<uint>(context.CountTable);
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Operand lblEnd = Label();
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Operand address = !context.HasPtc ?
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Const(ref counter.Value) :
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Const(ref counter.Value, Ptc.CountTableSymbol);
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Operand curCount = context.Load(OperandType.I32, address);
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Operand count = context.Add(curCount, Const(1));
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context.Store(address, count);
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context.BranchIf(lblEnd, curCount, Const(MinsCallForRejit), Comparison.NotEqual, BasicBlockFrequency.Cold);
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context.Call(typeof(NativeInterface).GetMethod(nameof(NativeInterface.EnqueueForRejit)), Const(context.EntryAddress));
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context.MarkLabel(lblEnd);
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}
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internal static void EmitSynchronization(EmitterContext context)
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{
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long countOffs = NativeContext.GetCounterOffset();
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Operand lblNonZero = Label();
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Operand lblExit = Label();
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Operand countAddr = context.Add(context.LoadArgument(OperandType.I64, 0), Const(countOffs));
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Operand count = context.Load(OperandType.I32, countAddr);
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context.BranchIfTrue(lblNonZero, count, BasicBlockFrequency.Cold);
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Operand running = context.Call(typeof(NativeInterface).GetMethod(nameof(NativeInterface.CheckSynchronization)));
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context.BranchIfTrue(lblExit, running, BasicBlockFrequency.Cold);
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context.Return(Const(0L));
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context.MarkLabel(lblNonZero);
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count = context.Subtract(count, Const(1));
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context.Store(countAddr, count);
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context.MarkLabel(lblExit);
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}
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public void InvalidateJitCacheRegion(ulong address, ulong size)
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{
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// If rejit is running, stop it as it may be trying to rejit a function on the invalidated region.
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ClearRejitQueue(allowRequeue: true);
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// TODO: Completely remove functions overlapping the specified range from the cache.
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}
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internal void EnqueueForRejit(ulong guestAddress, ExecutionMode mode)
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{
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if (_backgroundSet.TryAdd(guestAddress, null))
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{
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_backgroundStack.Push(new RejitRequest(guestAddress, mode));
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_backgroundTranslatorEvent.Set();
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}
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}
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private void EnqueueForDeletion(ulong guestAddress, TranslatedFunction func)
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{
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_oldFuncs.Enqueue(new(guestAddress, func));
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}
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private void ClearJitCache()
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{
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// Ensure no attempt will be made to compile new functions due to rejit.
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ClearRejitQueue(allowRequeue: false);
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foreach (var func in Functions.Values)
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{
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JitCache.Unmap(func.FuncPtr);
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func.CallCounter?.Dispose();
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}
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Functions.Clear();
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while (_oldFuncs.TryDequeue(out var kv))
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{
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JitCache.Unmap(kv.Value.FuncPtr);
|
|
|
|
kv.Value.CallCounter?.Dispose();
|
|
}
|
|
}
|
|
|
|
private void ClearRejitQueue(bool allowRequeue)
|
|
{
|
|
_backgroundTranslatorLock.AcquireWriterLock(Timeout.Infinite);
|
|
|
|
if (allowRequeue)
|
|
{
|
|
while (_backgroundStack.TryPop(out var request))
|
|
{
|
|
if (Functions.TryGetValue(request.Address, out var func) && func.CallCounter != null)
|
|
{
|
|
Volatile.Write(ref func.CallCounter.Value, 0);
|
|
}
|
|
|
|
_backgroundSet.TryRemove(request.Address, out _);
|
|
}
|
|
}
|
|
else
|
|
{
|
|
_backgroundStack.Clear();
|
|
}
|
|
|
|
_backgroundTranslatorLock.ReleaseWriterLock();
|
|
}
|
|
}
|
|
}
|