From 7af9fcbc06d553abe2566a5e150703abc6202956 Mon Sep 17 00:00:00 2001 From: merry Date: Sun, 6 Mar 2022 21:25:01 +0000 Subject: [PATCH] T32: Implement Data Processing (Modified Immediate) instructions (#3178) * T32: Implement Data Processing (Modified Immediate) instructions * Update tests * switch -> lookup table --- ARMeilleure/Decoders/OpCodeT32AluImm.cs | 38 ++ ARMeilleure/Decoders/OpCodeTable.cs | 16 + Ryujinx.Tests/Cpu/CpuTestT32Alu.cs | 506 ++++++++++++++++++++++++ 3 files changed, 560 insertions(+) create mode 100644 ARMeilleure/Decoders/OpCodeT32AluImm.cs diff --git a/ARMeilleure/Decoders/OpCodeT32AluImm.cs b/ARMeilleure/Decoders/OpCodeT32AluImm.cs new file mode 100644 index 0000000000..0895c29b44 --- /dev/null +++ b/ARMeilleure/Decoders/OpCodeT32AluImm.cs @@ -0,0 +1,38 @@ +using ARMeilleure.Common; +using System.Runtime.Intrinsics; + +namespace ARMeilleure.Decoders +{ + class OpCodeT32AluImm : OpCodeT32Alu, IOpCode32AluImm + { + public int Immediate { get; } + + public bool IsRotated { get; } + + public new static OpCode Create(InstDescriptor inst, ulong address, int opCode) => new OpCodeT32AluImm(inst, address, opCode); + + private static readonly Vector128 _factor = Vector128.Create(1, 0x00010001, 0x01000100, 0x01010101); + + public OpCodeT32AluImm(InstDescriptor inst, ulong address, int opCode) : base(inst, address, opCode) + { + int imm8 = (opCode >> 0) & 0xff; + int imm3 = (opCode >> 12) & 7; + int imm1 = (opCode >> 26) & 1; + + int imm12 = imm8 | (imm3 << 8) | (imm1 << 11); + + if ((imm12 >> 10) == 0) + { + Immediate = imm8 * _factor.GetElement((imm12 >> 8) & 3); + IsRotated = false; + } + else + { + int shift = imm12 >> 7; + + Immediate = BitUtils.RotateRight(0x80 | (imm12 & 0x7f), shift, 32); + IsRotated = shift != 0; + } + } + } +} \ No newline at end of file diff --git a/ARMeilleure/Decoders/OpCodeTable.cs b/ARMeilleure/Decoders/OpCodeTable.cs index ad696104eb..28650256d0 100644 --- a/ARMeilleure/Decoders/OpCodeTable.cs +++ b/ARMeilleure/Decoders/OpCodeTable.cs @@ -1048,25 +1048,41 @@ namespace ARMeilleure.Decoders #region "OpCode Table (AArch32, T32)" // Base SetT32("11101011010xxxxx0xxxxxxxxxxxxxxx", InstName.Adc, InstEmit32.Adc, OpCodeT32AluRsImm.Create); + SetT32("11110x01010xxxxx0xxxxxxxxxxxxxxx", InstName.Adc, InstEmit32.Adc, OpCodeT32AluImm.Create); SetT32("11101011000