InfinityX/RyuKen
1
0
Fork 0
forked from Mirror/Ryujinx
Code Pull requests Activity

Add FNMADD instruction

Browse source
This commit is contained in:
gdkchan 2018-03-24 00:23:42 -03:00
parent 873a7cd112
commit b2549d83bf
2 changed files with 47 additions and 25 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

1
ChocolArm64/AOpCodeTable.cs
View file

@ -206,6 +206,7 @@ namespace ChocolArm64
Set("0>1011100<1xxxxx110111xxxxxxxxxx", AInstEmit.Fmul_V, typeof(AOpCodeSimdReg)); Set("0>1011100<1xxxxx110111xxxxxxxxxx", AInstEmit.Fmul_V, typeof(AOpCodeSimdReg));
Set("0x0011111<<xxxxx1001x0xxxxxxxxxx", AInstEmit.Fmul_Ve, typeof(AOpCodeSimdRegElemF)); Set("0x0011111<<xxxxx1001x0xxxxxxxxxx", AInstEmit.Fmul_Ve, typeof(AOpCodeSimdRegElemF));
Set("000111100x100001010000xxxxxxxxxx", AInstEmit.Fneg_S, typeof(AOpCodeSimdReg)); Set("000111100x100001010000xxxxxxxxxx", AInstEmit.Fneg_S, typeof(AOpCodeSimdReg));
Set("000111110x1xxxxx0xxxxxxxxxxxxxxx", AInstEmit.Fnmadd_S, typeof(AOpCodeSimdReg));
Set("000111110x1xxxxx1xxxxxxxxxxxxxxx", AInstEmit.Fnmsub_S, typeof(AOpCodeSimdReg)); Set("000111110x1xxxxx1xxxxxxxxxxxxxxx", AInstEmit.Fnmsub_S, typeof(AOpCodeSimdReg));
Set("000111100x1xxxxx100010xxxxxxxxxx", AInstEmit.Fnmul_S, typeof(AOpCodeSimdReg)); Set("000111100x1xxxxx100010xxxxxxxxxx", AInstEmit.Fnmul_S, typeof(AOpCodeSimdReg));
Set("000111100x100110010000xxxxxxxxxx", AInstEmit.Frinta_S, typeof(AOpCodeSimd)); Set("000111100x100110010000xxxxxxxxxx", AInstEmit.Frinta_S, typeof(AOpCodeSimd));

71
ChocolArm64/Instruction/AInstEmitSimdArithmetic.cs
View file

@ -221,13 +221,25 @@ namespace ChocolArm64.Instruction
EmitScalarUnaryOpF(Context, () => Context.Emit(OpCodes.Neg)); EmitScalarUnaryOpF(Context, () => Context.Emit(OpCodes.Neg));
} }
public static void Fnmul_S(AILEmitterCtx Context) public static void Fnmadd_S(AILEmitterCtx Context)
{ {
EmitScalarBinaryOpF(Context, () => AOpCodeSimdReg Op = (AOpCodeSimdReg)Context.CurrOp;
{
Context.Emit(OpCodes.Mul); int SizeF = Op.Size & 1;
Context.Emit(OpCodes.Neg);
}); EmitVectorExtractF(Context, Op.Rn, 0, SizeF);
Context.Emit(OpCodes.Neg);
EmitVectorExtractF(Context, Op.Rm, 0, SizeF);
Context.Emit(OpCodes.Mul);
EmitVectorExtractF(Context, Op.Ra, 0, SizeF);
Context.Emit(OpCodes.Sub);
EmitScalarSetF(Context, Op.Rd, SizeF);
} }
public static void Fnmsub_S(AILEmitterCtx Context) public static void Fnmsub_S(AILEmitterCtx Context)
@ -248,6 +260,34 @@ namespace ChocolArm64.Instruction
EmitScalarSetF(Context, Op.Rd, SizeF); EmitScalarSetF(Context, Op.Rd, SizeF);
} }
public static void Fnmul_S(AILEmitterCtx Context)
{
EmitScalarBinaryOpF(Context, () =>
{
Context.Emit(OpCodes.Mul);
Context.Emit(OpCodes.Neg);
});
}
public static void Frinta_S(AILEmitterCtx Context)
{
AOpCodeSimd Op = (AOpCodeSimd)Context.CurrOp;
EmitVectorExtractF(Context, Op.Rn, 0, Op.Size);
EmitRoundMathCall(Context, MidpointRounding.AwayFromZero);
EmitScalarSetF(Context, Op.Rd, Op.Size);
}
public static void Frinta_V(AILEmitterCtx Context)
{
EmitVectorUnaryOpF(Context, () =>
{
EmitRoundMathCall(Context, MidpointRounding.AwayFromZero);
});
}
public static void Frinti_S(AILEmitterCtx Context) public static void Frinti_S(AILEmitterCtx Context)
{ {
AOpCodeSimd Op = (AOpCodeSimd)Context.CurrOp; AOpCodeSimd Op = (AOpCodeSimd)Context.CurrOp;
@ -298,25 +338,6 @@ namespace ChocolArm64.Instruction
}); });
} }
public static void Frinta_S(AILEmitterCtx Context)
{
AOpCodeSimd Op = (AOpCodeSimd)Context.CurrOp;
EmitVectorExtractF(Context, Op.Rn, 0, Op.Size);
EmitRoundMathCall(Context, MidpointRounding.AwayFromZero);
EmitScalarSetF(Context, Op.Rd, Op.Size);
}
public static void Frinta_V(AILEmitterCtx Context)
{
EmitVectorUnaryOpF(Context, () =>
{
EmitRoundMathCall(Context, MidpointRounding.AwayFromZero);
});
}
public static void Frintm_S(AILEmitterCtx Context) public static void Frintm_S(AILEmitterCtx Context)
{ {
EmitScalarUnaryOpF(Context, () => EmitScalarUnaryOpF(Context, () =>