forked from Mirror/Ryujinx
c64524a240
* Add ADD (zx imm12), NOP, MOV (register shifted), LDA, TBB, TBH, MOV (zx imm16) and CLZ thumb instructions, fix LDRD, STRD, CBZ, CBNZ and BLX (reg) * Bump PPTC version
19 lines
580 B
C#
19 lines
580 B
C#
namespace ARMeilleure.Decoders
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{
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class OpCodeT32ShiftReg : OpCodeT32Alu, IOpCode32AluRsReg
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{
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public int Rm => Rn;
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public int Rs { get; }
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public ShiftType ShiftType { get; }
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public new static OpCode Create(InstDescriptor inst, ulong address, int opCode) => new OpCodeT32ShiftReg(inst, address, opCode);
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public OpCodeT32ShiftReg(InstDescriptor inst, ulong address, int opCode) : base(inst, address, opCode)
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{
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Rs = (opCode >> 0) & 0xf;
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ShiftType = (ShiftType)((opCode >> 21) & 3);
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}
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}
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}
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