gdkchan c1bdf19061 Implement some ARM32 memory instructions and CMP (#565) ... * Implement ARM32 memory instructions: LDM, LDR, LDRB, LDRD, LDRH, LDRSB, LDRSH, STM, STR, STRB, STRD, STRH (immediate and register + immediate variants), implement CMP (immediate and register shifted by immediate variants) * Rename some opcode classes and flag masks for consistency * Fix a few suboptimal ARM32 codegen issues, only loads should be considered on decoder when checking if Rt == PC, and only NZCV flags should be considered for comparison optimizations * Take into account Rt2 for LDRD instructions aswell when checking if the instruction changes PC * Re-align arm32 instructions on the opcode table		2019-01-29 13:06:11 -03:00
..
Common	Improve kernel IPC implementation (#550)	2019-01-18 20:26:39 -02:00
Ipc	Improve kernel IPC implementation (#550)	2019-01-18 20:26:39 -02:00
Memory	Improve kernel IPC implementation (#550)	2019-01-18 20:26:39 -02:00
Process	Add ARM32 support on the translator (#561)	2019-01-24 23:59:53 -02:00
SupervisorCall	Improve kernel IPC implementation (#550)	2019-01-18 20:26:39 -02:00
Threading	Implement some ARM32 memory instructions and CMP (#565)	2019-01-29 13:06:11 -03:00