mirror of
https://github.com/Ryujinx/Ryujinx.git
synced 2024-11-20 04:26:33 +00:00
Add partial support for the BRX shader instruction
This commit is contained in:
gdk
Thog
parent
d274328c31
commit
f0a59f345c
15 changed files with 242 additions and 126 deletions
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@ -11,15 +11,17 @@ namespace Ryujinx.Graphics.Shader.Decoders
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public Block Next { get; set; }
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public Block Branch { get; set; }
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public List<OpCode> OpCodes { get; }
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public List<OpCodeSsy> SsyOpCodes { get; }
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public OpCodeBranchIndir BrIndir { get; set; }
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public List<OpCode> OpCodes { get; }
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public List<OpCodePush> PushOpCodes { get; }
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public Block(ulong address)
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{
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Address = address;
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OpCodes = new List<OpCode>();
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SsyOpCodes = new List<OpCodeSsy>();
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OpCodes = new List<OpCode>();
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PushOpCodes = new List<OpCodePush>();
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}
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public void Split(Block rightBlock)
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@ -45,7 +47,7 @@ namespace Ryujinx.Graphics.Shader.Decoders
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rightBlock.OpCodes.AddRange(OpCodes.GetRange(splitIndex, splitCount));
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rightBlock.UpdateSsyOpCodes();
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rightBlock.UpdatePushOps();
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EndAddress = rightBlock.Address;
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@ -54,7 +56,7 @@ namespace Ryujinx.Graphics.Shader.Decoders
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OpCodes.RemoveRange(splitIndex, splitCount);
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UpdateSsyOpCodes();
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UpdatePushOps();
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}
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private static int BinarySearch(List<OpCode> opCodes, ulong address)
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@ -99,18 +101,18 @@ namespace Ryujinx.Graphics.Shader.Decoders
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return null;
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}
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public void UpdateSsyOpCodes()
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public void UpdatePushOps()
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{
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SsyOpCodes.Clear();
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PushOpCodes.Clear();
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for (int index = 0; index < OpCodes.Count; index++)
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{
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if (!(OpCodes[index] is OpCodeSsy op))
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if (!(OpCodes[index] is OpCodePush op))
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{
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continue;
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}
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SsyOpCodes.Add(op);
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PushOpCodes.Add(op);
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}
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}
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}
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@ -43,9 +43,7 @@ namespace Ryujinx.Graphics.Shader.Decoders
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return block;
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}
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ulong startAddress = headerSize;
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GetBlock(startAddress);
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GetBlock(0);
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while (workQueue.TryDequeue(out Block currBlock))
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{
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@ -67,7 +65,7 @@ namespace Ryujinx.Graphics.Shader.Decoders
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}
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// If we have a block after the current one, set the limit address.
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ulong limitAddress = (ulong)code.Length;
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ulong limitAddress = (ulong)code.Length - headerSize;
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if (nBlkIndex != blocks.Count)
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{
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@ -85,13 +83,15 @@ namespace Ryujinx.Graphics.Shader.Decoders
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}
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}
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FillBlock(code, currBlock, limitAddress, startAddress);
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FillBlock(code, currBlock, limitAddress, headerSize);
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if (currBlock.OpCodes.Count != 0)
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{
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foreach (OpCodeSsy ssyOp in currBlock.SsyOpCodes)
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// We should have blocks for all possible branch targets,
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// including those from SSY/PBK instructions.
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foreach (OpCodePush pushOp in currBlock.PushOpCodes)
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{
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GetBlock(ssyOp.GetAbsoluteAddress());
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GetBlock(pushOp.GetAbsoluteAddress());
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}
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// Set child blocks. "Branch" is the block the branch instruction
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@ -100,9 +100,25 @@ namespace Ryujinx.Graphics.Shader.Decoders
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// or end of program, Next is null.
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OpCode lastOp = currBlock.GetLastOp();
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if (lastOp is OpCodeBranch op)
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if (lastOp is OpCodeBranch opBr)
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{
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currBlock.Branch = GetBlock(op.GetAbsoluteAddress());
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currBlock.Branch = GetBlock(opBr.GetAbsoluteAddress());
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}
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else if (lastOp is OpCodeBranchIndir opBrIndir)
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{
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// An indirect branch could go anywhere, we don't know the target.
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// Those instructions are usually used on a switch to jump table
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// compiler optimization, and in those cases the possible targets
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// seems to be always right after the BRX itself. We can assume
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// that the possible targets are all the blocks in-between the
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// instruction right after the BRX, and the common target that
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// all the "cases" should eventually jump to, acting as the
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// switch break.
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Block firstTarget = GetBlock(currBlock.EndAddress);
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firstTarget.BrIndir = opBrIndir;
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opBrIndir.PossibleTargets.Add(firstTarget);
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}
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if (!IsUnconditionalBranch(lastOp))
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@ -122,13 +138,28 @@ namespace Ryujinx.Graphics.Shader.Decoders
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{
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blocks.Add(currBlock);
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}
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// Do we have a block after the current one?
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if (!IsExit(currBlock.GetLastOp()) && currBlock.BrIndir != null)
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{
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bool targetVisited = visited.ContainsKey(currBlock.EndAddress);
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Block possibleTarget = GetBlock(currBlock.EndAddress);
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currBlock.BrIndir.PossibleTargets.Add(possibleTarget);
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if (!targetVisited)
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{
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possibleTarget.BrIndir = currBlock.BrIndir;
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}
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}
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}
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foreach (Block ssyBlock in blocks.Where(x => x.SsyOpCodes.Count != 0))
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foreach (Block block in blocks.Where(x => x.PushOpCodes.Count != 0))
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{
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for (int ssyIndex = 0; ssyIndex < ssyBlock.SsyOpCodes.Count; ssyIndex++)
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for (int pushOpIndex = 0; pushOpIndex < block.PushOpCodes.Count; pushOpIndex++)
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{
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PropagateSsy(visited, ssyBlock, ssyIndex);
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PropagatePushOp(visited, block, pushOpIndex);
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}
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}
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@ -180,21 +211,21 @@ namespace Ryujinx.Graphics.Shader.Decoders
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do
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{
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if (address >= limitAddress)
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if (address + 7 >= limitAddress)
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{
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break;
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}
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// Ignore scheduling instructions, which are written every 32 bytes.
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if (((address - startAddress) & 0x1f) == 0)
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if ((address & 0x1f) == 0)
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{
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address += 8;
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continue;
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}
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uint word0 = BinaryPrimitives.ReadUInt32LittleEndian(code.Slice((int)address));
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uint word1 = BinaryPrimitives.ReadUInt32LittleEndian(code.Slice((int)address + 4));
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uint word0 = BinaryPrimitives.ReadUInt32LittleEndian(code.Slice((int)(startAddress + address)));
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uint word1 = BinaryPrimitives.ReadUInt32LittleEndian(code.Slice((int)(startAddress + address + 4)));
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ulong opAddress = address;
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@ -221,7 +252,7 @@ namespace Ryujinx.Graphics.Shader.Decoders
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block.EndAddress = address;
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block.UpdateSsyOpCodes();
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block.UpdatePushOps();
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}
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private static bool IsUnconditionalBranch(OpCode opCode)
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@ -242,10 +273,16 @@ namespace Ryujinx.Graphics.Shader.Decoders
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private static bool IsBranch(OpCode opCode)
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{
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return (opCode is OpCodeBranch opBranch && !opBranch.PushTarget) ||
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opCode is OpCodeSync ||
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opCode is OpCodeBranchIndir ||
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opCode is OpCodeBranchPop ||
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opCode is OpCodeExit;
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}
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private static bool IsExit(OpCode opCode)
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{
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return opCode is OpCodeExit;
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}
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private static OpCode MakeOpCode(Type type, InstEmitter emitter, ulong address, long opCode)
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{
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if (type == null)
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@ -282,8 +319,8 @@ namespace Ryujinx.Graphics.Shader.Decoders
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private enum RestoreType
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{
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None,
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PopSsy,
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PushSync
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PopPushOp,
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PushBranchOp
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}
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private RestoreType _restoreType;
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@ -299,45 +336,45 @@ namespace Ryujinx.Graphics.Shader.Decoders
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_restoreValue = 0;
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}
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public PathBlockState(int oldSsyStackSize)
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public PathBlockState(int oldStackSize)
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{
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Block = null;
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_restoreType = RestoreType.PopSsy;
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_restoreValue = (ulong)oldSsyStackSize;
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_restoreType = RestoreType.PopPushOp;
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_restoreValue = (ulong)oldStackSize;
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}
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public PathBlockState(ulong syncAddress)
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{
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Block = null;
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_restoreType = RestoreType.PushSync;
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_restoreType = RestoreType.PushBranchOp;
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_restoreValue = syncAddress;
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}
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public void RestoreStackState(Stack<ulong> ssyStack)
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public void RestoreStackState(Stack<ulong> branchStack)
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{
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if (_restoreType == RestoreType.PushSync)
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if (_restoreType == RestoreType.PushBranchOp)
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{
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ssyStack.Push(_restoreValue);
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branchStack.Push(_restoreValue);
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}
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else if (_restoreType == RestoreType.PopSsy)
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else if (_restoreType == RestoreType.PopPushOp)
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{
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while (ssyStack.Count > (uint)_restoreValue)
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while (branchStack.Count > (uint)_restoreValue)
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{
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ssyStack.Pop();
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branchStack.Pop();
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}
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}
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}
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}
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private static void PropagateSsy(Dictionary<ulong, Block> blocks, Block ssyBlock, int ssyIndex)
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private static void PropagatePushOp(Dictionary<ulong, Block> blocks, Block currBlock, int pushOpIndex)
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{
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OpCodeSsy ssyOp = ssyBlock.SsyOpCodes[ssyIndex];
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OpCodePush pushOp = currBlock.PushOpCodes[pushOpIndex];
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Stack<PathBlockState> workQueue = new Stack<PathBlockState>();
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HashSet<Block> visited = new HashSet<Block>();
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Stack<ulong> ssyStack = new Stack<ulong>();
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Stack<ulong> branchStack = new Stack<ulong>();
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void Push(PathBlockState pbs)
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{
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@ -347,32 +384,32 @@ namespace Ryujinx.Graphics.Shader.Decoders
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}
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}
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Push(new PathBlockState(ssyBlock));
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Push(new PathBlockState(currBlock));
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while (workQueue.TryPop(out PathBlockState pbs))
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{
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if (pbs.ReturningFromVisit)
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{
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pbs.RestoreStackState(ssyStack);
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pbs.RestoreStackState(branchStack);
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continue;
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}
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Block current = pbs.Block;
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int ssyOpCodesCount = current.SsyOpCodes.Count;
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int pushOpsCount = current.PushOpCodes.Count;
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if (ssyOpCodesCount != 0)
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if (pushOpsCount != 0)
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{
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Push(new PathBlockState(ssyStack.Count));
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Push(new PathBlockState(branchStack.Count));
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for (int index = ssyIndex; index < ssyOpCodesCount; index++)
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for (int index = pushOpIndex; index < pushOpsCount; index++)
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{
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ssyStack.Push(current.SsyOpCodes[index].GetAbsoluteAddress());
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branchStack.Push(current.PushOpCodes[index].GetAbsoluteAddress());
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}
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}
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ssyIndex = 0;
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pushOpIndex = 0;
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if (current.Next != null)
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{
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@ -383,17 +420,24 @@ namespace Ryujinx.Graphics.Shader.Decoders
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{
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Push(new PathBlockState(current.Branch));
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}
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else if (current.GetLastOp() is OpCodeSync op)
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else if (current.GetLastOp() is OpCodeBranchIndir brIndir)
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{
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ulong syncAddress = ssyStack.Pop();
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if (ssyStack.Count == 0)
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foreach (Block possibleTarget in brIndir.PossibleTargets)
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{
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ssyStack.Push(syncAddress);
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Push(new PathBlockState(possibleTarget));
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}
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}
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else if (current.GetLastOp() is OpCodeBranchPop op)
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{
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ulong syncAddress = branchStack.Pop();
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op.Targets.Add(ssyOp, op.Targets.Count);
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if (branchStack.Count == 0)
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{
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branchStack.Push(syncAddress);
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ssyOp.Syncs.TryAdd(op, Local());
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op.Targets.Add(pushOp, op.Targets.Count);
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pushOp.PopOps.TryAdd(op, Local());
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}
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else
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{
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@ -1,6 +1,6 @@
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namespace Ryujinx.Graphics.Shader.Decoders
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{
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enum FmulScale
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enum FPMultiplyScale
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{
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None = 0,
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Divide2 = 1,
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@ -4,7 +4,7 @@ namespace Ryujinx.Graphics.Shader.Decoders
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{
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RoundingMode RoundingMode { get; }
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FmulScale Scale { get; }
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FPMultiplyScale Scale { get; }
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bool FlushToZero { get; }
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bool AbsoluteA { get; }
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23
Ryujinx.Graphics.Shader/Decoders/OpCodeBranchIndir.cs
Normal file
23
Ryujinx.Graphics.Shader/Decoders/OpCodeBranchIndir.cs
Normal file
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@ -0,0 +1,23 @@
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using Ryujinx.Graphics.Shader.Instructions;
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using System.Collections.Generic;
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namespace Ryujinx.Graphics.Shader.Decoders
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{
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class OpCodeBranchIndir : OpCode
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{
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public HashSet<Block> PossibleTargets { get; }
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public Register Ra { get; }
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public int Offset { get; }
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public OpCodeBranchIndir(InstEmitter emitter, ulong address, long opCode) : base(emitter, address, opCode)
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{
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PossibleTargets = new HashSet<Block>();
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Ra = new Register(opCode.Extract(8, 8), RegisterType.Gpr);
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Offset = ((int)(opCode >> 20) << 8) >> 8;
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}
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}
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}
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15
Ryujinx.Graphics.Shader/Decoders/OpCodeBranchPop.cs
Normal file
15
Ryujinx.Graphics.Shader/Decoders/OpCodeBranchPop.cs
Normal file
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@ -0,0 +1,15 @@
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using Ryujinx.Graphics.Shader.Instructions;
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using System.Collections.Generic;
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namespace Ryujinx.Graphics.Shader.Decoders
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{
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class OpCodeBranchPop : OpCode
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{
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public Dictionary<OpCodePush, int> Targets { get; }
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public OpCodeBranchPop(InstEmitter emitter, ulong address, long opCode) : base(emitter, address, opCode)
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{
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Targets = new Dictionary<OpCodePush, int>();
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}
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}
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}
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@ -6,7 +6,7 @@ namespace Ryujinx.Graphics.Shader.Decoders
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{
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public RoundingMode RoundingMode { get; }
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public FmulScale Scale { get; }
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public FPMultiplyScale Scale { get; }
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public bool FlushToZero { get; }
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public bool AbsoluteA { get; }
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@ -15,7 +15,7 @@ namespace Ryujinx.Graphics.Shader.Decoders
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{
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RoundingMode = (RoundingMode)opCode.Extract(39, 2);
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Scale = (FmulScale)opCode.Extract(41, 3);
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Scale = (FPMultiplyScale)opCode.Extract(41, 3);
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FlushToZero = opCode.Extract(44);
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AbsoluteA = opCode.Extract(46);
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@ -7,7 +7,7 @@ namespace Ryujinx.Graphics.Shader.Decoders
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{
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public RoundingMode RoundingMode => RoundingMode.ToNearest;
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public FmulScale Scale => FmulScale.None;
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public FPMultiplyScale Scale => FPMultiplyScale.None;
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public bool FlushToZero { get; }
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public bool AbsoluteA { get; }
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@ -4,13 +4,13 @@ using System.Collections.Generic;
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namespace Ryujinx.Graphics.Shader.Decoders
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{
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class OpCodeSsy : OpCodeBranch
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class OpCodePush : OpCodeBranch
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{
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public Dictionary<OpCodeSync, Operand> Syncs { get; }
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public Dictionary<OpCodeBranchPop, Operand> PopOps { get; }
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public OpCodeSsy(InstEmitter emitter, ulong address, long opCode) : base(emitter, address, opCode)
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public OpCodePush(InstEmitter emitter, ulong address, long opCode) : base(emitter, address, opCode)
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{
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Syncs = new Dictionary<OpCodeSync, Operand>();
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PopOps = new Dictionary<OpCodeBranchPop, Operand>();
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Predicate = new Register(RegisterConsts.PredicateTrueIndex, RegisterType.Predicate);
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@ -1,15 +0,0 @@
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using Ryujinx.Graphics.Shader.Instructions;
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using System.Collections.Generic;
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namespace Ryujinx.Graphics.Shader.Decoders
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{
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class OpCodeSync : OpCode
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{
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public Dictionary<OpCodeSsy, int> Targets { get; }
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public OpCodeSync(InstEmitter emitter, ulong address, long opCode) : base(emitter, address, opCode)
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{
|
||||
Targets = new Dictionary<OpCodeSsy, int>();
|
||||
}
|
||||
}
|
||||
}
|
||||
|
|
@ -41,7 +41,8 @@ namespace Ryujinx.Graphics.Shader.Decoders
|
|||
Set("0101001111110x", InstEmit.Bfi, typeof(OpCodeAluRegCbuf));
|
||||
Set("0101101111110x", InstEmit.Bfi, typeof(OpCodeAluReg));
|
||||
Set("111000100100xx", InstEmit.Bra, typeof(OpCodeBranch));
|
||||
Set("111000110100xx", InstEmit.Brk, typeof(OpCodeSync));
|
||||
Set("111000110100xx", InstEmit.Brk, typeof(OpCodeBranchPop));
|
||||
Set("111000100101xx", InstEmit.Brx, typeof(OpCodeBranchIndir));
|
||||
Set("0101000010100x", InstEmit.Csetp, typeof(OpCodePsetp));
|
||||
Set("111000110000xx", InstEmit.Exit, typeof(OpCodeExit));
|
||||
Set("0100110010101x", InstEmit.F2F, typeof(OpCodeFArithCbuf));
|
||||
|
|
@ -137,7 +138,7 @@ namespace Ryujinx.Graphics.Shader.Decoders
|
|||
Set("0101110010011x", InstEmit.Mov, typeof(OpCodeAluReg));
|
||||
Set("0101000010000x", InstEmit.Mufu, typeof(OpCodeFArith));
|
||||
Set("1111101111100x", InstEmit.Out, typeof(OpCode));
|
||||
Set("111000101010xx", InstEmit.Pbk, typeof(OpCodeSsy));
|
||||
Set("111000101010xx", InstEmit.Pbk, typeof(OpCodePush));
|
||||
Set("0100110000001x", InstEmit.Popc, typeof(OpCodeAluCbuf));
|
||||
Set("0011100x00001x", InstEmit.Popc, typeof(OpCodeAluImm));
|
||||
Set("0101110000001x", InstEmit.Popc, typeof(OpCodeAluReg));
|
||||
|
|
@ -157,12 +158,12 @@ namespace Ryujinx.Graphics.Shader.Decoders
|
|||
Set("0100110000101x", InstEmit.Shr, typeof(OpCodeAluCbuf));
|
||||
Set("0011100x00101x", InstEmit.Shr, typeof(OpCodeAluImm));
|
||||
Set("0101110000101x", InstEmit.Shr, typeof(OpCodeAluReg));
|
||||
Set("111000101001xx", InstEmit.Ssy, typeof(OpCodeSsy));
|
||||
Set("111000101001xx", InstEmit.Ssy, typeof(OpCodePush));
|
||||
Set("1110111101010x", InstEmit.St, typeof(OpCodeMemory));
|
||||
Set("1110111011011x", InstEmit.Stg, typeof(OpCodeMemory));
|
||||
Set("1110111101011x", InstEmit.Sts, typeof(OpCodeMemory));
|
||||
Set("11101011001xxx", InstEmit.Sust, typeof(OpCodeImage));
|
||||
Set("1111000011111x", InstEmit.Sync, typeof(OpCodeSync));
|
||||
Set("1111000011111x", InstEmit.Sync, typeof(OpCodeBranchPop));
|
||||
Set("110000xxxx111x", InstEmit.Tex, typeof(OpCodeTex));
|
||||
Set("1101111010111x", InstEmit.TexB, typeof(OpCodeTexB));
|
||||
Set("1101x00xxxxxxx", InstEmit.Texs, typeof(OpCodeTexs));
|
||||
|
|
|
|||
|
|
@ -97,14 +97,14 @@ namespace Ryujinx.Graphics.Shader.Instructions
|
|||
|
||||
switch (op.Scale)
|
||||
{
|
||||
case FmulScale.None: break;
|
||||
case FPMultiplyScale.None: break;
|
||||
|
||||
case FmulScale.Divide2: srcA = context.FPDivide (srcA, ConstF(2)); break;
|
||||
case FmulScale.Divide4: srcA = context.FPDivide (srcA, ConstF(4)); break;
|
||||
case FmulScale.Divide8: srcA = context.FPDivide (srcA, ConstF(8)); break;
|
||||
case FmulScale.Multiply2: srcA = context.FPMultiply(srcA, ConstF(2)); break;
|
||||
case FmulScale.Multiply4: srcA = context.FPMultiply(srcA, ConstF(4)); break;
|
||||
case FmulScale.Multiply8: srcA = context.FPMultiply(srcA, ConstF(8)); break;
|
||||
case FPMultiplyScale.Divide2: srcA = context.FPDivide (srcA, ConstF(2)); break;
|
||||
case FPMultiplyScale.Divide4: srcA = context.FPDivide (srcA, ConstF(4)); break;
|
||||
case FPMultiplyScale.Divide8: srcA = context.FPDivide (srcA, ConstF(8)); break;
|
||||
case FPMultiplyScale.Multiply2: srcA = context.FPMultiply(srcA, ConstF(2)); break;
|
||||
case FPMultiplyScale.Multiply4: srcA = context.FPMultiply(srcA, ConstF(4)); break;
|
||||
case FPMultiplyScale.Multiply8: srcA = context.FPMultiply(srcA, ConstF(8)); break;
|
||||
|
||||
default: break; //TODO: Warning.
|
||||
}
|
||||
|
|
|
|||
|
|
@ -20,6 +20,36 @@ namespace Ryujinx.Graphics.Shader.Instructions
|
|||
EmitBrkOrSync(context);
|
||||
}
|
||||
|
||||
public static void Brx(EmitterContext context)
|
||||
{
|
||||
OpCodeBranchIndir op = (OpCodeBranchIndir)context.CurrOp;
|
||||
|
||||
int offset = (int)op.Address + 8 + op.Offset;
|
||||
|
||||
Operand address = context.IAdd(Register(op.Ra), Const(offset));
|
||||
|
||||
// Sorting the target addresses in descending order improves the code,
|
||||
// since it will always check the most distant targets first, then the
|
||||
// near ones. This can be easily transformed into if/else statements.
|
||||
IOrderedEnumerable<Block> sortedTargets = op.PossibleTargets.OrderByDescending(x => x.Address);
|
||||
|
||||
Block lastTarget = sortedTargets.LastOrDefault();
|
||||
|
||||
foreach (Block possibleTarget in sortedTargets)
|
||||
{
|
||||
Operand label = context.GetLabel(possibleTarget.Address);
|
||||
|
||||
if (possibleTarget != lastTarget)
|
||||
{
|
||||
context.BranchIfTrue(label, context.ICompareEqual(address, Const((int)possibleTarget.Address)));
|
||||
}
|
||||
else
|
||||
{
|
||||
context.Branch(label);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
public static void Exit(EmitterContext context)
|
||||
{
|
||||
OpCodeExit op = (OpCodeExit)context.CurrOp;
|
||||
|
|
@ -54,45 +84,45 @@ namespace Ryujinx.Graphics.Shader.Instructions
|
|||
|
||||
private static void EmitPbkOrSsy(EmitterContext context)
|
||||
{
|
||||
OpCodeSsy op = (OpCodeSsy)context.CurrOp;
|
||||
OpCodePush op = (OpCodePush)context.CurrOp;
|
||||
|
||||
foreach (KeyValuePair<OpCodeSync, Operand> kv in op.Syncs)
|
||||
foreach (KeyValuePair<OpCodeBranchPop, Operand> kv in op.PopOps)
|
||||
{
|
||||
OpCodeSync opSync = kv.Key;
|
||||
OpCodeBranchPop opSync = kv.Key;
|
||||
|
||||
Operand local = kv.Value;
|
||||
|
||||
int ssyIndex = opSync.Targets[op];
|
||||
int pushOpIndex = opSync.Targets[op];
|
||||
|
||||
context.Copy(local, Const(ssyIndex));
|
||||
context.Copy(local, Const(pushOpIndex));
|
||||
}
|
||||
}
|
||||
|
||||
private static void EmitBrkOrSync(EmitterContext context)
|
||||
{
|
||||
OpCodeSync op = (OpCodeSync)context.CurrOp;
|
||||
OpCodeBranchPop op = (OpCodeBranchPop)context.CurrOp;
|
||||
|
||||
if (op.Targets.Count == 1)
|
||||
{
|
||||
// If we have only one target, then the SSY is basically
|
||||
// If we have only one target, then the SSY/PBK is basically
|
||||
// a branch, we can produce better codegen for this case.
|
||||
OpCodeSsy opSsy = op.Targets.Keys.First();
|
||||
OpCodePush pushOp = op.Targets.Keys.First();
|
||||
|
||||
EmitBranch(context, opSsy.GetAbsoluteAddress());
|
||||
EmitBranch(context, pushOp.GetAbsoluteAddress());
|
||||
}
|
||||
else
|
||||
{
|
||||
foreach (KeyValuePair<OpCodeSsy, int> kv in op.Targets)
|
||||
foreach (KeyValuePair<OpCodePush, int> kv in op.Targets)
|
||||
{
|
||||
OpCodeSsy opSsy = kv.Key;
|
||||
OpCodePush pushOp = kv.Key;
|
||||
|
||||
Operand label = context.GetLabel(opSsy.GetAbsoluteAddress());
|
||||
Operand label = context.GetLabel(pushOp.GetAbsoluteAddress());
|
||||
|
||||
Operand local = opSsy.Syncs[op];
|
||||
Operand local = pushOp.PopOps[op];
|
||||
|
||||
int ssyIndex = kv.Value;
|
||||
int pushOpIndex = kv.Value;
|
||||
|
||||
context.BranchIfTrue(label, context.ICompareEqual(local, Const(ssyIndex)));
|
||||
context.BranchIfTrue(label, context.ICompareEqual(local, Const(pushOpIndex)));
|
||||
}
|
||||
}
|
||||
}
|
||||
|
|
|
|||
|
|
@ -10,11 +10,14 @@ namespace Ryujinx.Graphics.Shader
|
|||
|
||||
public string Code { get; private set; }
|
||||
|
||||
internal ShaderProgram(ShaderProgramInfo info, ShaderStage stage, string code)
|
||||
public int Size { get; }
|
||||
|
||||
internal ShaderProgram(ShaderProgramInfo info, ShaderStage stage, string code, int size)
|
||||
{
|
||||
Info = info;
|
||||
Stage = stage;
|
||||
Code = code;
|
||||
Size = size;
|
||||
}
|
||||
|
||||
public void Prepend(string line)
|
||||
|
|
|
|||
|
|
@ -46,7 +46,12 @@ namespace Ryujinx.Graphics.Shader.Translation
|
|||
bool compute = (translationConfig.Flags & TranslationFlags.Compute) != 0;
|
||||
bool debugMode = (translationConfig.Flags & TranslationFlags.DebugMode) != 0;
|
||||
|
||||
Operation[] ops = DecodeShader(code, compute, debugMode, out ShaderHeader header);
|
||||
Operation[] ops = DecodeShader(
|
||||
code,
|
||||
compute,
|
||||
debugMode,
|
||||
out ShaderHeader header,
|
||||
out int size);
|
||||
|
||||
ShaderStage stage;
|
||||
|
||||
|
|
@ -76,15 +81,15 @@ namespace Ryujinx.Graphics.Shader.Translation
|
|||
maxOutputVertexCount,
|
||||
outputTopology);
|
||||
|
||||
return Translate(ops, config);
|
||||
return Translate(ops, config, size);
|
||||
}
|
||||
|
||||
public static ShaderProgram Translate(Span<byte> vpACode, Span<byte> vpBCode, TranslationConfig translationConfig)
|
||||
{
|
||||
bool debugMode = (translationConfig.Flags & TranslationFlags.DebugMode) != 0;
|
||||
|
||||
Operation[] vpAOps = DecodeShader(vpACode, compute: false, debugMode, out _);
|
||||
Operation[] vpBOps = DecodeShader(vpBCode, compute: false, debugMode, out ShaderHeader header);
|
||||
Operation[] vpAOps = DecodeShader(vpACode, compute: false, debugMode, out _, out _);
|
||||
Operation[] vpBOps = DecodeShader(vpBCode, compute: false, debugMode, out ShaderHeader header, out int sizeB);
|
||||
|
||||
ShaderConfig config = new ShaderConfig(
|
||||
header.Stage,
|
||||
|
|
@ -93,10 +98,10 @@ namespace Ryujinx.Graphics.Shader.Translation
|
|||
header.MaxOutputVertexCount,
|
||||
header.OutputTopology);
|
||||
|
||||
return Translate(Combine(vpAOps, vpBOps), config);
|
||||
return Translate(Combine(vpAOps, vpBOps), config, sizeB);
|
||||
}
|
||||
|
||||
private static ShaderProgram Translate(Operation[] ops, ShaderConfig config)
|
||||
private static ShaderProgram Translate(Operation[] ops, ShaderConfig config, int size)
|
||||
{
|
||||
BasicBlock[] irBlocks = ControlFlowGraph.MakeCfg(ops);
|
||||
|
||||
|
|
@ -122,17 +127,20 @@ namespace Ryujinx.Graphics.Shader.Translation
|
|||
|
||||
string glslCode = program.Code;
|
||||
|
||||
return new ShaderProgram(spInfo, config.Stage, glslCode);
|
||||
return new ShaderProgram(spInfo, config.Stage, glslCode, size);
|
||||
}
|
||||
|
||||
private static Operation[] DecodeShader(Span<byte> code, bool compute, bool debugMode, out ShaderHeader header)
|
||||
private static Operation[] DecodeShader(
|
||||
Span<byte> code,
|
||||
bool compute,
|
||||
bool debugMode,
|
||||
out ShaderHeader header,
|
||||
out int size)
|
||||
{
|
||||
Block[] cfg;
|
||||
|
||||
EmitterContext context;
|
||||
|
||||
ulong headerSize;
|
||||
|
||||
if (compute)
|
||||
{
|
||||
header = null;
|
||||
|
|
@ -140,8 +148,6 @@ namespace Ryujinx.Graphics.Shader.Translation
|
|||
cfg = Decoder.Decode(code, 0);
|
||||
|
||||
context = new EmitterContext(ShaderStage.Compute, header);
|
||||
|
||||
headerSize = 0;
|
||||
}
|
||||
else
|
||||
{
|
||||
|
|
@ -150,14 +156,19 @@ namespace Ryujinx.Graphics.Shader.Translation
|
|||
cfg = Decoder.Decode(code, HeaderSize);
|
||||
|
||||
context = new EmitterContext(header.Stage, header);
|
||||
|
||||
headerSize = HeaderSize;
|
||||
}
|
||||
|
||||
ulong maxEndAddress = 0;
|
||||
|
||||
for (int blkIndex = 0; blkIndex < cfg.Length; blkIndex++)
|
||||
{
|
||||
Block block = cfg[blkIndex];
|
||||
|
||||
if (maxEndAddress < block.EndAddress)
|
||||
{
|
||||
maxEndAddress = block.EndAddress;
|
||||
}
|
||||
|
||||
context.CurrBlock = block;
|
||||
|
||||
context.MarkLabel(context.GetLabel(block.Address));
|
||||
|
|
@ -179,7 +190,7 @@ namespace Ryujinx.Graphics.Shader.Translation
|
|||
instName = "???";
|
||||
}
|
||||
|
||||
string dbgComment = $"0x{(op.Address - headerSize):X6}: 0x{op.RawOpCode:X16} {instName}";
|
||||
string dbgComment = $"0x{op.Address:X6}: 0x{op.RawOpCode:X16} {instName}";
|
||||
|
||||
context.Add(new CommentNode(dbgComment));
|
||||
}
|
||||
|
|
@ -193,13 +204,13 @@ namespace Ryujinx.Graphics.Shader.Translation
|
|||
|
||||
bool skipPredicateCheck = op.Emitter == InstEmit.Bra;
|
||||
|
||||
if (op is OpCodeSync opSync)
|
||||
if (op is OpCodeBranchPop opBranchPop)
|
||||
{
|
||||
// If the instruction is a SYNC instruction with only one
|
||||
// possible target address, then the instruction is basically
|
||||
// just a simple branch, we can generate code similar to branch
|
||||
// instructions, with the condition check on the branch itself.
|
||||
skipPredicateCheck |= opSync.Targets.Count < 2;
|
||||
skipPredicateCheck |= opBranchPop.Targets.Count < 2;
|
||||
}
|
||||
|
||||
if (!(op.Predicate.IsPT || skipPredicateCheck))
|
||||
|
|
@ -243,6 +254,8 @@ namespace Ryujinx.Graphics.Shader.Translation
|
|||
}
|
||||
}
|
||||
|
||||
size = (int)maxEndAddress + (compute ? 0 : HeaderSize);
|
||||
|
||||
return context.GetOperations();
|
||||
}
|
||||
|
||||
|
|
|
|||
Loading…
Reference in a new issue