mirror of
https://github.com/Ryujinx/Ryujinx.git
synced 2024-11-24 13:54:15 +00:00
c26f3774bd
* Implement VMULL, VMLSL, VQRSHRN, VQRSHRUN AArch32 instructions plus other fixes * Re-align opcode table * Re-enable undefined, use subclasses to fix checks * Add test and fix VRSHR instruction * PR feedback
7 lines
225 B
C#
7 lines
225 B
C#
namespace ARMeilleure.Decoders
|
|
{
|
|
class OpCode32SimdShImmNarrow : OpCode32SimdShImm
|
|
{
|
|
public OpCode32SimdShImmNarrow(InstDescriptor inst, ulong address, int opCode) : base(inst, address, opCode) { }
|
|
}
|
|
}
|