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dyncom: Handle the ARM A2 encoding of LDRBT/STRBT.
This commit is contained in:
parent
2572a62480
commit
0a5d450e94
1 changed files with 15 additions and 17 deletions
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@ -1726,25 +1726,21 @@ ARM_INST_PTR INTERPRETER_TRANSLATE(ldrb)(unsigned int inst, int index)
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}
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}
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ARM_INST_PTR INTERPRETER_TRANSLATE(ldrbt)(unsigned int inst, int index)
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ARM_INST_PTR INTERPRETER_TRANSLATE(ldrbt)(unsigned int inst, int index)
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{
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{
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arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(ldst_inst));
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arm_inst* inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(ldst_inst));
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ldst_inst *inst_cream = (ldst_inst *)inst_base->component;
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ldst_inst* inst_cream = (ldst_inst*)inst_base->component;
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inst_base->cond = BITS(inst, 28, 31);
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inst_base->cond = BITS(inst, 28, 31);
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inst_base->idx = index;
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inst_base->idx = index;
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inst_base->br = NON_BRANCH;
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inst_base->br = NON_BRANCH;
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inst_cream->inst = inst;
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inst_cream->inst = inst;
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if (I_BIT == 0) {
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if (BITS(inst, 25, 27) == 2) {
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inst_cream->get_addr = LnSWoUB(ImmediatePostIndexed);
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inst_cream->get_addr = LnSWoUB(ImmediatePostIndexed);
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} else if (BITS(inst, 25, 27) == 3) {
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inst_cream->get_addr = LnSWoUB(ScaledRegisterPostIndexed);
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} else {
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} else {
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DEBUG_MSG;
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DEBUG_MSG;
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}
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}
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#if 0
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inst_cream->get_addr = get_calc_addr_op(inst);
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if(inst == 0x54f13001) {
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DEBUG_LOG(ARM11, "get_calc_addr_op:%llx\n", inst_cream->get_addr);
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}
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#endif
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if (BITS(inst, 12, 15) == 15) {
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if (BITS(inst, 12, 15) == 15) {
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inst_base->br = INDIRECT_BRANCH;
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inst_base->br = INDIRECT_BRANCH;
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@ -2712,17 +2708,19 @@ ARM_INST_PTR INTERPRETER_TRANSLATE(strb)(unsigned int inst, int index)
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}
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}
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ARM_INST_PTR INTERPRETER_TRANSLATE(strbt)(unsigned int inst, int index)
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ARM_INST_PTR INTERPRETER_TRANSLATE(strbt)(unsigned int inst, int index)
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{
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{
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arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(ldst_inst));
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arm_inst* inst_base = (arm_inst*)AllocBuffer(sizeof(arm_inst) + sizeof(ldst_inst));
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ldst_inst *inst_cream = (ldst_inst *)inst_base->component;
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ldst_inst* inst_cream = (ldst_inst*)inst_base->component;
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inst_base->cond = BITS(inst, 28, 31);
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inst_base->cond = BITS(inst, 28, 31);
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inst_base->idx = index;
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inst_base->idx = index;
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inst_base->br = NON_BRANCH;
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inst_base->br = NON_BRANCH;
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inst_cream->inst = inst;
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inst_cream->inst = inst;
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// inst_cream->get_addr = get_calc_addr_op(inst);
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if (I_BIT == 0) {
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if (BITS(inst, 25, 27) == 2) {
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inst_cream->get_addr = LnSWoUB(ImmediatePostIndexed);
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inst_cream->get_addr = LnSWoUB(ImmediatePostIndexed);
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} else if (BITS(inst, 25, 27) == 3) {
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inst_cream->get_addr = LnSWoUB(ScaledRegisterPostIndexed);
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} else {
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} else {
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DEBUG_MSG;
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DEBUG_MSG;
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}
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}
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