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Dyncom: Support for a missing ARMv6 Thumb MOV encoding
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parent
41513cfb0c
commit
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1 changed files with 4 additions and 10 deletions
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@ -130,14 +130,13 @@ tdstate thumb_translate(u32 addr, u32 instr, u32* ainstr, u32* inst_size) {
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}
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} else {
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ARMword Rd = ((tinstr & 0x0007) >> 0);
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ARMword Rs = ((tinstr & 0x0038) >> 3);
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ARMword Rs = ((tinstr & 0x0078) >> 3);
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if (tinstr & (1 << 7))
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Rd += 8;
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if (tinstr & (1 << 6))
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Rs += 8;
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switch ((tinstr & 0x03C0) >> 6) {
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case 0x0: // ADD Rd,Rd,Rs
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case 0x1: // ADD Rd,Rd,Hs
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case 0x2: // ADD Hd,Hd,Rs
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case 0x3: // ADD Hd,Hd,Hs
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@ -146,19 +145,19 @@ tdstate thumb_translate(u32 addr, u32 instr, u32* ainstr, u32* inst_size) {
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|(Rd << 12) // Rd
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|(Rs << 0); // Rm
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break;
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case 0x4: // CMP Rd,Rs
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case 0x5: // CMP Rd,Hs
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case 0x6: // CMP Hd,Rs
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case 0x7: // CMP Hd,Hs
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*ainstr = 0xE1500000 // base
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| (Rd << 16) // Rn
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|(Rd << 12) // Rd
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|(Rs << 0); // Rm
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break;
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case 0x8: // MOV Rd,Rs
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case 0x9: // MOV Rd,Hs
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case 0xA: // MOV Hd,Rs
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case 0xB: // MOV Hd,Hs
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*ainstr = 0xE1A00000 // base
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| (Rd << 16) // Rn
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|(Rd << 12) // Rd
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|(Rs << 0); // Rm
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break;
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@ -167,11 +166,6 @@ tdstate thumb_translate(u32 addr, u32 instr, u32* ainstr, u32* inst_size) {
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*ainstr = 0xE12FFF10 // base
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| ((tinstr & 0x0078) >> 3); // Rd
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break;
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case 0x0: // UNDEFINED
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case 0x4: // UNDEFINED
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case 0x8: // UNDEFINED
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valid = t_undefined;
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break;
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case 0xE: // BLX
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case 0xF: // BLX
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*ainstr = 0xE1200030 // base
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