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fixed licensing issue with core_timing being GPL v2+ instead of Dolphin's GPL v2
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2 changed files with 444 additions and 476 deletions
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@ -1,22 +1,8 @@
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// Copyright (c) 2012- PPSSPP Project / Dolphin Project.
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// Copyright 2013 Dolphin Emulator Project
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// Licensed under GPLv2
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// Refer to the license.txt file included.
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// This program is free software: you can redistribute it and/or modify
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// it under the terms of the GNU General Public License as published by
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// the Free Software Foundation, version 2.0 or later versions.
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// This program is distributed in the hope that it will be useful,
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// but WITHOUT ANY WARRANTY; without even the implied warranty of
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// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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// GNU General Public License 2.0 for more details.
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// A copy of the GPL 2.0 should have been included with the program.
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// If not, see http://www.gnu.org/licenses/
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// Official git repository and contact information can be found at
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// https://github.com/hrydgard/ppsspp and http://www.ppsspp.org/.
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#ifndef CORE_CORE_TIMING_H_
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#define CORE_CORE_TIMING_H_
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#pragma once
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// This is a system to schedule events into the emulated machine's future. Time is measured
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// in main CPU clock cycles.
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@ -38,88 +24,86 @@ class PointerWrap;
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extern int g_clock_rate_arm11;
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inline s64 msToCycles(int ms) {
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return g_clock_rate_arm11 / 1000 * ms;
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return g_clock_rate_arm11 / 1000 * ms;
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}
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inline s64 msToCycles(float ms) {
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return (s64)(g_clock_rate_arm11 * ms * (0.001f));
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return (s64)(g_clock_rate_arm11 * ms * (0.001f));
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}
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inline s64 msToCycles(double ms) {
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return (s64)(g_clock_rate_arm11 * ms * (0.001));
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return (s64)(g_clock_rate_arm11 * ms * (0.001));
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}
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inline s64 usToCycles(float us) {
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return (s64)(g_clock_rate_arm11 * us * (0.000001f));
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return (s64)(g_clock_rate_arm11 * us * (0.000001f));
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}
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inline s64 usToCycles(int us) {
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return (g_clock_rate_arm11 / 1000000 * (s64)us);
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return (g_clock_rate_arm11 / 1000000 * (s64)us);
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}
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inline s64 usToCycles(s64 us) {
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return (g_clock_rate_arm11 / 1000000 * us);
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return (g_clock_rate_arm11 / 1000000 * us);
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}
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inline s64 usToCycles(u64 us) {
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return (s64)(g_clock_rate_arm11 / 1000000 * us);
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return (s64)(g_clock_rate_arm11 / 1000000 * us);
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}
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inline s64 cyclesToUs(s64 cycles) {
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return cycles / (g_clock_rate_arm11 / 1000000);
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return cycles / (g_clock_rate_arm11 / 1000000);
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}
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namespace CoreTiming
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{
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void Init();
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void Shutdown();
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namespace CoreTiming {
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typedef void (*TimedCallback)(u64 userdata, int cyclesLate);
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void Init();
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void Shutdown();
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u64 GetTicks();
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u64 GetIdleTicks();
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typedef void(*TimedCallback)(u64 userdata, int cyclesLate);
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// Returns the event_type identifier.
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int RegisterEvent(const char *name, TimedCallback callback);
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// For save states.
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void RestoreRegisterEvent(int event_type, const char *name, TimedCallback callback);
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void UnregisterAllEvents();
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u64 GetTicks();
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u64 GetIdleTicks();
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// userdata MAY NOT CONTAIN POINTERS. userdata might get written and reloaded from disk,
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// when we implement state saves.
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void ScheduleEvent(s64 cyclesIntoFuture, int event_type, u64 userdata=0);
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void ScheduleEvent_Threadsafe(s64 cyclesIntoFuture, int event_type, u64 userdata=0);
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void ScheduleEvent_Threadsafe_Immediate(int event_type, u64 userdata=0);
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s64 UnscheduleEvent(int event_type, u64 userdata);
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s64 UnscheduleThreadsafeEvent(int event_type, u64 userdata);
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// Returns the event_type identifier.
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int RegisterEvent(const char *name, TimedCallback callback);
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// For save states.
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void RestoreRegisterEvent(int event_type, const char *name, TimedCallback callback);
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void UnregisterAllEvents();
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void RemoveEvent(int event_type);
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void RemoveThreadsafeEvent(int event_type);
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void RemoveAllEvents(int event_type);
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bool IsScheduled(int event_type);
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void Advance();
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void MoveEvents();
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void ProcessFifoWaitEvents();
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// userdata MAY NOT CONTAIN POINTERS. userdata might get written and reloaded from disk,
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// when we implement state saves.
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void ScheduleEvent(s64 cyclesIntoFuture, int event_type, u64 userdata = 0);
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void ScheduleEvent_Threadsafe(s64 cyclesIntoFuture, int event_type, u64 userdata = 0);
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void ScheduleEvent_Threadsafe_Immediate(int event_type, u64 userdata = 0);
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s64 UnscheduleEvent(int event_type, u64 userdata);
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s64 UnscheduleThreadsafeEvent(int event_type, u64 userdata);
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// Pretend that the main CPU has executed enough cycles to reach the next event.
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void Idle(int maxIdle = 0);
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void RemoveEvent(int event_type);
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void RemoveThreadsafeEvent(int event_type);
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void RemoveAllEvents(int event_type);
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bool IsScheduled(int event_type);
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void Advance();
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void MoveEvents();
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void ProcessFifoWaitEvents();
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// Clear all pending events. This should ONLY be done on exit or state load.
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void ClearPendingEvents();
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// Pretend that the main CPU has executed enough cycles to reach the next event.
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void Idle(int maxIdle = 0);
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void LogPendingEvents();
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// Clear all pending events. This should ONLY be done on exit or state load.
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void ClearPendingEvents();
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// Warning: not included in save states.
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void RegisterAdvanceCallback(void (*callback)(int cyclesExecuted));
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void LogPendingEvents();
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std::string GetScheduledEventsSummary();
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// Warning: not included in save states.
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void RegisterAdvanceCallback(void(*callback)(int cyclesExecuted));
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void DoState(PointerWrap &p);
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std::string GetScheduledEventsSummary();
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void SetClockFrequencyMHz(int cpuMhz);
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int GetClockFrequencyMHz();
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extern int slicelength;
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void DoState(PointerWrap &p);
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void SetClockFrequencyMHz(int cpuMhz);
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int GetClockFrequencyMHz();
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extern int slicelength;
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}; // namespace
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#endif // CORE_CORE_TIMING_H_
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