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Merge pull request #2103 from wwylele/gpu-reg-cleanup
GPU: DisplayTransfer & MemoryFill cleanup and param check
This commit is contained in:
bunnei
GitHub
commit
49b10339bf
5 changed files with 347 additions and 247 deletions
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@ -80,6 +80,319 @@ static Math::Vec4<u8> DecodePixel(Regs::PixelFormat input_format, const u8* src_
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MICROPROFILE_DEFINE(GPU_DisplayTransfer, "GPU", "DisplayTransfer", MP_RGB(100, 100, 255));
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MICROPROFILE_DEFINE(GPU_CmdlistProcessing, "GPU", "Cmdlist Processing", MP_RGB(100, 255, 100));
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static void MemoryFill(const Regs::MemoryFillConfig& config) {
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const PAddr start_addr = config.GetStartAddress();
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const PAddr end_addr = config.GetEndAddress();
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// TODO: do hwtest with these cases
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if (!Memory::IsValidPhysicalAddress(start_addr)) {
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LOG_CRITICAL(HW_GPU, "invalid start address 0x%08X", start_addr);
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return;
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}
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if (!Memory::IsValidPhysicalAddress(end_addr)) {
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LOG_CRITICAL(HW_GPU, "invalid end address 0x%08X", end_addr);
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return;
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}
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if (end_addr <= start_addr) {
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LOG_CRITICAL(HW_GPU, "invalid memory range from 0x%08X to 0x%08X", start_addr, end_addr);
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return;
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}
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u8* start = Memory::GetPhysicalPointer(start_addr);
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u8* end = Memory::GetPhysicalPointer(end_addr);
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// TODO: Consider always accelerating and returning vector of
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// regions that the accelerated fill did not cover to
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// reduce/eliminate the fill that the cpu has to do.
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// This would also mean that the flush below is not needed.
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// Fill should first flush all surfaces that touch but are
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// not completely within the fill range.
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// Then fill all completely covered surfaces, and return the
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// regions that were between surfaces or within the touching
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// ones for cpu to manually fill here.
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if (VideoCore::g_renderer->Rasterizer()->AccelerateFill(config))
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return;
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Memory::RasterizerFlushAndInvalidateRegion(config.GetStartAddress(),
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config.GetEndAddress() - config.GetStartAddress());
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if (config.fill_24bit) {
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// fill with 24-bit values
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for (u8* ptr = start; ptr < end; ptr += 3) {
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ptr[0] = config.value_24bit_r;
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ptr[1] = config.value_24bit_g;
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ptr[2] = config.value_24bit_b;
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}
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} else if (config.fill_32bit) {
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// fill with 32-bit values
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if (end > start) {
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u32 value = config.value_32bit;
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size_t len = (end - start) / sizeof(u32);
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for (size_t i = 0; i < len; ++i)
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memcpy(&start[i * sizeof(u32)], &value, sizeof(u32));
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}
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} else {
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// fill with 16-bit values
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u16 value_16bit = config.value_16bit.Value();
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for (u8* ptr = start; ptr < end; ptr += sizeof(u16))
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memcpy(ptr, &value_16bit, sizeof(u16));
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}
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}
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static void DisplayTransfer(const Regs::DisplayTransferConfig& config) {
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const PAddr src_addr = config.GetPhysicalInputAddress();
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const PAddr dst_addr = config.GetPhysicalOutputAddress();
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// TODO: do hwtest with these cases
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if (!Memory::IsValidPhysicalAddress(src_addr)) {
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LOG_CRITICAL(HW_GPU, "invalid input address 0x%08X", src_addr);
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return;
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}
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if (!Memory::IsValidPhysicalAddress(dst_addr)) {
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LOG_CRITICAL(HW_GPU, "invalid output address 0x%08X", dst_addr);
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return;
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}
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if (config.input_width == 0) {
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LOG_CRITICAL(HW_GPU, "zero input width");
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return;
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}
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if (config.input_height == 0) {
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LOG_CRITICAL(HW_GPU, "zero input height");
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return;
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}
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if (config.output_width == 0) {
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LOG_CRITICAL(HW_GPU, "zero output width");
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return;
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}
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if (config.output_height == 0) {
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LOG_CRITICAL(HW_GPU, "zero output height");
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return;
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}
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if (VideoCore::g_renderer->Rasterizer()->AccelerateDisplayTransfer(config))
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return;
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u8* src_pointer = Memory::GetPhysicalPointer(src_addr);
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u8* dst_pointer = Memory::GetPhysicalPointer(dst_addr);
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if (config.scaling > config.ScaleXY) {
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LOG_CRITICAL(HW_GPU, "Unimplemented display transfer scaling mode %u",
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config.scaling.Value());
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UNIMPLEMENTED();
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return;
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}
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if (config.input_linear && config.scaling != config.NoScale) {
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LOG_CRITICAL(HW_GPU, "Scaling is only implemented on tiled input");
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UNIMPLEMENTED();
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return;
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}
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int horizontal_scale = config.scaling != config.NoScale ? 1 : 0;
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int vertical_scale = config.scaling == config.ScaleXY ? 1 : 0;
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u32 output_width = config.output_width >> horizontal_scale;
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u32 output_height = config.output_height >> vertical_scale;
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u32 input_size =
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config.input_width * config.input_height * GPU::Regs::BytesPerPixel(config.input_format);
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u32 output_size = output_width * output_height * GPU::Regs::BytesPerPixel(config.output_format);
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Memory::RasterizerFlushRegion(config.GetPhysicalInputAddress(), input_size);
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Memory::RasterizerFlushAndInvalidateRegion(config.GetPhysicalOutputAddress(), output_size);
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for (u32 y = 0; y < output_height; ++y) {
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for (u32 x = 0; x < output_width; ++x) {
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Math::Vec4<u8> src_color;
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// Calculate the [x,y] position of the input image
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// based on the current output position and the scale
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u32 input_x = x << horizontal_scale;
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u32 input_y = y << vertical_scale;
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u32 output_y;
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if (config.flip_vertically) {
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// Flip the y value of the output data,
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// we do this after calculating the [x,y] position of the input image
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// to account for the scaling options.
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output_y = output_height - y - 1;
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} else {
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output_y = y;
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}
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u32 dst_bytes_per_pixel = GPU::Regs::BytesPerPixel(config.output_format);
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u32 src_bytes_per_pixel = GPU::Regs::BytesPerPixel(config.input_format);
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u32 src_offset;
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u32 dst_offset;
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if (config.input_linear) {
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if (!config.dont_swizzle) {
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// Interpret the input as linear and the output as tiled
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u32 coarse_y = output_y & ~7;
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u32 stride = output_width * dst_bytes_per_pixel;
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src_offset = (input_x + input_y * config.input_width) * src_bytes_per_pixel;
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dst_offset = VideoCore::GetMortonOffset(x, output_y, dst_bytes_per_pixel) +
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coarse_y * stride;
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} else {
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// Both input and output are linear
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src_offset = (input_x + input_y * config.input_width) * src_bytes_per_pixel;
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dst_offset = (x + output_y * output_width) * dst_bytes_per_pixel;
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}
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} else {
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if (!config.dont_swizzle) {
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// Interpret the input as tiled and the output as linear
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u32 coarse_y = input_y & ~7;
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u32 stride = config.input_width * src_bytes_per_pixel;
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src_offset = VideoCore::GetMortonOffset(input_x, input_y, src_bytes_per_pixel) +
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coarse_y * stride;
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dst_offset = (x + output_y * output_width) * dst_bytes_per_pixel;
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} else {
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// Both input and output are tiled
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u32 out_coarse_y = output_y & ~7;
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u32 out_stride = output_width * dst_bytes_per_pixel;
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u32 in_coarse_y = input_y & ~7;
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u32 in_stride = config.input_width * src_bytes_per_pixel;
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src_offset = VideoCore::GetMortonOffset(input_x, input_y, src_bytes_per_pixel) +
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in_coarse_y * in_stride;
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dst_offset = VideoCore::GetMortonOffset(x, output_y, dst_bytes_per_pixel) +
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out_coarse_y * out_stride;
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}
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}
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const u8* src_pixel = src_pointer + src_offset;
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src_color = DecodePixel(config.input_format, src_pixel);
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if (config.scaling == config.ScaleX) {
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Math::Vec4<u8> pixel =
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DecodePixel(config.input_format, src_pixel + src_bytes_per_pixel);
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src_color = ((src_color + pixel) / 2).Cast<u8>();
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} else if (config.scaling == config.ScaleXY) {
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Math::Vec4<u8> pixel1 =
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DecodePixel(config.input_format, src_pixel + 1 * src_bytes_per_pixel);
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Math::Vec4<u8> pixel2 =
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DecodePixel(config.input_format, src_pixel + 2 * src_bytes_per_pixel);
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Math::Vec4<u8> pixel3 =
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DecodePixel(config.input_format, src_pixel + 3 * src_bytes_per_pixel);
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src_color = (((src_color + pixel1) + (pixel2 + pixel3)) / 4).Cast<u8>();
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}
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u8* dst_pixel = dst_pointer + dst_offset;
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switch (config.output_format) {
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case Regs::PixelFormat::RGBA8:
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Color::EncodeRGBA8(src_color, dst_pixel);
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break;
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case Regs::PixelFormat::RGB8:
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Color::EncodeRGB8(src_color, dst_pixel);
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break;
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case Regs::PixelFormat::RGB565:
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Color::EncodeRGB565(src_color, dst_pixel);
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break;
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case Regs::PixelFormat::RGB5A1:
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Color::EncodeRGB5A1(src_color, dst_pixel);
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break;
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case Regs::PixelFormat::RGBA4:
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Color::EncodeRGBA4(src_color, dst_pixel);
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break;
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default:
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LOG_ERROR(HW_GPU, "Unknown destination framebuffer format %x",
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config.output_format.Value());
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break;
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}
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}
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}
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}
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static void TextureCopy(const Regs::DisplayTransferConfig& config) {
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const PAddr src_addr = config.GetPhysicalInputAddress();
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const PAddr dst_addr = config.GetPhysicalOutputAddress();
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// TODO: do hwtest with these cases
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if (!Memory::IsValidPhysicalAddress(src_addr)) {
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LOG_CRITICAL(HW_GPU, "invalid input address 0x%08X", src_addr);
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return;
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}
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if (!Memory::IsValidPhysicalAddress(dst_addr)) {
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LOG_CRITICAL(HW_GPU, "invalid output address 0x%08X", dst_addr);
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return;
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}
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if (config.texture_copy.input_width == 0) {
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LOG_CRITICAL(HW_GPU, "zero input width");
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return;
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}
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if (config.texture_copy.output_width == 0) {
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LOG_CRITICAL(HW_GPU, "zero output width");
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return;
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}
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if (config.texture_copy.size == 0) {
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LOG_CRITICAL(HW_GPU, "zero size");
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return;
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}
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if (VideoCore::g_renderer->Rasterizer()->AccelerateTextureCopy(config))
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return;
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u8* src_pointer = Memory::GetPhysicalPointer(src_addr);
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u8* dst_pointer = Memory::GetPhysicalPointer(dst_addr);
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u32 input_width = config.texture_copy.input_width * 16;
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u32 input_gap = config.texture_copy.input_gap * 16;
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u32 output_width = config.texture_copy.output_width * 16;
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u32 output_gap = config.texture_copy.output_gap * 16;
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size_t contiguous_input_size =
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config.texture_copy.size / input_width * (input_width + input_gap);
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Memory::RasterizerFlushRegion(config.GetPhysicalInputAddress(),
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static_cast<u32>(contiguous_input_size));
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size_t contiguous_output_size =
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config.texture_copy.size / output_width * (output_width + output_gap);
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Memory::RasterizerFlushAndInvalidateRegion(config.GetPhysicalOutputAddress(),
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static_cast<u32>(contiguous_output_size));
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u32 remaining_size = config.texture_copy.size;
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u32 remaining_input = input_width;
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u32 remaining_output = output_width;
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while (remaining_size > 0) {
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u32 copy_size = std::min({remaining_input, remaining_output, remaining_size});
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std::memcpy(dst_pointer, src_pointer, copy_size);
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src_pointer += copy_size;
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dst_pointer += copy_size;
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remaining_input -= copy_size;
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remaining_output -= copy_size;
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remaining_size -= copy_size;
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if (remaining_input == 0) {
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remaining_input = input_width;
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src_pointer += input_gap;
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}
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if (remaining_output == 0) {
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remaining_output = output_width;
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dst_pointer += output_gap;
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}
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}
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}
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template <typename T>
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inline void Write(u32 addr, const T data) {
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addr -= HW::VADDR_GPU;
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@ -102,50 +415,13 @@ inline void Write(u32 addr, const T data) {
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auto& config = g_regs.memory_fill_config[is_second_filler];
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if (config.trigger) {
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if (config.address_start) { // Some games pass invalid values here
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u8* start = Memory::GetPhysicalPointer(config.GetStartAddress());
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u8* end = Memory::GetPhysicalPointer(config.GetEndAddress());
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// TODO: Consider always accelerating and returning vector of
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// regions that the accelerated fill did not cover to
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// reduce/eliminate the fill that the cpu has to do.
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// This would also mean that the flush below is not needed.
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// Fill should first flush all surfaces that touch but are
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// not completely within the fill range.
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// Then fill all completely covered surfaces, and return the
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// regions that were between surfaces or within the touching
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// ones for cpu to manually fill here.
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if (!VideoCore::g_renderer->Rasterizer()->AccelerateFill(config)) {
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Memory::RasterizerFlushAndInvalidateRegion(config.GetStartAddress(),
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config.GetEndAddress() -
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config.GetStartAddress());
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if (config.fill_24bit) {
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// fill with 24-bit values
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for (u8* ptr = start; ptr < end; ptr += 3) {
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ptr[0] = config.value_24bit_r;
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ptr[1] = config.value_24bit_g;
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ptr[2] = config.value_24bit_b;
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}
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} else if (config.fill_32bit) {
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// fill with 32-bit values
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if (end > start) {
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u32 value = config.value_32bit;
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size_t len = (end - start) / sizeof(u32);
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for (size_t i = 0; i < len; ++i)
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memcpy(&start[i * sizeof(u32)], &value, sizeof(u32));
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}
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} else {
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// fill with 16-bit values
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u16 value_16bit = config.value_16bit.Value();
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for (u8* ptr = start; ptr < end; ptr += sizeof(u16))
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memcpy(ptr, &value_16bit, sizeof(u16));
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}
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}
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LOG_TRACE(HW_GPU, "MemoryFill from 0x%08x to 0x%08x", config.GetStartAddress(),
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config.GetEndAddress());
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MemoryFill(config);
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LOG_TRACE(HW_GPU, "MemoryFill from 0x%08x to 0x%08x", config.GetStartAddress(),
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config.GetEndAddress());
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// It seems that it won't signal interrupt if "address_start" is zero.
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// TODO: hwtest this
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if (config.GetStartAddress() != 0) {
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if (!is_second_filler) {
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GSP_GPU::SignalInterrupt(GSP_GPU::InterruptId::PSC0);
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} else {
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@ -171,207 +447,22 @@ inline void Write(u32 addr, const T data) {
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Pica::g_debug_context->OnEvent(Pica::DebugContext::Event::IncomingDisplayTransfer,
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nullptr);
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if (!VideoCore::g_renderer->Rasterizer()->AccelerateDisplayTransfer(config)) {
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u8* src_pointer = Memory::GetPhysicalPointer(config.GetPhysicalInputAddress());
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u8* dst_pointer = Memory::GetPhysicalPointer(config.GetPhysicalOutputAddress());
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if (config.is_texture_copy) {
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u32 input_width = config.texture_copy.input_width * 16;
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u32 input_gap = config.texture_copy.input_gap * 16;
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u32 output_width = config.texture_copy.output_width * 16;
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u32 output_gap = config.texture_copy.output_gap * 16;
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size_t contiguous_input_size =
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config.texture_copy.size / input_width * (input_width + input_gap);
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Memory::RasterizerFlushRegion(config.GetPhysicalInputAddress(),
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static_cast<u32>(contiguous_input_size));
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size_t contiguous_output_size =
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config.texture_copy.size / output_width * (output_width + output_gap);
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Memory::RasterizerFlushAndInvalidateRegion(
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config.GetPhysicalOutputAddress(),
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static_cast<u32>(contiguous_output_size));
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u32 remaining_size = config.texture_copy.size;
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u32 remaining_input = input_width;
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u32 remaining_output = output_width;
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while (remaining_size > 0) {
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u32 copy_size =
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std::min({remaining_input, remaining_output, remaining_size});
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std::memcpy(dst_pointer, src_pointer, copy_size);
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src_pointer += copy_size;
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dst_pointer += copy_size;
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remaining_input -= copy_size;
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remaining_output -= copy_size;
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remaining_size -= copy_size;
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if (remaining_input == 0) {
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remaining_input = input_width;
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src_pointer += input_gap;
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}
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if (remaining_output == 0) {
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remaining_output = output_width;
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dst_pointer += output_gap;
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}
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}
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LOG_TRACE(
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HW_GPU,
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"TextureCopy: 0x%X bytes from 0x%08X(%u+%u)-> 0x%08X(%u+%u), flags 0x%08X",
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config.texture_copy.size, config.GetPhysicalInputAddress(), input_width,
|
||||
input_gap, config.GetPhysicalOutputAddress(), output_width, output_gap,
|
||||
config.flags);
|
||||
|
||||
GSP_GPU::SignalInterrupt(GSP_GPU::InterruptId::PPF);
|
||||
break;
|
||||
}
|
||||
|
||||
if (config.scaling > config.ScaleXY) {
|
||||
LOG_CRITICAL(HW_GPU, "Unimplemented display transfer scaling mode %u",
|
||||
config.scaling.Value());
|
||||
UNIMPLEMENTED();
|
||||
break;
|
||||
}
|
||||
|
||||
if (config.input_linear && config.scaling != config.NoScale) {
|
||||
LOG_CRITICAL(HW_GPU, "Scaling is only implemented on tiled input");
|
||||
UNIMPLEMENTED();
|
||||
break;
|
||||
}
|
||||
|
||||
int horizontal_scale = config.scaling != config.NoScale ? 1 : 0;
|
||||
int vertical_scale = config.scaling == config.ScaleXY ? 1 : 0;
|
||||
|
||||
u32 output_width = config.output_width >> horizontal_scale;
|
||||
u32 output_height = config.output_height >> vertical_scale;
|
||||
|
||||
u32 input_size = config.input_width * config.input_height *
|
||||
GPU::Regs::BytesPerPixel(config.input_format);
|
||||
u32 output_size =
|
||||
output_width * output_height * GPU::Regs::BytesPerPixel(config.output_format);
|
||||
|
||||
Memory::RasterizerFlushRegion(config.GetPhysicalInputAddress(), input_size);
|
||||
Memory::RasterizerFlushAndInvalidateRegion(config.GetPhysicalOutputAddress(),
|
||||
output_size);
|
||||
|
||||
for (u32 y = 0; y < output_height; ++y) {
|
||||
for (u32 x = 0; x < output_width; ++x) {
|
||||
Math::Vec4<u8> src_color;
|
||||
|
||||
// Calculate the [x,y] position of the input image
|
||||
// based on the current output position and the scale
|
||||
u32 input_x = x << horizontal_scale;
|
||||
u32 input_y = y << vertical_scale;
|
||||
|
||||
if (config.flip_vertically) {
|
||||
// Flip the y value of the output data,
|
||||
// we do this after calculating the [x,y] position of the input image
|
||||
// to account for the scaling options.
|
||||
y = output_height - y - 1;
|
||||
}
|
||||
|
||||
u32 dst_bytes_per_pixel = GPU::Regs::BytesPerPixel(config.output_format);
|
||||
u32 src_bytes_per_pixel = GPU::Regs::BytesPerPixel(config.input_format);
|
||||
u32 src_offset;
|
||||
u32 dst_offset;
|
||||
|
||||
if (config.input_linear) {
|
||||
if (!config.dont_swizzle) {
|
||||
// Interpret the input as linear and the output as tiled
|
||||
u32 coarse_y = y & ~7;
|
||||
u32 stride = output_width * dst_bytes_per_pixel;
|
||||
|
||||
src_offset =
|
||||
(input_x + input_y * config.input_width) * src_bytes_per_pixel;
|
||||
dst_offset = VideoCore::GetMortonOffset(x, y, dst_bytes_per_pixel) +
|
||||
coarse_y * stride;
|
||||
} else {
|
||||
// Both input and output are linear
|
||||
src_offset =
|
||||
(input_x + input_y * config.input_width) * src_bytes_per_pixel;
|
||||
dst_offset = (x + y * output_width) * dst_bytes_per_pixel;
|
||||
}
|
||||
} else {
|
||||
if (!config.dont_swizzle) {
|
||||
// Interpret the input as tiled and the output as linear
|
||||
u32 coarse_y = input_y & ~7;
|
||||
u32 stride = config.input_width * src_bytes_per_pixel;
|
||||
|
||||
src_offset = VideoCore::GetMortonOffset(input_x, input_y,
|
||||
src_bytes_per_pixel) +
|
||||
coarse_y * stride;
|
||||
dst_offset = (x + y * output_width) * dst_bytes_per_pixel;
|
||||
} else {
|
||||
// Both input and output are tiled
|
||||
u32 out_coarse_y = y & ~7;
|
||||
u32 out_stride = output_width * dst_bytes_per_pixel;
|
||||
|
||||
u32 in_coarse_y = input_y & ~7;
|
||||
u32 in_stride = config.input_width * src_bytes_per_pixel;
|
||||
|
||||
src_offset = VideoCore::GetMortonOffset(input_x, input_y,
|
||||
src_bytes_per_pixel) +
|
||||
in_coarse_y * in_stride;
|
||||
dst_offset = VideoCore::GetMortonOffset(x, y, dst_bytes_per_pixel) +
|
||||
out_coarse_y * out_stride;
|
||||
}
|
||||
}
|
||||
|
||||
const u8* src_pixel = src_pointer + src_offset;
|
||||
src_color = DecodePixel(config.input_format, src_pixel);
|
||||
if (config.scaling == config.ScaleX) {
|
||||
Math::Vec4<u8> pixel =
|
||||
DecodePixel(config.input_format, src_pixel + src_bytes_per_pixel);
|
||||
src_color = ((src_color + pixel) / 2).Cast<u8>();
|
||||
} else if (config.scaling == config.ScaleXY) {
|
||||
Math::Vec4<u8> pixel1 = DecodePixel(
|
||||
config.input_format, src_pixel + 1 * src_bytes_per_pixel);
|
||||
Math::Vec4<u8> pixel2 = DecodePixel(
|
||||
config.input_format, src_pixel + 2 * src_bytes_per_pixel);
|
||||
Math::Vec4<u8> pixel3 = DecodePixel(
|
||||
config.input_format, src_pixel + 3 * src_bytes_per_pixel);
|
||||
src_color = (((src_color + pixel1) + (pixel2 + pixel3)) / 4).Cast<u8>();
|
||||
}
|
||||
|
||||
u8* dst_pixel = dst_pointer + dst_offset;
|
||||
switch (config.output_format) {
|
||||
case Regs::PixelFormat::RGBA8:
|
||||
Color::EncodeRGBA8(src_color, dst_pixel);
|
||||
break;
|
||||
|
||||
case Regs::PixelFormat::RGB8:
|
||||
Color::EncodeRGB8(src_color, dst_pixel);
|
||||
break;
|
||||
|
||||
case Regs::PixelFormat::RGB565:
|
||||
Color::EncodeRGB565(src_color, dst_pixel);
|
||||
break;
|
||||
|
||||
case Regs::PixelFormat::RGB5A1:
|
||||
Color::EncodeRGB5A1(src_color, dst_pixel);
|
||||
break;
|
||||
|
||||
case Regs::PixelFormat::RGBA4:
|
||||
Color::EncodeRGBA4(src_color, dst_pixel);
|
||||
break;
|
||||
|
||||
default:
|
||||
LOG_ERROR(HW_GPU, "Unknown destination framebuffer format %x",
|
||||
config.output_format.Value());
|
||||
break;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
LOG_TRACE(HW_GPU, "DisplayTriggerTransfer: 0x%08x bytes from 0x%08x(%ux%u)-> "
|
||||
if (config.is_texture_copy) {
|
||||
TextureCopy(config);
|
||||
LOG_TRACE(HW_GPU, "TextureCopy: 0x%X bytes from 0x%08X(%u+%u)-> "
|
||||
"0x%08X(%u+%u), flags 0x%08X",
|
||||
config.texture_copy.size, config.GetPhysicalInputAddress(),
|
||||
config.texture_copy.input_width * 16, config.texture_copy.input_gap * 16,
|
||||
config.GetPhysicalOutputAddress(), config.texture_copy.output_width * 16,
|
||||
config.texture_copy.output_gap * 16, config.flags);
|
||||
} else {
|
||||
DisplayTransfer(config);
|
||||
LOG_TRACE(HW_GPU, "DisplayTransfer: 0x%08x(%ux%u)-> "
|
||||
"0x%08x(%ux%u), dst format %x, flags 0x%08X",
|
||||
config.output_height * output_width *
|
||||
GPU::Regs::BytesPerPixel(config.output_format),
|
||||
config.GetPhysicalInputAddress(), config.input_width.Value(),
|
||||
config.input_height.Value(), config.GetPhysicalOutputAddress(),
|
||||
output_width, output_height, config.output_format.Value(), config.flags);
|
||||
config.output_width.Value(), config.output_height.Value(),
|
||||
config.output_format.Value(), config.flags);
|
||||
}
|
||||
|
||||
g_regs.display_transfer_config.trigger = 0;
|
||||
|
|
|
|||
|
|
@ -251,6 +251,9 @@ bool IsValidVirtualAddress(const VAddr vaddr) {
|
|||
if (page_pointer)
|
||||
return true;
|
||||
|
||||
if (current_page_table->attributes[vaddr >> PAGE_BITS] == PageType::RasterizerCachedMemory)
|
||||
return true;
|
||||
|
||||
if (current_page_table->attributes[vaddr >> PAGE_BITS] != PageType::Special)
|
||||
return false;
|
||||
|
||||
|
|
|
|||
|
|
@ -42,11 +42,16 @@ public:
|
|||
/// and invalidated
|
||||
virtual void FlushAndInvalidateRegion(PAddr addr, u32 size) = 0;
|
||||
|
||||
/// Attempt to use a faster method to perform a display transfer
|
||||
/// Attempt to use a faster method to perform a display transfer with is_texture_copy = 0
|
||||
virtual bool AccelerateDisplayTransfer(const GPU::Regs::DisplayTransferConfig& config) {
|
||||
return false;
|
||||
}
|
||||
|
||||
/// Attempt to use a faster method to perform a display transfer with is_texture_copy = 1
|
||||
virtual bool AccelerateTextureCopy(const GPU::Regs::DisplayTransferConfig& config) {
|
||||
return false;
|
||||
}
|
||||
|
||||
/// Attempt to use a faster method to fill a region
|
||||
virtual bool AccelerateFill(const GPU::Regs::MemoryFillConfig& config) {
|
||||
return false;
|
||||
|
|
|
|||
|
|
@ -709,11 +709,6 @@ bool RasterizerOpenGL::AccelerateDisplayTransfer(const GPU::Regs::DisplayTransfe
|
|||
using PixelFormat = CachedSurface::PixelFormat;
|
||||
using SurfaceType = CachedSurface::SurfaceType;
|
||||
|
||||
if (config.is_texture_copy) {
|
||||
// TODO(tfarley): Try to hardware accelerate this
|
||||
return false;
|
||||
}
|
||||
|
||||
CachedSurface src_params;
|
||||
src_params.addr = config.GetPhysicalInputAddress();
|
||||
src_params.width = config.output_width;
|
||||
|
|
@ -768,6 +763,11 @@ bool RasterizerOpenGL::AccelerateDisplayTransfer(const GPU::Regs::DisplayTransfe
|
|||
return true;
|
||||
}
|
||||
|
||||
bool RasterizerOpenGL::AccelerateTextureCopy(const GPU::Regs::DisplayTransferConfig& config) {
|
||||
// TODO(tfarley): Try to hardware accelerate this
|
||||
return false;
|
||||
}
|
||||
|
||||
bool RasterizerOpenGL::AccelerateFill(const GPU::Regs::MemoryFillConfig& config) {
|
||||
using PixelFormat = CachedSurface::PixelFormat;
|
||||
using SurfaceType = CachedSurface::SurfaceType;
|
||||
|
|
|
|||
|
|
@ -238,6 +238,7 @@ public:
|
|||
void FlushRegion(PAddr addr, u32 size) override;
|
||||
void FlushAndInvalidateRegion(PAddr addr, u32 size) override;
|
||||
bool AccelerateDisplayTransfer(const GPU::Regs::DisplayTransferConfig& config) override;
|
||||
bool AccelerateTextureCopy(const GPU::Regs::DisplayTransferConfig& config) override;
|
||||
bool AccelerateFill(const GPU::Regs::MemoryFillConfig& config) override;
|
||||
bool AccelerateDisplay(const GPU::Regs::FramebufferConfig& config, PAddr framebuffer_addr,
|
||||
u32 pixel_stride, ScreenInfo& screen_info) override;
|
||||
|
|
|
|||
Loading…
Reference in a new issue