mirror of
https://github.com/PabloMK7/citra.git
synced 2024-11-25 00:44:05 +00:00
ARM: Fixed dyncom to use reg15 for PC (this core doesn't use pc variable).
- Fixes single stepping in debugger.
This commit is contained in:
parent
ce1125d490
commit
b8e6f52419
1 changed files with 2 additions and 2 deletions
|
@ -60,7 +60,7 @@ void ARM_DynCom::SetPC(u32 pc) {
|
|||
* @return Returns current PC
|
||||
*/
|
||||
u32 ARM_DynCom::GetPC() const {
|
||||
return state->pc;
|
||||
return state->Reg[15];
|
||||
}
|
||||
|
||||
/**
|
||||
|
@ -129,7 +129,7 @@ void ARM_DynCom::SaveContext(ThreadContext& ctx) {
|
|||
|
||||
ctx.sp = state->Reg[13];
|
||||
ctx.lr = state->Reg[14];
|
||||
ctx.pc = state->pc;
|
||||
ctx.pc = state->Reg[15];
|
||||
ctx.cpsr = state->Cpsr;
|
||||
|
||||
ctx.fpscr = state->VFP[1];
|
||||
|
|
Loading…
Reference in a new issue