forked from Mirror/Ryujinx
clkrst: Stub/Implement IClkrstManager and IClkrstSession calls (#2692)
This PR stubs and implements some clkrst call because they are used to overclock the Switch hardware and it's pointless in our case as we emulate the system. Everything was done checked by RE. Fixes #2686
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6 changed files with 220 additions and 3 deletions
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@ -49,6 +49,7 @@ namespace Ryujinx.Common.Logging
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ServiceNv,
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ServiceOlsc,
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ServicePctl,
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ServicePcv,
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ServicePl,
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ServicePrepo,
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ServicePsm,
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@ -0,0 +1,62 @@
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using Ryujinx.Common.Logging;
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using Ryujinx.HLE.HOS.Services.Pcv.Types;
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using System.Linq;
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namespace Ryujinx.HLE.HOS.Services.Pcv.Clkrst.ClkrstManager
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{
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class IClkrstSession : IpcService
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{
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private DeviceCode _deviceCode;
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private uint _unknown;
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private uint _clockRate;
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private DeviceCode[] allowedDeviceCodeTable = new DeviceCode[]
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{
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DeviceCode.Cpu, DeviceCode.Gpu, DeviceCode.Disp1, DeviceCode.Disp2,
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DeviceCode.Tsec, DeviceCode.Mselect, DeviceCode.Sor1, DeviceCode.Host1x,
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DeviceCode.Vic, DeviceCode.Nvenc, DeviceCode.Nvjpg, DeviceCode.Nvdec,
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DeviceCode.Ape, DeviceCode.AudioDsp, DeviceCode.Emc, DeviceCode.Dsi,
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DeviceCode.SysBus, DeviceCode.XusbSs, DeviceCode.XusbHost, DeviceCode.XusbDevice,
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DeviceCode.Gpuaux, DeviceCode.Pcie, DeviceCode.Apbdma, DeviceCode.Sdmmc1,
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DeviceCode.Sdmmc2, DeviceCode.Sdmmc4
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};
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public IClkrstSession(DeviceCode deviceCode, uint unknown)
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{
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_deviceCode = deviceCode;
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_unknown = unknown;
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}
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[CommandHipc(7)]
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// SetClockRate(u32 hz)
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public ResultCode SetClockRate(ServiceCtx context)
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{
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if (!allowedDeviceCodeTable.Contains(_deviceCode))
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{
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return ResultCode.InvalidArgument;
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}
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_clockRate = context.RequestData.ReadUInt32();
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Logger.Stub?.PrintStub(LogClass.ServicePcv, new { _clockRate });
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return ResultCode.Success;
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}
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[CommandHipc(8)]
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// GetClockRate() -> u32 hz
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public ResultCode GetClockRate(ServiceCtx context)
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{
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if (!allowedDeviceCodeTable.Contains(_deviceCode))
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{
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return ResultCode.InvalidArgument;
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}
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context.ResponseData.Write(_clockRate);
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Logger.Stub?.PrintStub(LogClass.ServicePcv, new { _clockRate });
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return ResultCode.Success;
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}
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}
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}
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@ -1,9 +1,57 @@
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namespace Ryujinx.HLE.HOS.Services.Pcv.Clkrst
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using Ryujinx.HLE.HOS.Ipc;
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using Ryujinx.HLE.HOS.Kernel.Common;
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using Ryujinx.HLE.HOS.Services.Pcv.Clkrst.ClkrstManager;
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using Ryujinx.HLE.HOS.Services.Pcv.Types;
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using System;
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namespace Ryujinx.HLE.HOS.Services.Pcv.Clkrst
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{
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[Service("clkrst")] // 8.0.0+
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[Service("clkrst:i")] // 8.0.0+
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class IClkrstManager : IpcService
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{
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private int _moduleStateTableEventHandle = 0;
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public IClkrstManager(ServiceCtx context) { }
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[CommandHipc(0)]
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// OpenSession(u32 device_code, u32 unk) -> object<nn::clkrst::IClkrstSession>
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public ResultCode OpenSession(ServiceCtx context)
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{
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DeviceCode deviceCode = (DeviceCode)context.RequestData.ReadUInt32();
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uint unknown = context.RequestData.ReadUInt32();
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// TODO: Service checks the deviceCode and the unk value.
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MakeObject(context, new IClkrstSession(deviceCode, unknown));
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return ResultCode.Success;
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}
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[CommandHipc(4)]
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// GetModuleStateTableEvent() -> handle<copy>
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public ResultCode GetModuleStateTableEvent(ServiceCtx context)
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{
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if (_moduleStateTableEventHandle == 0)
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{
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if (context.Process.HandleTable.GenerateHandle(context.Device.System.IirsSharedMem, out _moduleStateTableEventHandle) != KernelResult.Success)
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{
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throw new InvalidOperationException("Out of handles!");
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}
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}
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context.Response.HandleDesc = IpcHandleDesc.MakeCopy(_moduleStateTableEventHandle);
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return ResultCode.Success;
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}
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[CommandHipc(5)]
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// GetModuleStateTableMaxCount() -> u32 max_count
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public ResultCode GetModuleStateTableMaxCount(ServiceCtx context)
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{
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context.ResponseData.Write(26u);
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return ResultCode.Success;
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}
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}
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}
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12
Ryujinx.HLE/HOS/Services/Pcv/ResultCode.cs
Normal file
12
Ryujinx.HLE/HOS/Services/Pcv/ResultCode.cs
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@ -0,0 +1,12 @@
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namespace Ryujinx.HLE.HOS.Services.Pcv
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{
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enum ResultCode
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{
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ModuleId = 30,
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ErrorCodeShift = 9,
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Success = 0,
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InvalidArgument = (5 << ErrorCodeShift) | ModuleId
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}
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}
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@ -1,8 +1,8 @@
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namespace Ryujinx.HLE.HOS.Services.Pcv.Rtc
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{
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[Service("rtc")] // 8.0.0+
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class IUnknown1 : IpcService
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class IRtcManager : IpcService
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{
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public IUnknown1(ServiceCtx context) { }
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public IRtcManager(ServiceCtx context) { }
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}
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}
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94
Ryujinx.HLE/HOS/Services/Pcv/Types/DeviceCode.cs
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94
Ryujinx.HLE/HOS/Services/Pcv/Types/DeviceCode.cs
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@ -0,0 +1,94 @@
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namespace Ryujinx.HLE.HOS.Services.Pcv.Types
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{
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enum DeviceCode
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{
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Cpu = 0x40000001,
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Gpu = 0x40000002,
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I2s1 = 0x40000003,
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I2s2 = 0x40000004,
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I2s3 = 0x40000005,
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Pwm = 0x40000006,
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I2c1 = 0x02000001,
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I2c2 = 0x02000002,
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I2c3 = 0x02000003,
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I2c4 = 0x02000004,
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I2c5 = 0x02000005,
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I2c6 = 0x02000006,
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Spi1 = 0x07000000,
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Spi2 = 0x07000001,
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Spi3 = 0x07000002,
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Spi4 = 0x07000003,
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Disp1 = 0x40000011,
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Disp2 = 0x40000012,
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Isp = 0x40000013,
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Vi = 0x40000014,
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Sdmmc1 = 0x40000015,
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Sdmmc2 = 0x40000016,
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Sdmmc3 = 0x40000017,
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Sdmmc4 = 0x40000018,
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Owr = 0x40000019,
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Csite = 0x4000001A,
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Tsec = 0x4000001B,
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Mselect = 0x4000001C,
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Hda2codec2x = 0x4000001D,
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Actmon = 0x4000001E,
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I2cSlow = 0x4000001F,
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Sor1 = 0x40000020,
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Sata = 0x40000021,
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Hda = 0x40000022,
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XusbCoreHostSrc = 0x40000023,
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XusbFalconSrc = 0x40000024,
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XusbFsSrc = 0x40000025,
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XusbCoreDevSrc = 0x40000026,
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XusbSsSrc = 0x40000027,
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UartA = 0x03000001,
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UartB = 0x35000405,
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UartC = 0x3500040F,
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UartD = 0x37000001,
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Host1x = 0x4000002C,
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Entropy = 0x4000002D,
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SocTherm = 0x4000002E,
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Vic = 0x4000002F,
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Nvenc = 0x40000030,
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Nvjpg = 0x40000031,
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Nvdec = 0x40000032,
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Qspi = 0x40000033,
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ViI2c = 0x40000034,
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Tsecb = 0x40000035,
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Ape = 0x40000036,
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AudioDsp = 0x40000037,
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AudioUart = 0x40000038,
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Emc = 0x40000039,
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Plle = 0x4000003A,
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PlleHwSeq = 0x4000003B,
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Dsi = 0x4000003C,
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Maud = 0x4000003D,
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Dpaux1 = 0x4000003E,
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MipiCal = 0x4000003F,
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UartFstMipiCal = 0x40000040,
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Osc = 0x40000041,
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SysBus = 0x40000042,
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SorSafe = 0x40000043,
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XusbSs = 0x40000044,
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XusbHost = 0x40000045,
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XusbDevice = 0x40000046,
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Extperiph1 = 0x40000047,
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Ahub = 0x40000048,
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Hda2hdmicodec = 0x40000049,
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Gpuaux = 0x4000004A,
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UsbD = 0x4000004B,
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Usb2 = 0x4000004C,
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Pcie = 0x4000004D,
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Afi = 0x4000004E,
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PciExClk = 0x4000004F,
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PExUsbPhy = 0x40000050,
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XUsbPadCtl = 0x40000051,
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Apbdma = 0x40000052,
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Usb2TrkClk = 0x40000053,
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XUsbIoPll = 0x40000054,
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XUsbIoPllHwSeq = 0x40000055,
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Cec = 0x40000056,
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Extperiph2 = 0x40000057,
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OscClk = 0x40000080
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}
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}
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