2020-12-29 02:48:26 +00:00
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//! Async low power UARTE.
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2020-12-28 15:17:36 +00:00
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//!
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2020-12-29 02:48:26 +00:00
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//! The peripheral is autmatically enabled and disabled as required to save power.
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//! Lowest power consumption can only be guaranteed if the send receive futures
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//! are dropped correctly (e.g. not using `mem::forget()`).
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2020-12-28 15:17:36 +00:00
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use core::cell::UnsafeCell;
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use core::cmp::min;
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2020-12-29 02:48:26 +00:00
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use core::future::Future;
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2020-12-28 15:17:36 +00:00
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use core::marker::PhantomPinned;
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use core::ops::Deref;
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use core::pin::Pin;
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use core::ptr;
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use core::sync::atomic::{compiler_fence, Ordering};
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use core::task::{Context, Poll};
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2020-12-28 19:13:43 +00:00
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use cortex_m::singleton;
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2020-12-28 15:17:36 +00:00
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2020-12-29 02:48:26 +00:00
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use embassy::util::Signal;
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use embedded_dma::{StaticReadBuffer, StaticWriteBuffer};
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use crate::fmt::assert;
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2020-12-28 19:13:43 +00:00
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use crate::hal::dma::config::DmaConfig;
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use crate::hal::dma::{Channel4, PeripheralToMemory, Stream2, StreamsTuple, Transfer};
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2020-12-29 02:48:26 +00:00
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use crate::hal::gpio::gpioa::{PA10, PA9};
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2020-12-28 15:55:49 +00:00
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use crate::hal::gpio::{Alternate, AF10, AF7, AF9};
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2020-12-28 22:43:29 +00:00
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use crate::hal::gpio::{Floating, Input, Output, PushPull};
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2020-12-29 02:48:26 +00:00
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use crate::hal::pac;
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use crate::hal::prelude::*;
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2020-12-28 22:43:29 +00:00
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use crate::hal::rcc::Clocks;
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use crate::hal::serial::config::{
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Config as SerialConfig, DmaConfig as SerialDmaConfig, Parity, StopBits, WordLength,
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2020-12-28 19:13:43 +00:00
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};
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2020-12-28 22:43:29 +00:00
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use crate::hal::serial::Serial;
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use crate::hal::time::Bps;
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2020-12-28 19:13:43 +00:00
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2020-12-28 15:17:36 +00:00
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use crate::interrupt;
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2020-12-29 02:48:26 +00:00
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2020-12-28 22:43:29 +00:00
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use crate::pac::Interrupt;
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use crate::pac::{DMA2, USART1};
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2020-12-28 15:55:49 +00:00
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use embedded_hal::digital::v2::OutputPin;
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2020-12-28 15:17:36 +00:00
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2020-12-29 02:48:26 +00:00
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// Re-export SVD variants to allow user to directly set values.
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// pub use pac::uarte0::{baudrate::BAUDRATE_A as Baudrate, config::PARITY_A as Parity};
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2020-12-28 15:17:36 +00:00
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2020-12-29 02:48:26 +00:00
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/// Interface to the UARTE peripheral
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pub struct Uarte {
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instance: Serial<USART1, (PA9<Alternate<AF7>>, PA10<Alternate<AF7>>)>,
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usart: USART1,
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dma: DMA2,
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2020-12-28 15:17:36 +00:00
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}
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2020-12-29 02:48:26 +00:00
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struct State {
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tx_done: Signal<()>,
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rx_done: Signal<u32>,
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2020-12-28 15:17:36 +00:00
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}
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2020-12-29 02:48:26 +00:00
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static STATE: State = State {
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tx_done: Signal::new(),
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rx_done: Signal::new(),
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};
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2020-12-28 15:17:36 +00:00
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2020-12-29 02:48:26 +00:00
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pub struct Pins {
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pub rxd: PA10<Alternate<AF7>>,
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pub txd: PA9<Alternate<AF7>>,
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pub dma: DMA2,
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pub usart: USART1,
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2020-12-28 15:17:36 +00:00
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}
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2020-12-29 02:48:26 +00:00
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impl Uarte {
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pub fn new(mut pins: Pins, parity: Parity, baudrate: Bps, clocks: Clocks) -> Self {
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// // Enable interrupts
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// uarte.events_endtx.reset();
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// uarte.events_endrx.reset();
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// uarte
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// .intenset
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// .write(|w| w.endtx().set().txstopped().set().endrx().set().rxto().set());
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// // TODO: Set interrupt priority?
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// interrupt::unpend(interrupt::UARTE0_UART0);
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// interrupt::enable(interrupt::UARTE0_UART0);
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2020-12-28 15:17:36 +00:00
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2020-12-28 15:55:49 +00:00
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// Serial<USART1, (PA9<Alternate<AF7>>, PA10<Alternate<AF7>>)>
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let mut serial = Serial::usart1(
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2020-12-28 22:43:29 +00:00
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pins.usart,
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2020-12-28 15:55:49 +00:00
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(pins.txd, pins.rxd),
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2020-12-28 22:43:29 +00:00
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SerialConfig {
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baudrate: baudrate,
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2020-12-28 15:55:49 +00:00
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wordlength: WordLength::DataBits8,
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parity: Parity::ParityNone,
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stopbits: StopBits::STOP1,
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2020-12-28 22:43:29 +00:00
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dma: SerialDmaConfig::TxRx,
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2020-12-28 15:55:49 +00:00
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},
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clocks,
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)
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.unwrap();
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2020-12-28 15:17:36 +00:00
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2020-12-29 02:48:26 +00:00
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let isr = pins.dma.hisr;0
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2020-12-28 15:17:36 +00:00
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2020-12-29 02:48:26 +00:00
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Uarte { instance: serial, dma: pins.dma, usart: pins.usart }
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2020-12-28 15:17:36 +00:00
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}
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2020-12-29 02:48:26 +00:00
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/// Sets the baudrate, parity and assigns the pins to the UARTE peripheral.
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// TODO: Make it take the same `Pins` structs nrf-hal (with optional RTS/CTS).
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// // TODO: #[cfg()] for smaller device variants without port register (nrf52810, ...).
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// pub fn configure(
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// &mut self,
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// rxd: &Pin<Input<Floating>>,
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// txd: &mut Pin<Output<PushPull>>,
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// parity: Parity,
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// baudrate: Baudrate,
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// ) {
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// let uarte = &self.instance;
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// assert!(uarte.enable.read().enable().is_disabled());
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//
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// uarte.psel.rxd.write(|w| {
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// let w = unsafe { w.pin().bits(rxd.pin()) };
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// let w = w.port().bit(rxd.port().bit());
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// w.connect().connected()
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// });
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//
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// txd.set_high().unwrap();
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// uarte.psel.txd.write(|w| {
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// let w = unsafe { w.pin().bits(txd.pin()) };
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// let w = w.port().bit(txd.port().bit());
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// w.connect().connected()
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// });
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//
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// uarte.baudrate.write(|w| w.baudrate().variant(baudrate));
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// uarte.config.write(|w| w.parity().variant(parity));
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// }
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// fn enable(&mut self) {
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// self.instance.enable.write(|w| w.enable().enabled());
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// }
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/// Sends serial data.
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///
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/// `tx_buffer` is marked as static as per `embedded-dma` requirements.
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/// It it safe to use a buffer with a non static lifetime if memory is not
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/// reused until the future has finished.
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pub fn send<'a, B>(&'a mut self, tx_buffer: B) -> SendFuture<'a, B>
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where
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B: StaticReadBuffer<Word = u8>,
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{
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// Panic if TX is running which can happen if the user has called
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// `mem::forget()` on a previous future after polling it once.
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assert!(!self.tx_started());
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self.enable();
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SendFuture {
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uarte: self,
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buf: tx_buffer,
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}
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2020-12-28 15:17:36 +00:00
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}
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2020-12-29 02:48:26 +00:00
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fn tx_started(&self) -> bool {
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// self.instance.events_txstarted.read().bits() != 0
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false
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2020-12-28 15:17:36 +00:00
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}
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2020-12-29 02:48:26 +00:00
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/// Receives serial data.
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///
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/// The future is pending until the buffer is completely filled.
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/// A common pattern is to use [`stop()`](ReceiveFuture::stop) to cancel
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/// unfinished transfers after a timeout to prevent lockup when no more data
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/// is incoming.
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///
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/// `rx_buffer` is marked as static as per `embedded-dma` requirements.
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/// It it safe to use a buffer with a non static lifetime if memory is not
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/// reused until the future has finished.
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pub fn receive<'a, B>(&'a mut self, rx_buffer: B) -> ReceiveFuture<'a, B>
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where
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B: StaticWriteBuffer<Word = u8>,
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{
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// Panic if RX is running which can happen if the user has called
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// `mem::forget()` on a previous future after polling it once.
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assert!(!self.rx_started());
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self.enable();
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ReceiveFuture {
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uarte: self,
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buf: Some(rx_buffer),
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2020-12-28 15:17:36 +00:00
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}
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}
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2020-12-29 02:48:26 +00:00
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fn rx_started(&self) -> bool {
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self.instance.events_rxstarted.read().bits() != 0
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2020-12-28 15:17:36 +00:00
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}
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2020-12-29 02:48:26 +00:00
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}
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2020-12-28 15:17:36 +00:00
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2020-12-29 02:48:26 +00:00
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/// Future for the [`LowPowerUarte::send()`] method.
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pub struct SendFuture<'a, B> {
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uarte: &'a Uarte,
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buf: B,
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}
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2020-12-28 15:17:36 +00:00
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2020-12-29 02:48:26 +00:00
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impl<'a, B> Drop for SendFuture<'a, B> {
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fn drop(self: &mut Self) {
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if self.uarte.tx_started() {
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trace!("stoptx");
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// Stop the transmitter to minimize the current consumption.
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self.uarte
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.instance
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.tasks_stoptx
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.write(|w| unsafe { w.bits(1) });
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self.uarte.instance.events_txstarted.reset();
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2020-12-28 15:17:36 +00:00
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}
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}
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2020-12-29 02:48:26 +00:00
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}
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2020-12-28 15:17:36 +00:00
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2020-12-29 02:48:26 +00:00
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impl<'a, B> Future for SendFuture<'a, B>
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where
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B: StaticReadBuffer<Word = u8>,
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{
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type Output = ();
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2020-12-28 15:17:36 +00:00
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2020-12-29 02:48:26 +00:00
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fn poll(self: core::pin::Pin<&mut Self>, cx: &mut Context<'_>) -> Poll<()> {
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if self.is_ready() {
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Poll::Ready(())
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} else {
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// Start DMA transaction
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let uarte = &self.uarte.instance;
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STATE.tx_done.reset();
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let (ptr, len) = unsafe { self.buf.read_buffer() };
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// assert!(len <= EASY_DMA_SIZE);
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// TODO: panic if buffer is not in SRAM
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compiler_fence(Ordering::SeqCst);
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// uarte.txd.ptr.write(|w| unsafe { w.ptr().bits(ptr as u32) });
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// uarte
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// .txd
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// .maxcnt
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// .write(|w| unsafe { w.maxcnt().bits(len as _) });
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// Start the DMA transfer
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// See https://github.com/mwkroening/async-stm32f1xx/blob/78c46d1bff124eae4ebc7a2f4d40e6ed74def8b5/src/serial.rs#L118-L129
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// https://github.com/stm32-rs/stm32f1xx-hal/blob/68fd3d6f282173816fd3181e795988d314cb17d0/src/serial.rs#L649-L671
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// let first_buffer = singleton!(: [u8; 128] = [0; 128]).unwrap();
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// let second_buffer = singleton!(: [u8; 128] = [0; 128]).unwrap();
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// let triple_buffer = Some(singleton!(: [u8; 128] = [0; 128]).unwrap());
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let transfer = Transfer::init(
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StreamsTuple::new(self.dma).2,
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self.usart,
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self.buf,
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// Some(second_buffer),
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None,
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DmaConfig::default()
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.transfer_complete_interrupt(true)
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.memory_increment(true)
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.double_buffer(false),
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);
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waker_interrupt!(DMA2_STREAM2, cx.waker().clone());
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Poll::Pending
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2020-12-28 15:17:36 +00:00
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}
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}
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}
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2020-12-29 02:48:26 +00:00
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/// Future for the [`Uarte::receive()`] method.
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pub struct ReceiveFuture<'a, B> {
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uarte: &'a Uarte,
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buf: Option<B>,
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2020-12-28 15:17:36 +00:00
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}
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2020-12-29 02:48:26 +00:00
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impl<'a, B> Drop for ReceiveFuture<'a, B> {
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fn drop(self: &mut Self) {
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if self.uarte.rx_started() {
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trace!("stoprx");
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2020-12-28 15:17:36 +00:00
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2020-12-29 02:48:26 +00:00
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self.uarte
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.instance
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.tasks_stoprx
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.write(|w| unsafe { w.bits(1) });
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self.uarte.instance.events_rxstarted.reset();
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}
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}
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2020-12-28 15:17:36 +00:00
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}
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2020-12-29 02:48:26 +00:00
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impl<'a, B> Future for ReceiveFuture<'a, B>
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where
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B: StaticWriteBuffer<Word = u8>,
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{
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type Output = B;
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2020-12-28 15:17:36 +00:00
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2020-12-29 02:48:26 +00:00
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fn poll(self: core::pin::Pin<&mut Self>, cx: &mut Context<'_>) -> Poll<B> {
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if self.is_ready() {
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Poll::Ready(())
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} else {
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// Start DMA transaction
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compiler_fence(Ordering::SeqCst);
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// uarte.txd.ptr.write(|w| unsafe { w.ptr().bits(ptr as u32) });
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// uarte
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// .txd
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// .maxcnt
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// .write(|w| unsafe { w.maxcnt().bits(len as _) });
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// Start the DMA transfer
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// See https://github.com/mwkroening/async-stm32f1xx/blob/78c46d1bff124eae4ebc7a2f4d40e6ed74def8b5/src/serial.rs#L118-L129
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// https://github.com/stm32-rs/stm32f1xx-hal/blob/68fd3d6f282173816fd3181e795988d314cb17d0/src/serial.rs#L649-L671
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// let first_buffer = singleton!(: [u8; 128] = [0; 128]).unwrap();
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// let second_buffer = singleton!(: [u8; 128] = [0; 128]).unwrap();
|
|
|
|
// let triple_buffer = Some(singleton!(: [u8; 128] = [0; 128]).unwrap());
|
|
|
|
|
|
|
|
let transfer = Transfer::init(
|
|
|
|
StreamsTuple::new(self.dma).7,
|
|
|
|
self.usart,
|
|
|
|
self.buf,
|
|
|
|
// Some(second_buffer),
|
|
|
|
None,
|
|
|
|
DmaConfig::default()
|
|
|
|
.transfer_complete_interrupt(true)
|
|
|
|
.memory_increment(true)
|
|
|
|
.double_buffer(false),
|
|
|
|
);
|
|
|
|
|
|
|
|
waker_interrupt!(DMA2_STREAM7, cx.waker().clone());
|
|
|
|
Poll::Pending
|
|
|
|
}
|
2020-12-28 15:17:36 +00:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2020-12-29 02:48:26 +00:00
|
|
|
/// Future for the [`receive()`] method.
|
|
|
|
impl<'a, B> ReceiveFuture<'a, B> {
|
|
|
|
/// Stops the ongoing reception and returns the number of bytes received.
|
|
|
|
pub async fn stop(mut self) -> (B, usize) {
|
|
|
|
let buf = self.buf.take().unwrap();
|
|
|
|
drop(self);
|
|
|
|
let len = STATE.rx_done.wait().await;
|
|
|
|
(buf, len as _)
|
2020-12-28 15:17:36 +00:00
|
|
|
}
|
|
|
|
}
|