2021-05-13 18:28:53 +00:00
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#![no_std]
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#![no_main]
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#![feature(trait_alias)]
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#![feature(min_type_alias_impl_trait)]
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#![feature(impl_trait_in_bindings)]
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#![feature(type_alias_impl_trait)]
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2021-05-20 08:54:10 +00:00
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#![allow(incomplete_features)]
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2021-05-13 18:28:53 +00:00
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#[path = "../example_common.rs"]
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mod example_common;
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2021-05-20 08:54:10 +00:00
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use embassy_stm32::gpio::{Level, Output};
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use embedded_hal::digital::v2::OutputPin;
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2021-05-13 18:28:53 +00:00
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use example_common::*;
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use cortex_m_rt::entry;
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2021-05-20 08:54:10 +00:00
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use embassy_stm32::spi::{Config, Spi};
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2021-05-13 18:28:53 +00:00
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use embassy_stm32::time::Hertz;
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use embedded_hal::blocking::spi::Transfer;
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2021-05-20 08:54:10 +00:00
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use stm32f4::stm32f429 as pac;
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2021-05-13 18:28:53 +00:00
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#[entry]
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fn main() -> ! {
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info!("Hello World, dude!");
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let pp = pac::Peripherals::take().unwrap();
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pp.DBGMCU.cr.modify(|_, w| {
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w.dbg_sleep().set_bit();
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w.dbg_standby().set_bit();
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w.dbg_stop().set_bit()
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});
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pp.RCC.ahb1enr.modify(|_, w| w.dma1en().set_bit());
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pp.RCC.apb1enr.modify(|_, w| {
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w.spi3en().enabled();
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w
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});
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pp.RCC.ahb1enr.modify(|_, w| {
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w.gpioaen().enabled();
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w.gpioben().enabled();
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w.gpiocen().enabled();
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w.gpioden().enabled();
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w.gpioeen().enabled();
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w.gpiofen().enabled();
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w
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});
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let p = embassy_stm32::init(Default::default());
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let mut spi = Spi::new(
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p.SPI3,
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p.PC10,
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p.PC12,
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p.PC11,
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Hertz(1_000_000),
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Config::default(),
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);
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2021-05-14 22:47:22 +00:00
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let mut cs = Output::new(p.PE0, Level::High);
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2021-05-13 18:28:53 +00:00
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loop {
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2021-05-14 22:47:22 +00:00
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let mut buf = [0x0A; 4];
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2021-05-20 08:54:10 +00:00
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unwrap!(cs.set_low());
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unwrap!(spi.transfer(&mut buf));
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unwrap!(cs.set_high());
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2021-05-13 18:28:53 +00:00
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info!("xfer {=[u8]:x}", buf);
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}
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}
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