594 lines
21 KiB
Rust
594 lines
21 KiB
Rust
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// Copyright Charles Wade (https://github.com/mr-glt/sx127x_lora). Licensed under the Apache 2.0
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// license
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//
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// Modifications made to make the driver work with the rust-lorawan link layer.
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#![allow(dead_code)]
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use bit_field::BitField;
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use embedded_hal::blocking::{
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delay::DelayMs,
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spi::{Transfer, Write},
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};
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use embedded_hal::digital::v2::OutputPin;
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use embedded_hal::spi::{Mode, Phase, Polarity};
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mod register;
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use self::register::PaConfig;
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use self::register::Register;
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pub use self::register::IRQ;
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/// Provides the necessary SPI mode configuration for the radio
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pub const MODE: Mode = Mode {
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phase: Phase::CaptureOnSecondTransition,
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polarity: Polarity::IdleHigh,
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};
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/// Provides high-level access to Semtech SX1276/77/78/79 based boards connected to a Raspberry Pi
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pub struct LoRa<SPI, CS, RESET> {
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spi: SPI,
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cs: CS,
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reset: RESET,
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pub explicit_header: bool,
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pub mode: RadioMode,
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}
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#[allow(clippy::upper_case_acronyms)]
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#[derive(Debug)]
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#[cfg_attr(feature = "defmt", derive(defmt::Format))]
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pub enum Error<SPI, CS, RESET> {
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Uninformative,
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VersionMismatch(u8),
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CS(CS),
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Reset(RESET),
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SPI(SPI),
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Transmitting,
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}
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use super::sx127x_lora::register::{FskDataModulationShaping, FskRampUpRamDown};
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use Error::*;
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#[cfg(not(feature = "version_0x09"))]
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const VERSION_CHECK: u8 = 0x12;
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#[cfg(feature = "version_0x09")]
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const VERSION_CHECK: u8 = 0x09;
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impl<SPI, CS, RESET, E> LoRa<SPI, CS, RESET>
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where
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SPI: Transfer<u8, Error = E> + Write<u8, Error = E>,
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CS: OutputPin,
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RESET: OutputPin,
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{
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/// Builds and returns a new instance of the radio. Only one instance of the radio should exist at a time.
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/// This also preforms a hardware reset of the module and then puts it in standby.
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pub fn new(spi: SPI, cs: CS, reset: RESET) -> Self {
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Self {
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spi,
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cs,
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reset,
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explicit_header: true,
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mode: RadioMode::Sleep,
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}
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}
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pub fn reset<D: DelayMs<u32>>(
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&mut self,
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d: &mut D,
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) -> Result<(), Error<E, CS::Error, RESET::Error>> {
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self.reset.set_low().map_err(Reset)?;
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d.delay_ms(10_u32);
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self.reset.set_high().map_err(Reset)?;
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d.delay_ms(10_u32);
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let version = self.read_register(Register::RegVersion.addr())?;
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if version == VERSION_CHECK {
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self.set_mode(RadioMode::Sleep)?;
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self.write_register(Register::RegFifoTxBaseAddr.addr(), 0)?;
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self.write_register(Register::RegFifoRxBaseAddr.addr(), 0)?;
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let lna = self.read_register(Register::RegLna.addr())?;
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self.write_register(Register::RegLna.addr(), lna | 0x03)?;
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self.write_register(Register::RegModemConfig3.addr(), 0x04)?;
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self.set_tcxo(true)?;
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self.set_mode(RadioMode::Stdby)?;
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self.cs.set_high().map_err(CS)?;
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Ok(())
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} else {
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Err(Error::VersionMismatch(version))
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}
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}
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/// Transmits up to 255 bytes of data. To avoid the use of an allocator, this takes a fixed 255 u8
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/// array and a payload size and returns the number of bytes sent if successful.
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pub fn transmit_payload_busy(
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&mut self,
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buffer: [u8; 255],
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payload_size: usize,
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) -> Result<usize, Error<E, CS::Error, RESET::Error>> {
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if self.transmitting()? {
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Err(Transmitting)
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} else {
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self.set_mode(RadioMode::Stdby)?;
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if self.explicit_header {
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self.set_explicit_header_mode()?;
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} else {
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self.set_implicit_header_mode()?;
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}
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self.write_register(Register::RegIrqFlags.addr(), 0)?;
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self.write_register(Register::RegFifoAddrPtr.addr(), 0)?;
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self.write_register(Register::RegPayloadLength.addr(), 0)?;
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for byte in buffer.iter().take(payload_size) {
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self.write_register(Register::RegFifo.addr(), *byte)?;
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}
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self.write_register(Register::RegPayloadLength.addr(), payload_size as u8)?;
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self.set_mode(RadioMode::Tx)?;
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while self.transmitting()? {}
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Ok(payload_size)
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}
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}
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pub fn set_dio0_tx_done(&mut self) -> Result<(), Error<E, CS::Error, RESET::Error>> {
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self.write_register(Register::RegIrqFlagsMask.addr(), 0b1111_0111)?;
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let mapping = self.read_register(Register::RegDioMapping1.addr())?;
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self.write_register(Register::RegDioMapping1.addr(), (mapping & 0x3F) | 0x40)
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}
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pub fn set_dio0_rx_done(&mut self) -> Result<(), Error<E, CS::Error, RESET::Error>> {
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self.write_register(Register::RegIrqFlagsMask.addr(), 0b0001_1111)?;
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let mapping = self.read_register(Register::RegDioMapping1.addr())?;
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self.write_register(Register::RegDioMapping1.addr(), mapping & 0x3F)
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}
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pub fn transmit_payload(
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&mut self,
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buffer: &[u8],
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) -> Result<(), Error<E, CS::Error, RESET::Error>> {
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assert!(buffer.len() < 255);
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if self.transmitting()? {
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Err(Transmitting)
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} else {
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self.set_mode(RadioMode::Stdby)?;
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if self.explicit_header {
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self.set_explicit_header_mode()?;
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} else {
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self.set_implicit_header_mode()?;
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}
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self.write_register(Register::RegIrqFlags.addr(), 0)?;
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self.write_register(Register::RegFifoAddrPtr.addr(), 0)?;
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self.write_register(Register::RegPayloadLength.addr(), 0)?;
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for byte in buffer.iter() {
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self.write_register(Register::RegFifo.addr(), *byte)?;
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}
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self.write_register(Register::RegPayloadLength.addr(), buffer.len() as u8)?;
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self.set_mode(RadioMode::Tx)?;
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Ok(())
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}
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}
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pub fn packet_ready(&mut self) -> Result<bool, Error<E, CS::Error, RESET::Error>> {
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Ok(self.read_register(Register::RegIrqFlags.addr())?.get_bit(6))
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}
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pub fn irq_flags_mask(&mut self) -> Result<u8, Error<E, CS::Error, RESET::Error>> {
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Ok(self.read_register(Register::RegIrqFlagsMask.addr())? as u8)
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}
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pub fn irq_flags(&mut self) -> Result<u8, Error<E, CS::Error, RESET::Error>> {
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Ok(self.read_register(Register::RegIrqFlags.addr())? as u8)
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}
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pub fn read_packet_size(&mut self) -> Result<usize, Error<E, CS::Error, RESET::Error>> {
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let size = self.read_register(Register::RegRxNbBytes.addr())?;
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Ok(size as usize)
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}
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/// Returns the contents of the fifo as a fixed 255 u8 array. This should only be called is there is a
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/// new packet ready to be read.
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pub fn read_packet(
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&mut self,
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buffer: &mut [u8],
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) -> Result<(), Error<E, CS::Error, RESET::Error>> {
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self.clear_irq()?;
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let size = self.read_register(Register::RegRxNbBytes.addr())?;
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assert!(size as usize <= buffer.len());
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let fifo_addr = self.read_register(Register::RegFifoRxCurrentAddr.addr())?;
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self.write_register(Register::RegFifoAddrPtr.addr(), fifo_addr)?;
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for i in 0..size {
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let byte = self.read_register(Register::RegFifo.addr())?;
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buffer[i as usize] = byte;
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}
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self.write_register(Register::RegFifoAddrPtr.addr(), 0)?;
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Ok(())
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}
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/// Returns true if the radio is currently transmitting a packet.
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pub fn transmitting(&mut self) -> Result<bool, Error<E, CS::Error, RESET::Error>> {
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if (self.read_register(Register::RegOpMode.addr())? & RadioMode::Tx.addr())
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== RadioMode::Tx.addr()
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{
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Ok(true)
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} else {
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if (self.read_register(Register::RegIrqFlags.addr())? & IRQ::IrqTxDoneMask.addr()) == 1
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{
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self.write_register(Register::RegIrqFlags.addr(), IRQ::IrqTxDoneMask.addr())?;
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}
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Ok(false)
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}
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}
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/// Clears the radio's IRQ registers.
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pub fn clear_irq(&mut self) -> Result<u8, Error<E, CS::Error, RESET::Error>> {
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let irq_flags = self.read_register(Register::RegIrqFlags.addr())?;
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self.write_register(Register::RegIrqFlags.addr(), 0xFF)?;
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Ok(irq_flags)
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}
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/// Sets the transmit power and pin. Levels can range from 0-14 when the output
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/// pin = 0(RFO), and form 0-20 when output pin = 1(PaBoost). Power is in dB.
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/// Default value is `17`.
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pub fn set_tx_power(
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&mut self,
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mut level: i32,
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output_pin: u8,
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) -> Result<(), Error<E, CS::Error, RESET::Error>> {
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if PaConfig::PaOutputRfoPin.addr() == output_pin {
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// RFO
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if level < 0 {
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level = 0;
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} else if level > 14 {
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level = 14;
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}
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self.write_register(Register::RegPaConfig.addr(), (0x70 | level) as u8)
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} else {
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// PA BOOST
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if level > 17 {
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if level > 20 {
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level = 20;
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}
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// subtract 3 from level, so 18 - 20 maps to 15 - 17
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level -= 3;
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// High Power +20 dBm Operation (Semtech SX1276/77/78/79 5.4.3.)
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self.write_register(Register::RegPaDac.addr(), 0x87)?;
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self.set_ocp(140)?;
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} else {
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if level < 2 {
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level = 2;
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}
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//Default value PA_HF/LF or +17dBm
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self.write_register(Register::RegPaDac.addr(), 0x84)?;
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self.set_ocp(100)?;
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}
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level -= 2;
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self.write_register(
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Register::RegPaConfig.addr(),
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PaConfig::PaBoost.addr() | level as u8,
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)
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}
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}
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pub fn get_modem_stat(&mut self) -> Result<u8, Error<E, CS::Error, RESET::Error>> {
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Ok(self.read_register(Register::RegModemStat.addr())? as u8)
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}
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/// Sets the over current protection on the radio(mA).
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pub fn set_ocp(&mut self, ma: u8) -> Result<(), Error<E, CS::Error, RESET::Error>> {
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let mut ocp_trim: u8 = 27;
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if ma <= 120 {
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ocp_trim = (ma - 45) / 5;
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} else if ma <= 240 {
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ocp_trim = (ma + 30) / 10;
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}
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self.write_register(Register::RegOcp.addr(), 0x20 | (0x1F & ocp_trim))
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}
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/// Sets the state of the radio. Default mode after initiation is `Standby`.
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pub fn set_mode(&mut self, mode: RadioMode) -> Result<(), Error<E, CS::Error, RESET::Error>> {
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if self.explicit_header {
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self.set_explicit_header_mode()?;
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} else {
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self.set_implicit_header_mode()?;
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}
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self.write_register(
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Register::RegOpMode.addr(),
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RadioMode::LongRangeMode.addr() | mode.addr(),
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)?;
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self.mode = mode;
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Ok(())
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}
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pub fn reset_payload_length(&mut self) -> Result<(), Error<E, CS::Error, RESET::Error>> {
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self.write_register(Register::RegPayloadLength.addr(), 0xFF)
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}
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/// Sets the frequency of the radio. Values are in megahertz.
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/// I.E. 915 MHz must be used for North America. Check regulation for your area.
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pub fn set_frequency(&mut self, freq: u32) -> Result<(), Error<E, CS::Error, RESET::Error>> {
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const FREQ_STEP: f64 = 61.03515625;
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// calculate register values
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let frf = (freq as f64 / FREQ_STEP) as u32;
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// write registers
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self.write_register(
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Register::RegFrfMsb.addr(),
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((frf & 0x00FF_0000) >> 16) as u8,
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)?;
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self.write_register(Register::RegFrfMid.addr(), ((frf & 0x0000_FF00) >> 8) as u8)?;
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self.write_register(Register::RegFrfLsb.addr(), (frf & 0x0000_00FF) as u8)
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}
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/// Sets the radio to use an explicit header. Default state is `ON`.
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fn set_explicit_header_mode(&mut self) -> Result<(), Error<E, CS::Error, RESET::Error>> {
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let reg_modem_config_1 = self.read_register(Register::RegModemConfig1.addr())?;
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self.write_register(Register::RegModemConfig1.addr(), reg_modem_config_1 & 0xfe)?;
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self.explicit_header = true;
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Ok(())
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}
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/// Sets the radio to use an implicit header. Default state is `OFF`.
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fn set_implicit_header_mode(&mut self) -> Result<(), Error<E, CS::Error, RESET::Error>> {
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let reg_modem_config_1 = self.read_register(Register::RegModemConfig1.addr())?;
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self.write_register(Register::RegModemConfig1.addr(), reg_modem_config_1 & 0x01)?;
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self.explicit_header = false;
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Ok(())
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}
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/// Sets the spreading factor of the radio. Supported values are between 6 and 12.
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/// If a spreading factor of 6 is set, implicit header mode must be used to transmit
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/// and receive packets. Default value is `7`.
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pub fn set_spreading_factor(
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&mut self,
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mut sf: u8,
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) -> Result<(), Error<E, CS::Error, RESET::Error>> {
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if sf < 6 {
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sf = 6;
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} else if sf > 12 {
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sf = 12;
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}
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if sf == 6 {
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self.write_register(Register::RegDetectionOptimize.addr(), 0xc5)?;
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self.write_register(Register::RegDetectionThreshold.addr(), 0x0c)?;
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} else {
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self.write_register(Register::RegDetectionOptimize.addr(), 0xc3)?;
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self.write_register(Register::RegDetectionThreshold.addr(), 0x0a)?;
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}
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let modem_config_2 = self.read_register(Register::RegModemConfig2.addr())?;
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self.write_register(
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Register::RegModemConfig2.addr(),
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(modem_config_2 & 0x0f) | ((sf << 4) & 0xf0),
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)?;
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self.set_ldo_flag()?;
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self.write_register(Register::RegSymbTimeoutLsb.addr(), 0x05)?;
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Ok(())
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}
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pub fn set_tcxo(&mut self, external: bool) -> Result<(), Error<E, CS::Error, RESET::Error>> {
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if external {
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self.write_register(Register::RegTcxo.addr(), 0x10)
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} else {
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self.write_register(Register::RegTcxo.addr(), 0x00)
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}
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}
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/// Sets the signal bandwidth of the radio. Supported values are: `7800 Hz`, `10400 Hz`,
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/// `15600 Hz`, `20800 Hz`, `31250 Hz`,`41700 Hz` ,`62500 Hz`,`125000 Hz` and `250000 Hz`
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/// Default value is `125000 Hz`
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pub fn set_signal_bandwidth(
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&mut self,
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sbw: i64,
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) -> Result<(), Error<E, CS::Error, RESET::Error>> {
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let bw: i64 = match sbw {
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7_800 => 0,
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10_400 => 1,
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15_600 => 2,
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20_800 => 3,
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31_250 => 4,
|
||
|
41_700 => 5,
|
||
|
62_500 => 6,
|
||
|
125_000 => 7,
|
||
|
250_000 => 8,
|
||
|
_ => 9,
|
||
|
};
|
||
|
let modem_config_1 = self.read_register(Register::RegModemConfig1.addr())?;
|
||
|
self.write_register(
|
||
|
Register::RegModemConfig1.addr(),
|
||
|
(modem_config_1 & 0x0f) | ((bw << 4) as u8),
|
||
|
)?;
|
||
|
self.set_ldo_flag()?;
|
||
|
Ok(())
|
||
|
}
|
||
|
|
||
|
/// Sets the coding rate of the radio with the numerator fixed at 4. Supported values
|
||
|
/// are between `5` and `8`, these correspond to coding rates of `4/5` and `4/8`.
|
||
|
/// Default value is `5`.
|
||
|
pub fn set_coding_rate_4(
|
||
|
&mut self,
|
||
|
mut denominator: u8,
|
||
|
) -> Result<(), Error<E, CS::Error, RESET::Error>> {
|
||
|
if denominator < 5 {
|
||
|
denominator = 5;
|
||
|
} else if denominator > 8 {
|
||
|
denominator = 8;
|
||
|
}
|
||
|
let cr = denominator - 4;
|
||
|
let modem_config_1 = self.read_register(Register::RegModemConfig1.addr())?;
|
||
|
self.write_register(
|
||
|
Register::RegModemConfig1.addr(),
|
||
|
(modem_config_1 & 0xf1) | (cr << 1),
|
||
|
)
|
||
|
}
|
||
|
|
||
|
/// Sets the preamble length of the radio. Values are between 6 and 65535.
|
||
|
/// Default value is `8`.
|
||
|
pub fn set_preamble_length(
|
||
|
&mut self,
|
||
|
length: i64,
|
||
|
) -> Result<(), Error<E, CS::Error, RESET::Error>> {
|
||
|
self.write_register(Register::RegPreambleMsb.addr(), (length >> 8) as u8)?;
|
||
|
self.write_register(Register::RegPreambleLsb.addr(), length as u8)
|
||
|
}
|
||
|
|
||
|
/// Enables are disables the radio's CRC check. Default value is `false`.
|
||
|
pub fn set_crc(&mut self, value: bool) -> Result<(), Error<E, CS::Error, RESET::Error>> {
|
||
|
let modem_config_2 = self.read_register(Register::RegModemConfig2.addr())?;
|
||
|
if value {
|
||
|
self.write_register(Register::RegModemConfig2.addr(), modem_config_2 | 0x04)
|
||
|
} else {
|
||
|
self.write_register(Register::RegModemConfig2.addr(), modem_config_2 & 0xfb)
|
||
|
}
|
||
|
}
|
||
|
|
||
|
/// Inverts the radio's IQ signals. Default value is `false`.
|
||
|
pub fn set_invert_iq(&mut self, value: bool) -> Result<(), Error<E, CS::Error, RESET::Error>> {
|
||
|
if value {
|
||
|
self.write_register(Register::RegInvertiq.addr(), 0x66)?;
|
||
|
self.write_register(Register::RegInvertiq2.addr(), 0x19)
|
||
|
} else {
|
||
|
self.write_register(Register::RegInvertiq.addr(), 0x27)?;
|
||
|
self.write_register(Register::RegInvertiq2.addr(), 0x1d)
|
||
|
}
|
||
|
}
|
||
|
|
||
|
/// Returns the spreading factor of the radio.
|
||
|
pub fn get_spreading_factor(&mut self) -> Result<u8, Error<E, CS::Error, RESET::Error>> {
|
||
|
Ok(self.read_register(Register::RegModemConfig2.addr())? >> 4)
|
||
|
}
|
||
|
|
||
|
/// Returns the signal bandwidth of the radio.
|
||
|
pub fn get_signal_bandwidth(&mut self) -> Result<i64, Error<E, CS::Error, RESET::Error>> {
|
||
|
let bw = self.read_register(Register::RegModemConfig1.addr())? >> 4;
|
||
|
let bw = match bw {
|
||
|
0 => 7_800,
|
||
|
1 => 10_400,
|
||
|
2 => 15_600,
|
||
|
3 => 20_800,
|
||
|
4 => 31_250,
|
||
|
5 => 41_700,
|
||
|
6 => 62_500,
|
||
|
7 => 125_000,
|
||
|
8 => 250_000,
|
||
|
9 => 500_000,
|
||
|
_ => -1,
|
||
|
};
|
||
|
Ok(bw)
|
||
|
}
|
||
|
|
||
|
/// Returns the RSSI of the last received packet.
|
||
|
pub fn get_packet_rssi(&mut self) -> Result<i32, Error<E, CS::Error, RESET::Error>> {
|
||
|
Ok(i32::from(self.read_register(Register::RegPktRssiValue.addr())?) - 157)
|
||
|
}
|
||
|
|
||
|
/// Returns the signal to noise radio of the the last received packet.
|
||
|
pub fn get_packet_snr(&mut self) -> Result<f64, Error<E, CS::Error, RESET::Error>> {
|
||
|
Ok(f64::from(
|
||
|
self.read_register(Register::RegPktSnrValue.addr())?,
|
||
|
))
|
||
|
}
|
||
|
|
||
|
/// Returns the frequency error of the last received packet in Hz.
|
||
|
pub fn get_packet_frequency_error(&mut self) -> Result<i64, Error<E, CS::Error, RESET::Error>> {
|
||
|
let mut freq_error: i32;
|
||
|
freq_error = i32::from(self.read_register(Register::RegFreqErrorMsb.addr())? & 0x7);
|
||
|
freq_error <<= 8i64;
|
||
|
freq_error += i32::from(self.read_register(Register::RegFreqErrorMid.addr())?);
|
||
|
freq_error <<= 8i64;
|
||
|
freq_error += i32::from(self.read_register(Register::RegFreqErrorLsb.addr())?);
|
||
|
|
||
|
let f_xtal = 32_000_000; // FXOSC: crystal oscillator (XTAL) frequency (2.5. Chip Specification, p. 14)
|
||
|
let f_error = ((f64::from(freq_error) * (1i64 << 24) as f64) / f64::from(f_xtal))
|
||
|
* (self.get_signal_bandwidth()? as f64 / 500_000.0f64); // p. 37
|
||
|
Ok(f_error as i64)
|
||
|
}
|
||
|
|
||
|
fn set_ldo_flag(&mut self) -> Result<(), Error<E, CS::Error, RESET::Error>> {
|
||
|
let sw = self.get_signal_bandwidth()?;
|
||
|
// Section 4.1.1.5
|
||
|
let symbol_duration = 1000 / (sw / ((1_i64) << self.get_spreading_factor()?));
|
||
|
|
||
|
// Section 4.1.1.6
|
||
|
let ldo_on = symbol_duration > 16;
|
||
|
|
||
|
let mut config_3 = self.read_register(Register::RegModemConfig3.addr())?;
|
||
|
config_3.set_bit(3, ldo_on);
|
||
|
//config_3.set_bit(2, true);
|
||
|
self.write_register(Register::RegModemConfig3.addr(), config_3)
|
||
|
}
|
||
|
|
||
|
fn read_register(&mut self, reg: u8) -> Result<u8, Error<E, CS::Error, RESET::Error>> {
|
||
|
self.cs.set_low().map_err(CS)?;
|
||
|
|
||
|
let mut buffer = [reg & 0x7f, 0];
|
||
|
let transfer = self.spi.transfer(&mut buffer).map_err(SPI)?;
|
||
|
self.cs.set_high().map_err(CS)?;
|
||
|
Ok(transfer[1])
|
||
|
}
|
||
|
|
||
|
fn write_register(
|
||
|
&mut self,
|
||
|
reg: u8,
|
||
|
byte: u8,
|
||
|
) -> Result<(), Error<E, CS::Error, RESET::Error>> {
|
||
|
self.cs.set_low().map_err(CS)?;
|
||
|
|
||
|
let buffer = [reg | 0x80, byte];
|
||
|
self.spi.write(&buffer).map_err(SPI)?;
|
||
|
self.cs.set_high().map_err(CS)?;
|
||
|
Ok(())
|
||
|
}
|
||
|
|
||
|
pub fn put_in_fsk_mode(&mut self) -> Result<(), Error<E, CS::Error, RESET::Error>> {
|
||
|
// Put in FSK mode
|
||
|
let mut op_mode = 0;
|
||
|
op_mode
|
||
|
.set_bit(7, false) // FSK mode
|
||
|
.set_bits(5..6, 0x00) // FSK modulation
|
||
|
.set_bit(3, false) //Low freq registers
|
||
|
.set_bits(0..2, 0b011); // Mode
|
||
|
|
||
|
self.write_register(Register::RegOpMode as u8, op_mode)
|
||
|
}
|
||
|
|
||
|
pub fn set_fsk_pa_ramp(
|
||
|
&mut self,
|
||
|
modulation_shaping: FskDataModulationShaping,
|
||
|
ramp: FskRampUpRamDown,
|
||
|
) -> Result<(), Error<E, CS::Error, RESET::Error>> {
|
||
|
let mut pa_ramp = 0;
|
||
|
pa_ramp
|
||
|
.set_bits(5..6, modulation_shaping as u8)
|
||
|
.set_bits(0..3, ramp as u8);
|
||
|
|
||
|
self.write_register(Register::RegPaRamp as u8, pa_ramp)
|
||
|
}
|
||
|
|
||
|
pub fn set_lora_pa_ramp(&mut self) -> Result<(), Error<E, CS::Error, RESET::Error>> {
|
||
|
self.write_register(Register::RegPaRamp as u8, 0b1000)
|
||
|
}
|
||
|
|
||
|
pub fn set_lora_sync_word(&mut self) -> Result<(), Error<E, CS::Error, RESET::Error>> {
|
||
|
self.write_register(Register::RegSyncWord as u8, 0x34)
|
||
|
}
|
||
|
}
|
||
|
/// Modes of the radio and their corresponding register values.
|
||
|
#[derive(Clone, Copy)]
|
||
|
pub enum RadioMode {
|
||
|
LongRangeMode = 0x80,
|
||
|
Sleep = 0x00,
|
||
|
Stdby = 0x01,
|
||
|
Tx = 0x03,
|
||
|
RxContinuous = 0x05,
|
||
|
RxSingle = 0x06,
|
||
|
}
|
||
|
|
||
|
impl RadioMode {
|
||
|
/// Returns the address of the mode.
|
||
|
pub fn addr(self) -> u8 {
|
||
|
self as u8
|
||
|
}
|
||
|
}
|