2021-10-07 07:00:03 +00:00
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use core::convert::TryInto;
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2021-03-24 17:33:17 +00:00
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use core::marker::PhantomData;
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use core::sync::atomic::{compiler_fence, Ordering};
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use core::task::Poll;
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2021-09-01 21:54:26 +00:00
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use embassy::interrupt::InterruptExt;
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2021-09-10 23:53:53 +00:00
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use embassy::util::Unborrow;
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use embassy::waitqueue::AtomicWaker;
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2021-07-29 11:44:51 +00:00
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use embassy_hal_common::unborrow;
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2021-03-24 17:33:17 +00:00
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use futures::future::poll_fn;
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2021-04-14 17:59:52 +00:00
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use crate::interrupt;
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use crate::{pac, peripherals};
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2021-03-24 17:33:17 +00:00
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use pac::{saadc, SAADC};
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pub use saadc::{
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ch::{
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config::{GAIN_A as Gain, REFSEL_A as Reference, RESP_A as Resistor, TACQ_A as Time},
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2021-10-07 07:00:03 +00:00
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pseln::PSELN_A as NegativeChannel,
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2021-03-24 17:33:17 +00:00
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pselp::PSELP_A as PositiveChannel,
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},
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oversample::OVERSAMPLE_A as Oversample,
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resolution::VAL_A as Resolution,
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};
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#[derive(Debug, Clone, Copy, PartialEq, Eq)]
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#[cfg_attr(feature = "defmt", derive(defmt::Format))]
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#[non_exhaustive]
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pub enum Error {}
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/// One-shot saadc. Continuous sample mode TODO.
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2021-10-07 07:00:03 +00:00
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pub struct OneShot<'d, const N: usize> {
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2021-05-22 13:42:14 +00:00
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phantom: PhantomData<&'d mut peripherals::SAADC>,
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2021-03-24 17:33:17 +00:00
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}
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2021-09-01 21:54:26 +00:00
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static WAKER: AtomicWaker = AtomicWaker::new();
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2021-03-24 17:33:17 +00:00
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/// Used to configure the SAADC peripheral.
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///
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/// See the `Default` impl for suitable default values.
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2021-10-07 07:00:03 +00:00
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#[non_exhaustive]
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2021-03-24 17:33:17 +00:00
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pub struct Config {
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/// Output resolution in bits.
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pub resolution: Resolution,
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/// Average 2^`oversample` input samples before transferring the result into memory.
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pub oversample: Oversample,
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2021-10-07 07:00:03 +00:00
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}
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impl Default for Config {
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/// Default configuration for single channel sampling.
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fn default() -> Self {
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Self {
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resolution: Resolution::_14BIT,
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oversample: Oversample::BYPASS,
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}
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}
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}
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/// Used to configure an individual SAADC peripheral channel.
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///
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/// See the `Default` impl for suitable default values.
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#[non_exhaustive]
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pub struct ChannelConfig {
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2021-03-24 17:33:17 +00:00
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/// Reference voltage of the SAADC input.
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pub reference: Reference,
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/// Gain used to control the effective input range of the SAADC.
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pub gain: Gain,
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/// Positive channel resistor control.
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pub resistor: Resistor,
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/// Acquisition time in microseconds.
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pub time: Time,
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2021-10-07 07:00:03 +00:00
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/// Positive channel to sample
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p_channel: PositiveChannel,
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/// An optional negative channel to sample
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n_channel: Option<NegativeChannel>,
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2021-03-24 17:33:17 +00:00
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}
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2021-10-07 07:00:03 +00:00
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impl ChannelConfig {
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/// Default configuration for single ended channel sampling.
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pub fn single_ended(pin: impl Unborrow<Target = impl PositivePin>) -> Self {
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unborrow!(pin);
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Self {
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reference: Reference::INTERNAL,
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gain: Gain::GAIN1_6,
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resistor: Resistor::BYPASS,
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time: Time::_10US,
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p_channel: pin.channel(),
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n_channel: None,
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}
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}
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/// Default configuration for differential channel sampling.
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pub fn differential(
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ppin: impl Unborrow<Target = impl PositivePin>,
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npin: impl Unborrow<Target = impl NegativePin>,
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) -> Self {
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unborrow!(ppin, npin);
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2021-03-24 17:33:17 +00:00
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Self {
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reference: Reference::VDD1_4,
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2021-10-07 07:00:03 +00:00
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gain: Gain::GAIN1_6,
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resistor: Resistor::BYPASS,
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time: Time::_10US,
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p_channel: ppin.channel(),
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n_channel: Some(npin.channel()),
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2021-03-24 17:33:17 +00:00
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}
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}
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}
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2021-10-07 07:00:03 +00:00
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impl<'d, const N: usize> OneShot<'d, N> {
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2021-03-24 17:33:17 +00:00
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pub fn new(
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2021-05-17 10:23:04 +00:00
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_saadc: impl Unborrow<Target = peripherals::SAADC> + 'd,
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2021-04-14 17:59:52 +00:00
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irq: impl Unborrow<Target = interrupt::SAADC> + 'd,
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2021-03-24 17:33:17 +00:00
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config: Config,
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2021-10-07 07:00:03 +00:00
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channel_configs: [ChannelConfig; N],
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2021-03-24 17:33:17 +00:00
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) -> Self {
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2021-05-21 11:06:28 +00:00
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unborrow!(irq);
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2021-03-24 17:33:17 +00:00
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let r = unsafe { &*SAADC::ptr() };
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let Config {
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resolution,
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oversample,
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} = config;
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2021-10-07 07:00:03 +00:00
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// Configure channels
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2021-03-24 17:33:17 +00:00
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r.enable.write(|w| w.enable().enabled());
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r.resolution.write(|w| w.val().variant(resolution));
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r.oversample.write(|w| w.oversample().variant(oversample));
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2021-10-07 07:00:03 +00:00
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for (i, cc) in channel_configs.iter().enumerate() {
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r.ch[i].pselp.write(|w| w.pselp().variant(cc.p_channel));
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if let Some(npin) = cc.n_channel.as_ref() {
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r.ch[i].pseln.write(|w| w.pseln().variant(*npin));
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2021-03-24 17:33:17 +00:00
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}
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2021-10-07 07:00:03 +00:00
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r.ch[i].config.write(|w| {
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w.refsel().variant(cc.reference);
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w.gain().variant(cc.gain);
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w.tacq().variant(cc.time);
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if cc.n_channel.is_none() {
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w.mode().se();
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} else {
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w.mode().diff();
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}
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w.resp().variant(cc.resistor);
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w.resn().bypass();
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if !matches!(oversample, Oversample::BYPASS) {
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w.burst().enabled();
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} else {
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w.burst().disabled();
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}
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w
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});
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}
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2021-03-24 17:33:17 +00:00
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// Disable all events interrupts
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r.intenclr.write(|w| unsafe { w.bits(0x003F_FFFF) });
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2021-09-01 21:54:26 +00:00
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irq.set_handler(Self::on_interrupt);
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irq.unpend();
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irq.enable();
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2021-03-24 17:33:17 +00:00
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Self {
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phantom: PhantomData,
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}
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}
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2021-09-01 21:54:26 +00:00
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fn on_interrupt(_ctx: *mut ()) {
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let r = Self::regs();
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if r.events_end.read().bits() != 0 {
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r.intenclr.write(|w| w.end().clear());
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WAKER.wake();
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}
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}
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fn regs() -> &'static saadc::RegisterBlock {
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2021-03-24 17:33:17 +00:00
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unsafe { &*SAADC::ptr() }
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}
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2021-05-22 13:42:14 +00:00
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2021-10-07 07:00:03 +00:00
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pub async fn sample(&mut self, buf: &mut [i16; N]) {
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2021-09-01 21:54:26 +00:00
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let r = Self::regs();
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2021-05-22 13:42:14 +00:00
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// Set up the DMA
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r.result
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.ptr
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2021-10-07 07:00:03 +00:00
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.write(|w| unsafe { w.ptr().bits(buf.as_mut_ptr() as u32) });
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r.result
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.maxcnt
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.write(|w| unsafe { w.maxcnt().bits(N.try_into().unwrap()) });
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2021-05-22 13:42:14 +00:00
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// Reset and enable the end event
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r.events_end.reset();
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r.intenset.write(|w| w.end().set());
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// Don't reorder the ADC start event before the previous writes. Hopefully self
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// wouldn't happen anyway.
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compiler_fence(Ordering::SeqCst);
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r.tasks_start.write(|w| unsafe { w.bits(1) });
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r.tasks_sample.write(|w| unsafe { w.bits(1) });
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// Wait for 'end' event.
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poll_fn(|cx| {
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2021-09-01 21:54:26 +00:00
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let r = Self::regs();
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WAKER.register(cx.waker());
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2021-05-22 13:42:14 +00:00
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if r.events_end.read().bits() != 0 {
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r.events_end.reset();
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return Poll::Ready(());
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}
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Poll::Pending
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})
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.await;
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}
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2021-03-24 17:33:17 +00:00
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}
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2021-10-07 07:00:03 +00:00
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impl<'d, const N: usize> Drop for OneShot<'d, N> {
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2021-03-24 17:33:17 +00:00
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fn drop(&mut self) {
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2021-09-01 21:54:26 +00:00
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let r = Self::regs();
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2021-03-24 17:33:17 +00:00
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r.enable.write(|w| w.enable().disabled());
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}
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}
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/// A pin that can be used as the positive end of a ADC differential in the SAADC periperhal.
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2021-05-22 11:23:09 +00:00
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pub trait PositivePin {
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2021-03-24 17:33:17 +00:00
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fn channel(&self) -> PositiveChannel;
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}
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macro_rules! positive_pin_mappings {
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( $($ch:ident => $pin:ident,)*) => {
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$(
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impl PositivePin for crate::peripherals::$pin {
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fn channel(&self) -> PositiveChannel {
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PositiveChannel::$ch
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}
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}
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)*
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};
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}
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2021-10-07 07:00:03 +00:00
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/// A pin that can be used as the negative end of a ADC differential in the SAADC periperhal.
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pub trait NegativePin {
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fn channel(&self) -> NegativeChannel;
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}
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macro_rules! negative_pin_mappings {
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( $($ch:ident => $pin:ident,)*) => {
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$(
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impl NegativePin for crate::peripherals::$pin {
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fn channel(&self) -> NegativeChannel {
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NegativeChannel::$ch
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}
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}
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)*
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};
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}
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/// Represents an unconnected pin
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pub struct NotConnected {}
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impl PositivePin for NotConnected {
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fn channel(&self) -> PositiveChannel {
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PositiveChannel::NC
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}
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}
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impl NegativePin for NotConnected {
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fn channel(&self) -> NegativeChannel {
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NegativeChannel::NC
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}
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}
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2021-03-24 17:33:17 +00:00
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// TODO the variant names are unchecked
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// the pins are copied from nrf hal
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#[cfg(feature = "9160")]
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positive_pin_mappings! {
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ANALOGINPUT0 => P0_13,
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ANALOGINPUT1 => P0_14,
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ANALOGINPUT2 => P0_15,
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ANALOGINPUT3 => P0_16,
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ANALOGINPUT4 => P0_17,
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ANALOGINPUT5 => P0_18,
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ANALOGINPUT6 => P0_19,
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ANALOGINPUT7 => P0_20,
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}
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#[cfg(not(feature = "9160"))]
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positive_pin_mappings! {
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ANALOGINPUT0 => P0_02,
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ANALOGINPUT1 => P0_03,
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ANALOGINPUT2 => P0_04,
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ANALOGINPUT3 => P0_05,
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ANALOGINPUT4 => P0_28,
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ANALOGINPUT5 => P0_29,
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ANALOGINPUT6 => P0_30,
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ANALOGINPUT7 => P0_31,
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}
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2021-10-07 07:00:03 +00:00
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#[cfg(feature = "9160")]
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negative_pin_mappings! {
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ANALOGINPUT0 => P0_13,
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ANALOGINPUT1 => P0_14,
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ANALOGINPUT2 => P0_15,
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ANALOGINPUT3 => P0_16,
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ANALOGINPUT4 => P0_17,
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ANALOGINPUT5 => P0_18,
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ANALOGINPUT6 => P0_19,
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ANALOGINPUT7 => P0_20,
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}
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#[cfg(not(feature = "9160"))]
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negative_pin_mappings! {
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ANALOGINPUT0 => P0_02,
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ANALOGINPUT1 => P0_03,
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ANALOGINPUT2 => P0_04,
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ANALOGINPUT3 => P0_05,
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ANALOGINPUT4 => P0_28,
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ANALOGINPUT5 => P0_29,
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ANALOGINPUT6 => P0_30,
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ANALOGINPUT7 => P0_31,
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}
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