stm32/can: add hw test and cleanup
This commit is contained in:
parent
f8d35806dc
commit
16bfbd4e99
3 changed files with 121 additions and 43 deletions
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@ -39,6 +39,7 @@ pub struct Rx0InterruptHandler<T: Instance> {
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impl<T: Instance> interrupt::Handler<T::RX0Interrupt> for Rx0InterruptHandler<T> {
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impl<T: Instance> interrupt::Handler<T::RX0Interrupt> for Rx0InterruptHandler<T> {
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unsafe fn on_interrupt() {
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unsafe fn on_interrupt() {
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// info!("rx0 irq");
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Can::<T>::receive_fifo(RxFifo::Fifo0);
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Can::<T>::receive_fifo(RxFifo::Fifo0);
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}
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}
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}
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}
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@ -49,6 +50,7 @@ pub struct Rx1InterruptHandler<T: Instance> {
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impl<T: Instance> interrupt::Handler<T::RX1Interrupt> for Rx1InterruptHandler<T> {
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impl<T: Instance> interrupt::Handler<T::RX1Interrupt> for Rx1InterruptHandler<T> {
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unsafe fn on_interrupt() {
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unsafe fn on_interrupt() {
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// info!("rx1 irq");
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Can::<T>::receive_fifo(RxFifo::Fifo1);
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Can::<T>::receive_fifo(RxFifo::Fifo1);
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}
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}
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}
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}
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@ -59,6 +61,7 @@ pub struct SceInterruptHandler<T: Instance> {
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impl<T: Instance> interrupt::Handler<T::SCEInterrupt> for SceInterruptHandler<T> {
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impl<T: Instance> interrupt::Handler<T::SCEInterrupt> for SceInterruptHandler<T> {
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unsafe fn on_interrupt() {
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unsafe fn on_interrupt() {
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// info!("sce irq");
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let msr = T::regs().msr();
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let msr = T::regs().msr();
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let msr_val = msr.read();
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let msr_val = msr.read();
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@ -87,36 +90,10 @@ pub enum BusError {
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BusWarning,
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BusWarning,
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}
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}
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pub enum FrameOrError {
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Frame(Frame),
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Error(BusError),
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}
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impl<'d, T: Instance> Can<'d, T> {
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impl<'d, T: Instance> Can<'d, T> {
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/// Creates a new Bxcan instance, blocking for 11 recessive bits to sync with the CAN bus.
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pub fn new(
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peri: impl Peripheral<P = T> + 'd,
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rx: impl Peripheral<P = impl RxPin<T>> + 'd,
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tx: impl Peripheral<P = impl TxPin<T>> + 'd,
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) -> Self {
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into_ref!(peri, rx, tx);
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unsafe {
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rx.set_as_af(rx.af_num(), AFType::Input);
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tx.set_as_af(tx.af_num(), AFType::OutputPushPull);
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}
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T::enable();
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T::reset();
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Self {
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can: bxcan::Can::builder(BxcanInstance(peri)).enable(),
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}
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}
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/// Creates a new Bxcan instance, keeping the peripheral in sleep mode.
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/// Creates a new Bxcan instance, keeping the peripheral in sleep mode.
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/// You must call [Can::enable_non_blocking] to use the peripheral.
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/// You must call [Can::enable_non_blocking] to use the peripheral.
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pub fn new_disabled(
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pub fn new(
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peri: impl Peripheral<P = T> + 'd,
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peri: impl Peripheral<P = T> + 'd,
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rx: impl Peripheral<P = impl RxPin<T>> + 'd,
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rx: impl Peripheral<P = impl RxPin<T>> + 'd,
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tx: impl Peripheral<P = impl TxPin<T>> + 'd,
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tx: impl Peripheral<P = impl TxPin<T>> + 'd,
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@ -136,6 +113,25 @@ impl<'d, T: Instance> Can<'d, T> {
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T::enable();
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T::enable();
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T::reset();
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T::reset();
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unsafe {
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use crate::pac::can::vals::{Errie, Fmpie, Tmeie};
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T::regs().ier().write(|w| {
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// TODO: fix metapac
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w.set_errie(Errie(1));
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w.set_fmpie(0, Fmpie(1));
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w.set_fmpie(1, Fmpie(1));
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w.set_tmeie(Tmeie(1));
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});
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T::regs().mcr().write(|w| {
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// Enable timestamps on rx messages
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w.set_ttcm(true);
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})
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}
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unsafe {
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unsafe {
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T::TXInterrupt::steal().unpend();
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T::TXInterrupt::steal().unpend();
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T::TXInterrupt::steal().enable();
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T::TXInterrupt::steal().enable();
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@ -159,12 +155,8 @@ impl<'d, T: Instance> Can<'d, T> {
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self.can.modify_config().set_bit_timing(bit_timing).leave_disabled();
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self.can.modify_config().set_bit_timing(bit_timing).leave_disabled();
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}
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}
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pub async fn transmit(&mut self, frame: &Frame) {
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/// Queues the message to be sent but exerts backpressure
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let tx_status = self.queue_transmit(frame).await;
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pub async fn write(&mut self, frame: &Frame) -> bxcan::TransmitStatus {
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self.wait_transission(tx_status.mailbox()).await;
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}
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async fn queue_transmit(&mut self, frame: &Frame) -> bxcan::TransmitStatus {
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poll_fn(|cx| {
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poll_fn(|cx| {
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if let Ok(status) = self.can.transmit(frame) {
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if let Ok(status) = self.can.transmit(frame) {
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return Poll::Ready(status);
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return Poll::Ready(status);
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@ -175,7 +167,7 @@ impl<'d, T: Instance> Can<'d, T> {
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.await
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.await
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}
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}
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async fn wait_transission(&self, mb: bxcan::Mailbox) {
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pub async fn flush(&self, mb: bxcan::Mailbox) {
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poll_fn(|cx| unsafe {
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poll_fn(|cx| unsafe {
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if T::regs().tsr().read().tme(mb.index()) {
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if T::regs().tsr().read().tme(mb.index()) {
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return Poll::Ready(());
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return Poll::Ready(());
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@ -186,12 +178,13 @@ impl<'d, T: Instance> Can<'d, T> {
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.await;
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.await;
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}
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}
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pub async fn receive_frame_or_error(&mut self) -> FrameOrError {
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/// Returns a tuple of the time the message was received and the message frame
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pub async fn read(&mut self) -> Result<(u16, bxcan::Frame), BusError> {
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poll_fn(|cx| {
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poll_fn(|cx| {
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if let Poll::Ready(frame) = T::state().rx_queue.recv().poll_unpin(cx) {
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if let Poll::Ready((time, frame)) = T::state().rx_queue.recv().poll_unpin(cx) {
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return Poll::Ready(FrameOrError::Frame(frame));
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return Poll::Ready(Ok((time, frame)));
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} else if let Some(err) = self.curr_error() {
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} else if let Some(err) = self.curr_error() {
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return Poll::Ready(FrameOrError::Error(err));
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return Poll::Ready(Err(err));
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}
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}
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T::state().err_waker.register(cx.waker());
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T::state().err_waker.register(cx.waker());
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Poll::Pending
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Poll::Pending
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@ -240,6 +233,7 @@ impl<'d, T: Instance> Can<'d, T> {
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data[0..4].copy_from_slice(&fifo.rdlr().read().0.to_ne_bytes());
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data[0..4].copy_from_slice(&fifo.rdlr().read().0.to_ne_bytes());
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data[4..8].copy_from_slice(&fifo.rdhr().read().0.to_ne_bytes());
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data[4..8].copy_from_slice(&fifo.rdhr().read().0.to_ne_bytes());
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let time = fifo.rdtr().read().time();
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let frame = Frame::new_data(id, Data::new(&data[0..data_len]).unwrap());
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let frame = Frame::new_data(id, Data::new(&data[0..data_len]).unwrap());
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rfr.modify(|v| v.set_rfom(true));
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rfr.modify(|v| v.set_rfom(true));
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@ -247,11 +241,11 @@ impl<'d, T: Instance> Can<'d, T> {
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/*
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/*
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NOTE: consensus was reached that if rx_queue is full, packets should be dropped
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NOTE: consensus was reached that if rx_queue is full, packets should be dropped
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*/
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*/
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let _ = state.rx_queue.try_send(frame);
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let _ = state.rx_queue.try_send((time, frame));
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}
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}
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}
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}
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pub fn calc_bxcan_timings(periph_clock: Hertz, can_bitrate: u32) -> Option<u32> {
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pub const fn calc_bxcan_timings(periph_clock: Hertz, can_bitrate: u32) -> Option<u32> {
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const BS1_MAX: u8 = 16;
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const BS1_MAX: u8 = 16;
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const BS2_MAX: u8 = 8;
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const BS2_MAX: u8 = 8;
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const MAX_SAMPLE_POINT_PERMILL: u16 = 900;
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const MAX_SAMPLE_POINT_PERMILL: u16 = 900;
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@ -316,7 +310,7 @@ impl<'d, T: Instance> Can<'d, T> {
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// - With rounding to zero
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// - With rounding to zero
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let mut bs1 = ((7 * bs1_bs2_sum - 1) + 4) / 8; // Trying rounding to nearest first
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let mut bs1 = ((7 * bs1_bs2_sum - 1) + 4) / 8; // Trying rounding to nearest first
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let mut bs2 = bs1_bs2_sum - bs1;
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let mut bs2 = bs1_bs2_sum - bs1;
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assert!(bs1_bs2_sum > bs1);
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core::assert!(bs1_bs2_sum > bs1);
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let sample_point_permill = 1000 * ((1 + bs1) / (1 + bs1 + bs2)) as u16;
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let sample_point_permill = 1000 * ((1 + bs1) / (1 + bs1 + bs2)) as u16;
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if sample_point_permill > MAX_SAMPLE_POINT_PERMILL {
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if sample_point_permill > MAX_SAMPLE_POINT_PERMILL {
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@ -379,7 +373,7 @@ pub(crate) mod sealed {
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pub struct State {
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pub struct State {
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pub tx_waker: AtomicWaker,
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pub tx_waker: AtomicWaker,
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pub err_waker: AtomicWaker,
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pub err_waker: AtomicWaker,
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pub rx_queue: Channel<CriticalSectionRawMutex, bxcan::Frame, 32>,
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pub rx_queue: Channel<CriticalSectionRawMutex, (u16, bxcan::Frame), 32>,
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}
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}
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impl State {
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impl State {
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@ -7,7 +7,7 @@ autobins = false
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[features]
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[features]
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stm32f103c8 = ["embassy-stm32/stm32f103c8", "not-gpdma"] # Blue Pill
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stm32f103c8 = ["embassy-stm32/stm32f103c8", "not-gpdma"] # Blue Pill
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stm32f429zi = ["embassy-stm32/stm32f429zi", "sdmmc", "chrono", "not-gpdma"] # Nucleo
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stm32f429zi = ["embassy-stm32/stm32f429zi", "sdmmc", "chrono", "can", "not-gpdma"] # Nucleo
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stm32g071rb = ["embassy-stm32/stm32g071rb", "not-gpdma"] # Nucleo
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stm32g071rb = ["embassy-stm32/stm32g071rb", "not-gpdma"] # Nucleo
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stm32c031c6 = ["embassy-stm32/stm32c031c6", "not-gpdma"] # Nucleo
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stm32c031c6 = ["embassy-stm32/stm32c031c6", "not-gpdma"] # Nucleo
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stm32g491re = ["embassy-stm32/stm32g491re", "not-gpdma"] # Nucleo
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stm32g491re = ["embassy-stm32/stm32g491re", "not-gpdma"] # Nucleo
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@ -19,6 +19,7 @@ stm32u585ai = ["embassy-stm32/stm32u585ai"] # IoT board
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sdmmc = []
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sdmmc = []
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chrono = ["embassy-stm32/chrono", "dep:chrono"]
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chrono = ["embassy-stm32/chrono", "dep:chrono"]
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ble = []
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ble = []
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can = []
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not-gpdma = []
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not-gpdma = []
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[dependencies]
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[dependencies]
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@ -49,6 +50,11 @@ name = "ble"
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path = "src/bin/ble.rs"
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path = "src/bin/ble.rs"
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required-features = [ "ble",]
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required-features = [ "ble",]
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[[bin]]
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name = "can"
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path = "src/bin/can.rs"
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required-features = [ "can",]
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[[bin]]
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[[bin]]
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name = "gpio"
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name = "gpio"
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path = "src/bin/gpio.rs"
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path = "src/bin/gpio.rs"
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78
tests/stm32/src/bin/can.rs
Normal file
78
tests/stm32/src/bin/can.rs
Normal file
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@ -0,0 +1,78 @@
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#![no_std]
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#![no_main]
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#![feature(type_alias_impl_trait)]
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// required-features: can
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#[path = "../example_common.rs"]
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mod example_common;
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use embassy_executor::Spawner;
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use embassy_stm32::bind_interrupts;
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use embassy_stm32::can::bxcan::filter::Mask32;
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use embassy_stm32::can::bxcan::{Fifo, Frame, StandardId};
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use embassy_stm32::can::{Can, Rx0InterruptHandler, Rx1InterruptHandler, SceInterruptHandler, TxInterruptHandler};
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use embassy_stm32::gpio::{Input, Pull};
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use embassy_stm32::peripherals::CAN1;
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use example_common::*;
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use {defmt_rtt as _, panic_probe as _};
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bind_interrupts!(struct Irqs {
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CAN1_RX0 => Rx0InterruptHandler<CAN1>;
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CAN1_RX1 => Rx1InterruptHandler<CAN1>;
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CAN1_SCE => SceInterruptHandler<CAN1>;
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CAN1_TX => TxInterruptHandler<CAN1>;
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});
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#[embassy_executor::main]
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async fn main(_spawner: Spawner) {
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let mut p = embassy_stm32::init(config());
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info!("Hello World!");
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// HW is connected as follows:
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// PB13 -> PD0
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// PB12 -> PD1
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// The next two lines are a workaround for testing without transceiver.
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// To synchronise to the bus the RX input needs to see a high level.
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// Use `mem::forget()` to release the borrow on the pin but keep the
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// pull-up resistor enabled.
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let rx_pin = Input::new(&mut p.PD0, Pull::Up);
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core::mem::forget(rx_pin);
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let mut can = Can::new(p.CAN1, p.PD0, p.PD1, Irqs);
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info!("Configuring can...");
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can.modify_filters().enable_bank(0, Fifo::Fifo0, Mask32::accept_all());
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can.set_bitrate(1_000_000);
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can.modify_config()
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.set_loopback(true) // Receive own frames
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.set_silent(true)
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// .set_bit_timing(0x001c0003)
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.enable();
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info!("Can configured");
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let mut i: u8 = 0;
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loop {
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let tx_frame = Frame::new_data(unwrap!(StandardId::new(i as _)), [i]);
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info!("Transmitting frame...");
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can.write(&tx_frame).await;
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info!("Receiving frame...");
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let (time, rx_frame) = can.read().await.unwrap();
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info!("loopback time {}", time);
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info!("loopback frame {=u8}", rx_frame.data().unwrap()[0]);
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i += 1;
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if i > 10 {
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break;
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}
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}
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info!("Test OK");
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cortex_m::asm::bkpt();
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}
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