Merge pull request #2390 from AdinAck/hf-tim-g0-example
Add High Frequency (128MHz) Timer Example For G0
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1d1e0d91cd
1 changed files with 63 additions and 0 deletions
63
examples/stm32g0/src/bin/hf_timer.rs
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63
examples/stm32g0/src/bin/hf_timer.rs
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#![no_std]
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#![no_main]
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use defmt::info;
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use embassy_executor::Spawner;
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use embassy_stm32::gpio::OutputType;
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use embassy_stm32::pac::rcc::vals::Tim1sel;
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use embassy_stm32::rcc::{ClockSrc, Config as RccConfig, PllConfig, PllSource, Pllm, Plln, Pllq, Pllr};
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use embassy_stm32::time::khz;
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use embassy_stm32::timer::complementary_pwm::{ComplementaryPwm, ComplementaryPwmPin};
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use embassy_stm32::timer::simple_pwm::PwmPin;
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use embassy_stm32::timer::Channel;
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use embassy_stm32::{pac, Config as PeripheralConfig};
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use {defmt_rtt as _, panic_probe as _};
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#[embassy_executor::main]
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async fn main(_spawner: Spawner) {
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let mut rcc_config = RccConfig::default();
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rcc_config.mux = ClockSrc::PLL(PllConfig {
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source: PllSource::HSI,
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m: Pllm::DIV1,
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n: Plln::MUL16,
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r: Pllr::DIV4, // CPU clock comes from PLLR (HSI (16MHz) / 1 * 16 / 4 = 64MHz)
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q: Some(Pllq::DIV2), // TIM1 or TIM15 can be sourced from PLLQ (HSI (16MHz) / 1 * 16 / 2 = 128MHz)
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p: None,
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});
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let mut peripheral_config = PeripheralConfig::default();
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peripheral_config.rcc = rcc_config;
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let p = embassy_stm32::init(peripheral_config);
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// configure TIM1 mux to select PLLQ as clock source
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// https://www.st.com/resource/en/reference_manual/rm0444-stm32g0x1-advanced-armbased-32bit-mcus-stmicroelectronics.pdf
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// RM0444 page 210
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// RCC - Peripherals Independent Clock Control Register - bit 22 -> 1
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pac::RCC.ccipr().modify(|w| w.set_tim1sel(Tim1sel::PLL1_Q));
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let ch1 = PwmPin::new_ch1(p.PA8, OutputType::PushPull);
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let ch1n = ComplementaryPwmPin::new_ch1(p.PA7, OutputType::PushPull);
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let mut pwm = ComplementaryPwm::new(
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p.TIM1,
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Some(ch1),
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Some(ch1n),
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None,
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None,
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None,
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None,
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None,
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None,
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khz(512),
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Default::default(),
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);
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let max = pwm.get_max_duty();
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info!("Max duty: {}", max);
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pwm.set_duty(Channel::Ch1, max / 2);
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pwm.enable(Channel::Ch1);
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loop {}
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}
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