Initial support for nrf9160
This commit is contained in:
Dion Dokter
parent
009b77c1b9
commit
20674f7126
16 changed files with 458 additions and 87 deletions
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@ -25,6 +25,7 @@ nrf52820 = ["nrf52820-pac"]
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nrf52832 = ["nrf52832-pac"]
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nrf52833 = ["nrf52833-pac"]
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nrf52840 = ["nrf52840-pac"]
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nrf9160 = ["nrf9160-pac"]
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# Features starting with `_` are for internal use only. They're not intended
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# to be enabled by other crates, and are not covered by semver guarantees.
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@ -55,3 +56,4 @@ nrf52820-pac = { version = "0.10.1", optional = true, features = [ "rt" ] }
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nrf52832-pac = { version = "0.10.1", optional = true, features = [ "rt" ] }
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nrf52833-pac = { version = "0.10.1", optional = true, features = [ "rt" ] }
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nrf52840-pac = { version = "0.10.1", optional = true, features = [ "rt" ] }
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nrf9160-pac = { version = "0.10.1", optional = true, features = [ "rt" ] }
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@ -14,14 +14,13 @@ use embassy_hal_common::{low_power_wait_until, unborrow};
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use crate::gpio::sealed::Pin as _;
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use crate::gpio::{OptionalPin as GpioOptionalPin, Pin as GpioPin};
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use crate::pac;
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use crate::ppi::{AnyConfigurableChannel, ConfigurableChannel, Event, Ppi, Task};
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use crate::timer::Instance as TimerInstance;
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use crate::timer::{Frequency, Timer};
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use crate::uarte::{Config, Instance as UarteInstance};
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use crate::uarte::{Config, Instance as UarteInstance, uarte0};
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// Re-export SVD variants to allow user to directly set values
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pub use pac::uarte0::{baudrate::BAUDRATE_A as Baudrate, config::PARITY_A as Parity};
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pub use uarte0::{baudrate::BAUDRATE_A as Baudrate, config::PARITY_A as Parity};
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#[derive(Copy, Clone, Debug, PartialEq)]
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enum RxState {
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209
embassy-nrf/src/chips/nrf9160.rs
Normal file
209
embassy-nrf/src/chips/nrf9160.rs
Normal file
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@ -0,0 +1,209 @@
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pub use nrf9160_pac as pac;
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/// The maximum buffer size that the EasyDMA can send/recv in one operation.
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pub const EASY_DMA_SIZE: usize = (1 << 12) - 1;
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pub const FORCE_COPY_BUFFER_SIZE: usize = 1024;
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embassy_hal_common::peripherals! {
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// RTC
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RTC0,
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RTC1,
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// WDT
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WDT,
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// UARTE
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UARTE0,
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UARTE1,
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UARTE2,
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UARTE3,
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// TWI
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TWI0,
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TWI1,
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TWI2,
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TWI3,
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// SPI
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SPI0,
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SPI1,
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SPI2,
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SPI3,
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// SAADC
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SAADC,
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// PWM
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PWM0,
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PWM1,
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PWM2,
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PWM3,
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// TIMER
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TIMER0,
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TIMER1,
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TIMER2,
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// GPIOTE
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GPIOTE_CH0,
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GPIOTE_CH1,
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GPIOTE_CH2,
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GPIOTE_CH3,
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GPIOTE_CH4,
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GPIOTE_CH5,
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GPIOTE_CH6,
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GPIOTE_CH7,
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// PPI
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PPI_CH0,
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PPI_CH1,
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PPI_CH2,
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PPI_CH3,
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PPI_CH4,
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PPI_CH5,
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PPI_CH6,
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PPI_CH7,
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PPI_CH8,
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PPI_CH9,
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PPI_CH10,
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PPI_CH11,
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PPI_CH12,
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PPI_CH13,
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PPI_CH14,
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PPI_CH15,
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PPI_GROUP0,
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PPI_GROUP1,
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PPI_GROUP2,
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PPI_GROUP3,
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PPI_GROUP4,
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PPI_GROUP5,
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// GPIO port 0
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P0_00,
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P0_01,
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P0_02,
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P0_03,
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P0_04,
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P0_05,
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P0_06,
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P0_07,
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P0_08,
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P0_09,
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P0_10,
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P0_11,
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P0_12,
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P0_13,
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P0_14,
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P0_15,
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P0_16,
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P0_17,
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P0_18,
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P0_19,
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P0_20,
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P0_21,
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P0_22,
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P0_23,
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P0_24,
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P0_25,
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P0_26,
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P0_27,
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P0_28,
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P0_29,
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P0_30,
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P0_31,
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}
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impl_uarte!(UARTE0, UARTE0_NS, UARTE0_SPIM0_SPIS0_TWIM0_TWIS0);
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impl_uarte!(UARTE1, UARTE1_NS, UARTE1_SPIM1_SPIS1_TWIM1_TWIS1);
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impl_uarte!(UARTE2, UARTE2_NS, UARTE2_SPIM2_SPIS2_TWIM2_TWIS2);
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impl_uarte!(UARTE3, UARTE3_NS, UARTE3_SPIM3_SPIS3_TWIM3_TWIS3);
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impl_spim!(SPI0, SPIM0_NS, UARTE0_SPIM0_SPIS0_TWIM0_TWIS0);
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impl_spim!(SPI1, SPIM1_NS, UARTE1_SPIM1_SPIS1_TWIM1_TWIS1);
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impl_spim!(SPI2, SPIM2_NS, UARTE2_SPIM2_SPIS2_TWIM2_TWIS2);
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impl_spim!(SPI3, SPIM3_NS, UARTE3_SPIM3_SPIS3_TWIM3_TWIS3);
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impl_twim!(TWI0, TWIM0_NS, UARTE0_SPIM0_SPIS0_TWIM0_TWIS0);
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impl_twim!(TWI1, TWIM1_NS, UARTE1_SPIM1_SPIS1_TWIM1_TWIS1);
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impl_twim!(TWI2, TWIM2_NS, UARTE2_SPIM2_SPIS2_TWIM2_TWIS2);
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impl_twim!(TWI3, TWIM3_NS, UARTE3_SPIM3_SPIS3_TWIM3_TWIS3);
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impl_pwm!(PWM0, PWM0_NS, PWM0);
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impl_pwm!(PWM1, PWM1_NS, PWM1);
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impl_pwm!(PWM2, PWM2_NS, PWM2);
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impl_pwm!(PWM3, PWM3_NS, PWM3);
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impl_timer!(TIMER0, TIMER0_NS, TIMER0);
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impl_timer!(TIMER1, TIMER1_NS, TIMER1);
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impl_timer!(TIMER2, TIMER2_NS, TIMER2);
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impl_pin!(P0_00, 0, 0);
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impl_pin!(P0_01, 0, 1);
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impl_pin!(P0_02, 0, 2);
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impl_pin!(P0_03, 0, 3);
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impl_pin!(P0_04, 0, 4);
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impl_pin!(P0_05, 0, 5);
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impl_pin!(P0_06, 0, 6);
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impl_pin!(P0_07, 0, 7);
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impl_pin!(P0_08, 0, 8);
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impl_pin!(P0_09, 0, 9);
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impl_pin!(P0_10, 0, 10);
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impl_pin!(P0_11, 0, 11);
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impl_pin!(P0_12, 0, 12);
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impl_pin!(P0_13, 0, 13);
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impl_pin!(P0_14, 0, 14);
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impl_pin!(P0_15, 0, 15);
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impl_pin!(P0_16, 0, 16);
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impl_pin!(P0_17, 0, 17);
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impl_pin!(P0_18, 0, 18);
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impl_pin!(P0_19, 0, 19);
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impl_pin!(P0_20, 0, 20);
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impl_pin!(P0_21, 0, 21);
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impl_pin!(P0_22, 0, 22);
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impl_pin!(P0_23, 0, 23);
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impl_pin!(P0_24, 0, 24);
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impl_pin!(P0_25, 0, 25);
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impl_pin!(P0_26, 0, 26);
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impl_pin!(P0_27, 0, 27);
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impl_pin!(P0_28, 0, 28);
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impl_pin!(P0_29, 0, 29);
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impl_pin!(P0_30, 0, 30);
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impl_pin!(P0_31, 0, 31);
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pub mod irqs {
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use crate::pac::Interrupt as InterruptEnum;
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use embassy_macros::interrupt_declare as declare;
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declare!(SPU);
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declare!(CLOCK_POWER);
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declare!(UARTE0_SPIM0_SPIS0_TWIM0_TWIS0);
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declare!(UARTE1_SPIM1_SPIS1_TWIM1_TWIS1);
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declare!(UARTE2_SPIM2_SPIS2_TWIM2_TWIS2);
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declare!(UARTE3_SPIM3_SPIS3_TWIM3_TWIS3);
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declare!(GPIOTE0);
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declare!(SAADC);
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declare!(TIMER0);
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declare!(TIMER1);
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declare!(TIMER2);
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declare!(RTC0);
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declare!(RTC1);
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declare!(WDT);
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declare!(EGU0);
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declare!(EGU1);
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declare!(EGU2);
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declare!(EGU3);
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declare!(EGU4);
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declare!(EGU5);
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declare!(PWM0);
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declare!(PWM1);
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declare!(PWM2);
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declare!(PDM);
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declare!(PWM3);
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declare!(I2S);
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declare!(IPC);
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declare!(FPU);
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declare!(GPIOTE1);
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declare!(KMU);
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declare!(CRYPTOCELL);
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}
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@ -10,7 +10,11 @@ use embedded_hal::digital::v2::{InputPin, OutputPin, StatefulOutputPin};
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use gpio::pin_cnf::DRIVE_A;
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use crate::pac;
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#[cfg(not(feature = "nrf9160"))]
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use crate::pac::p0 as gpio;
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#[cfg(feature = "nrf9160")]
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use crate::pac::p0_ns as gpio;
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use self::sealed::Pin as _;
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@ -299,7 +303,10 @@ pub(crate) mod sealed {
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fn block(&self) -> &gpio::RegisterBlock {
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unsafe {
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match self.pin_port() / 32 {
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#[cfg(not(feature = "nrf9160"))]
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0 => &*pac::P0::ptr(),
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#[cfg(feature = "nrf9160")]
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0 => &*pac::P0_NS::ptr(),
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#[cfg(any(feature = "nrf52833", feature = "nrf52840"))]
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1 => &*pac::P1::ptr(),
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_ => unreachable_unchecked(),
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@ -22,6 +22,18 @@ pub const PIN_COUNT: usize = 48;
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#[cfg(not(any(feature = "nrf52833", feature = "nrf52840")))]
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pub const PIN_COUNT: usize = 32;
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#[cfg(not(feature = "nrf9160"))]
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pub(crate) use pac::P0;
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#[cfg(feature = "nrf9160")]
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pub(crate) use pac::P0_NS as P0;
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#[cfg(not(feature = "nrf9160"))]
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pub(crate) use pac::P1;
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#[cfg(not(feature = "nrf9160"))]
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pub(crate) use pac::GPIOTE;
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#[cfg(feature = "nrf9160")]
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pub(crate) use pac::GPIOTE1_NS as GPIOTE;
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const NEW_AW: AtomicWaker = AtomicWaker::new();
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static CHANNEL_WAKERS: [AtomicWaker; CHANNEL_COUNT] = [NEW_AW; CHANNEL_COUNT];
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static PORT_WAKERS: [AtomicWaker; PIN_COUNT] = [NEW_AW; PIN_COUNT];
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@ -42,9 +54,9 @@ pub enum OutputChannelPolarity {
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pub(crate) fn init(irq_prio: crate::interrupt::Priority) {
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#[cfg(any(feature = "nrf52833", feature = "nrf52840"))]
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let ports = unsafe { &[&*pac::P0::ptr(), &*pac::P1::ptr()] };
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let ports = unsafe { &[&*P0::ptr(), &*P1::ptr()] };
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#[cfg(not(any(feature = "nrf52833", feature = "nrf52840")))]
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let ports = unsafe { &[&*pac::P0::ptr()] };
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let ports = unsafe { &[&*P0::ptr()] };
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for &p in ports {
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// Enable latched detection
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@ -55,19 +67,34 @@ pub(crate) fn init(irq_prio: crate::interrupt::Priority) {
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// Enable interrupts
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#[cfg(not(feature = "nrf9160"))]
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let irq = unsafe { interrupt::GPIOTE::steal() };
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#[cfg(feature = "nrf9160")]
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let irq = unsafe { interrupt::GPIOTE1::steal() };
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irq.unpend();
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irq.set_priority(irq_prio);
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irq.enable();
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let g = unsafe { &*pac::GPIOTE::ptr() };
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let g = unsafe { &*GPIOTE::ptr() };
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g.events_port.write(|w| w);
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g.intenset.write(|w| w.port().set());
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}
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#[cfg(not(feature = "nrf9160"))]
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#[interrupt]
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unsafe fn GPIOTE() {
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let g = &*pac::GPIOTE::ptr();
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fn GPIOTE() {
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unsafe { handle_gpiote_interrupt() };
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}
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#[cfg(feature = "nrf9160")]
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#[interrupt]
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fn GPIOTE1() {
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unsafe { handle_gpiote_interrupt() };
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}
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unsafe fn handle_gpiote_interrupt() {
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let g = &*GPIOTE::ptr();
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for i in 0..CHANNEL_COUNT {
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if g.events_in[i].read().bits() != 0 {
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@ -80,9 +107,9 @@ unsafe fn GPIOTE() {
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g.events_port.write(|w| w);
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#[cfg(any(feature = "nrf52833", feature = "nrf52840"))]
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let ports = &[&*pac::P0::ptr(), &*pac::P1::ptr()];
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let ports = &[&*P0::ptr(), &*P1::ptr()];
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#[cfg(not(any(feature = "nrf52833", feature = "nrf52840")))]
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let ports = &[&*pac::P0::ptr()];
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let ports = &[&*P0::ptr()];
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for (port, &p) in ports.iter().enumerate() {
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let bits = p.latch.read().bits();
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@ -119,7 +146,7 @@ pub struct InputChannel<'d, C: Channel, T: GpioPin> {
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impl<'d, C: Channel, T: GpioPin> Drop for InputChannel<'d, C, T> {
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fn drop(&mut self) {
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let g = unsafe { &*pac::GPIOTE::ptr() };
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let g = unsafe { &*GPIOTE::ptr() };
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let num = self.ch.number();
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g.config[num].write(|w| w.mode().disabled());
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g.intenclr.write(|w| unsafe { w.bits(1 << num) });
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@ -128,7 +155,7 @@ impl<'d, C: Channel, T: GpioPin> Drop for InputChannel<'d, C, T> {
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impl<'d, C: Channel, T: GpioPin> InputChannel<'d, C, T> {
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pub fn new(ch: C, pin: Input<'d, T>, polarity: InputChannelPolarity) -> Self {
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let g = unsafe { &*pac::GPIOTE::ptr() };
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let g = unsafe { &*GPIOTE::ptr() };
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let num = ch.number();
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g.config[num].write(|w| {
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@ -152,7 +179,7 @@ impl<'d, C: Channel, T: GpioPin> InputChannel<'d, C, T> {
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}
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pub async fn wait(&self) {
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let g = unsafe { &*pac::GPIOTE::ptr() };
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let g = unsafe { &*GPIOTE::ptr() };
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let num = self.ch.number();
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// Enable interrupt
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@ -173,7 +200,7 @@ impl<'d, C: Channel, T: GpioPin> InputChannel<'d, C, T> {
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/// Returns the IN event, for use with PPI.
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pub fn event_in(&self) -> Event {
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let g = unsafe { &*pac::GPIOTE::ptr() };
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let g = unsafe { &*GPIOTE::ptr() };
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Event::from_reg(&g.events_in[self.ch.number()])
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}
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}
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@ -198,7 +225,7 @@ pub struct OutputChannel<'d, C: Channel, T: GpioPin> {
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impl<'d, C: Channel, T: GpioPin> Drop for OutputChannel<'d, C, T> {
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fn drop(&mut self) {
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let g = unsafe { &*pac::GPIOTE::ptr() };
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let g = unsafe { &*GPIOTE::ptr() };
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let num = self.ch.number();
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g.config[num].write(|w| w.mode().disabled());
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g.intenclr.write(|w| unsafe { w.bits(1 << num) });
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@ -207,7 +234,7 @@ impl<'d, C: Channel, T: GpioPin> Drop for OutputChannel<'d, C, T> {
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impl<'d, C: Channel, T: GpioPin> OutputChannel<'d, C, T> {
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pub fn new(ch: C, pin: Output<'d, T>, polarity: OutputChannelPolarity) -> Self {
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let g = unsafe { &*pac::GPIOTE::ptr() };
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let g = unsafe { &*GPIOTE::ptr() };
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let num = ch.number();
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g.config[num].write(|w| {
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@ -234,41 +261,41 @@ impl<'d, C: Channel, T: GpioPin> OutputChannel<'d, C, T> {
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/// Triggers `task out` (as configured with task_out_polarity, defaults to Toggle).
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pub fn out(&self) {
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let g = unsafe { &*pac::GPIOTE::ptr() };
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let g = unsafe { &*GPIOTE::ptr() };
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g.tasks_out[self.ch.number()].write(|w| unsafe { w.bits(1) });
|
||||
}
|
||||
|
||||
/// Triggers `task set` (set associated pin high).
|
||||
#[cfg(not(feature = "51"))]
|
||||
pub fn set(&self) {
|
||||
let g = unsafe { &*pac::GPIOTE::ptr() };
|
||||
let g = unsafe { &*GPIOTE::ptr() };
|
||||
g.tasks_set[self.ch.number()].write(|w| unsafe { w.bits(1) });
|
||||
}
|
||||
|
||||
/// Triggers `task clear` (set associated pin low).
|
||||
#[cfg(not(feature = "51"))]
|
||||
pub fn clear(&self) {
|
||||
let g = unsafe { &*pac::GPIOTE::ptr() };
|
||||
let g = unsafe { &*GPIOTE::ptr() };
|
||||
g.tasks_clr[self.ch.number()].write(|w| unsafe { w.bits(1) });
|
||||
}
|
||||
|
||||
/// Returns the OUT task, for use with PPI.
|
||||
pub fn task_out(&self) -> Task {
|
||||
let g = unsafe { &*pac::GPIOTE::ptr() };
|
||||
let g = unsafe { &*GPIOTE::ptr() };
|
||||
Task::from_reg(&g.tasks_out[self.ch.number()])
|
||||
}
|
||||
|
||||
/// Returns the CLR task, for use with PPI.
|
||||
#[cfg(not(feature = "51"))]
|
||||
pub fn task_clr(&self) -> Task {
|
||||
let g = unsafe { &*pac::GPIOTE::ptr() };
|
||||
let g = unsafe { &*GPIOTE::ptr() };
|
||||
Task::from_reg(&g.tasks_clr[self.ch.number()])
|
||||
}
|
||||
|
||||
/// Returns the SET task, for use with PPI.
|
||||
#[cfg(not(feature = "51"))]
|
||||
pub fn task_set(&self) -> Task {
|
||||
let g = unsafe { &*pac::GPIOTE::ptr() };
|
||||
let g = unsafe { &*GPIOTE::ptr() };
|
||||
Task::from_reg(&g.tasks_set[self.ch.number()])
|
||||
}
|
||||
}
|
||||
|
|
|
|||
|
|
@ -34,6 +34,7 @@ pub mod ppi;
|
|||
pub mod pwm;
|
||||
#[cfg(feature = "nrf52840")]
|
||||
pub mod qspi;
|
||||
#[cfg(not(feature = "nrf9160"))]
|
||||
pub mod rng;
|
||||
#[cfg(not(feature = "nrf52820"))]
|
||||
pub mod saadc;
|
||||
|
|
@ -65,6 +66,9 @@ mod chip;
|
|||
#[cfg(feature = "nrf52840")]
|
||||
#[path = "chips/nrf52840.rs"]
|
||||
mod chip;
|
||||
#[cfg(feature = "nrf9160")]
|
||||
#[path = "chips/nrf9160.rs"]
|
||||
mod chip;
|
||||
|
||||
pub use chip::EASY_DMA_SIZE;
|
||||
|
||||
|
|
@ -75,6 +79,11 @@ pub(crate) use chip::pac;
|
|||
|
||||
pub use chip::{peripherals, Peripherals};
|
||||
|
||||
#[cfg(feature = "nrf9160")]
|
||||
use crate::pac::CLOCK_NS as CLOCK;
|
||||
#[cfg(not(feature = "nrf9160"))]
|
||||
use crate::pac::CLOCK;
|
||||
|
||||
pub mod interrupt {
|
||||
pub use crate::chip::irqs::*;
|
||||
pub use cortex_m::interrupt::{CriticalSection, Mutex};
|
||||
|
|
@ -91,9 +100,12 @@ pub mod config {
|
|||
|
||||
pub enum LfclkSource {
|
||||
InternalRC,
|
||||
#[cfg(not(feature = "nrf9160"))]
|
||||
Synthesized,
|
||||
ExternalXtal,
|
||||
#[cfg(not(feature = "nrf9160"))]
|
||||
ExternalLowSwing,
|
||||
#[cfg(not(feature = "nrf9160"))]
|
||||
ExternalFullSwing,
|
||||
}
|
||||
|
||||
|
|
@ -129,7 +141,7 @@ pub fn init(config: config::Config) -> Peripherals {
|
|||
// before doing anything important.
|
||||
let peripherals = Peripherals::take();
|
||||
|
||||
let r = unsafe { &*pac::CLOCK::ptr() };
|
||||
let r = unsafe { &*CLOCK::ptr() };
|
||||
|
||||
// Start HFCLK.
|
||||
match config.hfclk_source {
|
||||
|
|
@ -143,6 +155,7 @@ pub fn init(config: config::Config) -> Peripherals {
|
|||
}
|
||||
|
||||
// Configure LFCLK.
|
||||
#[cfg(not(feature = "nrf9160"))]
|
||||
match config.lfclk_source {
|
||||
config::LfclkSource::InternalRC => r.lfclksrc.write(|w| w.src().rc()),
|
||||
config::LfclkSource::Synthesized => r.lfclksrc.write(|w| w.src().synth()),
|
||||
|
|
@ -162,6 +175,11 @@ pub fn init(config: config::Config) -> Peripherals {
|
|||
w
|
||||
}),
|
||||
}
|
||||
#[cfg(feature = "nrf9160")]
|
||||
match config.lfclk_source {
|
||||
config::LfclkSource::InternalRC => r.lfclksrc.write(|w| w.src().lfrc()),
|
||||
config::LfclkSource::ExternalXtal => r.lfclksrc.write(|w| w.src().lfxo()),
|
||||
}
|
||||
|
||||
// Start LFCLK.
|
||||
// Datasheet says this could take 100us from synth source
|
||||
|
|
|
|||
|
|
@ -16,6 +16,11 @@ use embassy_hal_common::{unborrow, unsafe_impl_unborrow};
|
|||
|
||||
use crate::{pac, peripherals};
|
||||
|
||||
#[cfg(not(feature = "nrf9160"))]
|
||||
pub(crate) use pac::PPI;
|
||||
#[cfg(feature = "nrf9160")]
|
||||
pub(crate) use pac::DPPIC_NS as PPI;
|
||||
|
||||
// ======================
|
||||
// driver
|
||||
|
||||
|
|
@ -27,45 +32,60 @@ pub struct Ppi<'d, C: Channel> {
|
|||
impl<'d, C: Channel> Ppi<'d, C> {
|
||||
pub fn new(ch: impl Unborrow<Target = C> + 'd) -> Self {
|
||||
unborrow!(ch);
|
||||
|
||||
#[allow(unused_mut)]
|
||||
let mut this = Self {
|
||||
ch,
|
||||
phantom: PhantomData,
|
||||
};
|
||||
#[cfg(not(feature = "51"))]
|
||||
#[cfg(not(any(feature = "51", feature = "nrf9160")))]
|
||||
this.clear_fork_task();
|
||||
this
|
||||
}
|
||||
|
||||
/// Enables the channel.
|
||||
pub fn enable(&mut self) {
|
||||
let r = unsafe { &*pac::PPI::ptr() };
|
||||
let r = unsafe { &*PPI::ptr() };
|
||||
r.chenset
|
||||
.write(|w| unsafe { w.bits(1 << self.ch.number()) });
|
||||
}
|
||||
|
||||
/// Disables the channel.
|
||||
pub fn disable(&mut self) {
|
||||
let r = unsafe { &*pac::PPI::ptr() };
|
||||
let r = unsafe { &*PPI::ptr() };
|
||||
r.chenclr
|
||||
.write(|w| unsafe { w.bits(1 << self.ch.number()) });
|
||||
}
|
||||
|
||||
#[cfg(not(feature = "51"))]
|
||||
#[cfg(not(any(feature = "51", feature = "nrf9160")))]
|
||||
/// Sets the fork task that must be triggered when the configured event occurs. The user must
|
||||
/// provide a reference to the task.
|
||||
pub fn set_fork_task(&mut self, task: Task) {
|
||||
let r = unsafe { &*pac::PPI::ptr() };
|
||||
let r = unsafe { &*PPI::ptr() };
|
||||
r.fork[self.ch.number()]
|
||||
.tep
|
||||
.write(|w| unsafe { w.bits(task.0.as_ptr() as u32) })
|
||||
}
|
||||
|
||||
#[cfg(not(feature = "51"))]
|
||||
#[cfg(not(any(feature = "51", feature = "nrf9160")))]
|
||||
/// Clear the fork task endpoint. Previously set task will no longer be triggered.
|
||||
pub fn clear_fork_task(&mut self) {
|
||||
let r = unsafe { &*pac::PPI::ptr() };
|
||||
let r = unsafe { &*PPI::ptr() };
|
||||
r.fork[self.ch.number()].tep.write(|w| unsafe { w.bits(0) })
|
||||
}
|
||||
|
||||
#[cfg(feature = "nrf9160")]
|
||||
/// Sets the fork task that must be triggered when the configured event occurs. The user must
|
||||
/// provide a reference to the task.
|
||||
pub fn set_fork_task(&mut self, _task: Task) {
|
||||
todo!("Tasks not yet implemented for nrf9160");
|
||||
}
|
||||
|
||||
#[cfg(feature = "nrf9160")]
|
||||
/// Clear the fork task endpoint. Previously set task will no longer be triggered.
|
||||
pub fn clear_fork_task(&mut self) {
|
||||
todo!("Tasks not yet implemented for nrf9160");
|
||||
}
|
||||
}
|
||||
|
||||
impl<'d, C: Channel> Drop for Ppi<'d, C> {
|
||||
|
|
@ -74,10 +94,11 @@ impl<'d, C: Channel> Drop for Ppi<'d, C> {
|
|||
}
|
||||
}
|
||||
|
||||
#[cfg(not(feature = "nrf9160"))]
|
||||
impl<'d, C: ConfigurableChannel> Ppi<'d, C> {
|
||||
/// Sets the task to be triggered when the configured event occurs.
|
||||
pub fn set_task(&mut self, task: Task) {
|
||||
let r = unsafe { &*pac::PPI::ptr() };
|
||||
let r = unsafe { &*PPI::ptr() };
|
||||
r.ch[self.ch.number()]
|
||||
.tep
|
||||
.write(|w| unsafe { w.bits(task.0.as_ptr() as u32) })
|
||||
|
|
@ -85,13 +106,26 @@ impl<'d, C: ConfigurableChannel> Ppi<'d, C> {
|
|||
|
||||
/// Sets the event that will trigger the chosen task(s).
|
||||
pub fn set_event(&mut self, event: Event) {
|
||||
let r = unsafe { &*pac::PPI::ptr() };
|
||||
let r = unsafe { &*PPI::ptr() };
|
||||
r.ch[self.ch.number()]
|
||||
.eep
|
||||
.write(|w| unsafe { w.bits(event.0.as_ptr() as u32) })
|
||||
}
|
||||
}
|
||||
|
||||
#[cfg(feature = "nrf9160")]
|
||||
impl<'d, C: ConfigurableChannel> Ppi<'d, C> {
|
||||
/// Sets the task to be triggered when the configured event occurs.
|
||||
pub fn set_task(&mut self, _task: Task) {
|
||||
todo!("Tasks not yet implemented for nrf9160")
|
||||
}
|
||||
|
||||
/// Sets the event that will trigger the chosen task(s).
|
||||
pub fn set_event(&mut self, _event: Event) {
|
||||
todo!("Events not yet implemented for nrf9160")
|
||||
}
|
||||
}
|
||||
|
||||
// ======================
|
||||
// traits
|
||||
|
||||
|
|
@ -183,6 +217,11 @@ macro_rules! impl_channel {
|
|||
};
|
||||
}
|
||||
|
||||
pub use channel_impl::*;
|
||||
#[cfg(not(feature = "nrf9160"))]
|
||||
mod channel_impl {
|
||||
use super::*;
|
||||
|
||||
impl_channel!(PPI_CH0, 0, configurable);
|
||||
impl_channel!(PPI_CH1, 1, configurable);
|
||||
impl_channel!(PPI_CH2, 2, configurable);
|
||||
|
|
@ -199,7 +238,7 @@ impl_channel!(PPI_CH12, 12, configurable);
|
|||
impl_channel!(PPI_CH13, 13, configurable);
|
||||
impl_channel!(PPI_CH14, 14, configurable);
|
||||
impl_channel!(PPI_CH15, 15, configurable);
|
||||
#[cfg(not(feature = "51"))]
|
||||
#[cfg(not(feature = "51",))]
|
||||
impl_channel!(PPI_CH16, 16, configurable);
|
||||
#[cfg(not(feature = "51"))]
|
||||
impl_channel!(PPI_CH17, 17, configurable);
|
||||
|
|
@ -219,6 +258,28 @@ impl_channel!(PPI_CH28, 28);
|
|||
impl_channel!(PPI_CH29, 29);
|
||||
impl_channel!(PPI_CH30, 30);
|
||||
impl_channel!(PPI_CH31, 31);
|
||||
}
|
||||
#[cfg(feature = "nrf9160")] // TODO: Implement configurability for nrf9160 and then remove these channel_impl modules
|
||||
mod channel_impl {
|
||||
use super::*;
|
||||
|
||||
impl_channel!(PPI_CH0, 0, configurable);
|
||||
impl_channel!(PPI_CH1, 1, configurable);
|
||||
impl_channel!(PPI_CH2, 2, configurable);
|
||||
impl_channel!(PPI_CH3, 3, configurable);
|
||||
impl_channel!(PPI_CH4, 4, configurable);
|
||||
impl_channel!(PPI_CH5, 5, configurable);
|
||||
impl_channel!(PPI_CH6, 6, configurable);
|
||||
impl_channel!(PPI_CH7, 7, configurable);
|
||||
impl_channel!(PPI_CH8, 8, configurable);
|
||||
impl_channel!(PPI_CH9, 9, configurable);
|
||||
impl_channel!(PPI_CH10, 10, configurable);
|
||||
impl_channel!(PPI_CH11, 11, configurable);
|
||||
impl_channel!(PPI_CH12, 12, configurable);
|
||||
impl_channel!(PPI_CH13, 13, configurable);
|
||||
impl_channel!(PPI_CH14, 14, configurable);
|
||||
impl_channel!(PPI_CH15, 15, configurable);
|
||||
}
|
||||
|
||||
// ======================
|
||||
// groups
|
||||
|
|
|
|||
|
|
@ -11,6 +11,12 @@ use crate::gpio::OptionalPin as GpioOptionalPin;
|
|||
use crate::interrupt::Interrupt;
|
||||
use crate::pac;
|
||||
|
||||
#[cfg(not(feature = "nrf9160"))]
|
||||
pub(crate) use pac::pwm0;
|
||||
#[cfg(feature = "nrf9160")]
|
||||
pub(crate) use pac::pwm0_ns as pwm0;
|
||||
|
||||
|
||||
#[derive(Debug, Eq, PartialEq, Clone, Copy)]
|
||||
pub enum Prescaler {
|
||||
Div1,
|
||||
|
|
@ -203,7 +209,7 @@ pub(crate) mod sealed {
|
|||
}
|
||||
|
||||
pub trait Instance {
|
||||
fn regs() -> &'static pac::pwm0::RegisterBlock;
|
||||
fn regs() -> &'static pwm0::RegisterBlock;
|
||||
fn state() -> &'static State;
|
||||
}
|
||||
}
|
||||
|
|
@ -215,7 +221,7 @@ pub trait Instance: Unborrow<Target = Self> + sealed::Instance + 'static {
|
|||
macro_rules! impl_pwm {
|
||||
($type:ident, $pac_type:ident, $irq:ident) => {
|
||||
impl crate::pwm::sealed::Instance for peripherals::$type {
|
||||
fn regs() -> &'static pac::pwm0::RegisterBlock {
|
||||
fn regs() -> &'static crate::pwm::pwm0::RegisterBlock {
|
||||
unsafe { &*pac::$pac_type::ptr() }
|
||||
}
|
||||
fn state() -> &'static crate::pwm::sealed::State {
|
||||
|
|
|
|||
|
|
@ -10,7 +10,10 @@ use futures::future::poll_fn;
|
|||
use crate::interrupt;
|
||||
use crate::{pac, peripherals};
|
||||
|
||||
#[cfg(not(feature = "nrf9160"))]
|
||||
use pac::{saadc, SAADC};
|
||||
#[cfg(feature = "nrf9160")]
|
||||
use pac::{saadc_ns as saadc, SAADC_NS as SAADC};
|
||||
|
||||
pub use saadc::{
|
||||
ch::{
|
||||
|
|
@ -200,7 +203,7 @@ macro_rules! positive_pin_mappings {
|
|||
|
||||
// TODO the variant names are unchecked
|
||||
// the pins are copied from nrf hal
|
||||
#[cfg(feature = "9160")]
|
||||
#[cfg(feature = "nrf9160")]
|
||||
positive_pin_mappings! {
|
||||
ANALOGINPUT0 => P0_13,
|
||||
ANALOGINPUT1 => P0_14,
|
||||
|
|
@ -212,7 +215,7 @@ positive_pin_mappings! {
|
|||
ANALOGINPUT7 => P0_20,
|
||||
}
|
||||
|
||||
#[cfg(not(feature = "9160"))]
|
||||
#[cfg(not(feature = "nrf9160"))]
|
||||
positive_pin_mappings! {
|
||||
ANALOGINPUT0 => P0_02,
|
||||
ANALOGINPUT1 => P0_03,
|
||||
|
|
|
|||
|
|
@ -17,8 +17,13 @@ use crate::gpio::{OptionalPin, Pin as GpioPin};
|
|||
use crate::interrupt::Interrupt;
|
||||
use crate::{pac, util::slice_in_ram_or};
|
||||
|
||||
#[cfg(not(feature = "nrf9160"))]
|
||||
pub(crate) use pac::spim0;
|
||||
#[cfg(feature = "nrf9160")]
|
||||
pub(crate) use pac::spim0_ns as spim0;
|
||||
|
||||
pub use embedded_hal::spi::{Mode, Phase, Polarity, MODE_0, MODE_1, MODE_2, MODE_3};
|
||||
pub use pac::spim0::frequency::FREQUENCY_A as Frequency;
|
||||
pub use spim0::frequency::FREQUENCY_A as Frequency;
|
||||
|
||||
#[derive(Debug, Clone, Copy, PartialEq, Eq)]
|
||||
#[cfg_attr(feature = "defmt", derive(defmt::Format))]
|
||||
|
|
@ -376,7 +381,7 @@ pub(crate) mod sealed {
|
|||
}
|
||||
|
||||
pub trait Instance {
|
||||
fn regs() -> &'static pac::spim0::RegisterBlock;
|
||||
fn regs() -> &'static spim0::RegisterBlock;
|
||||
fn state() -> &'static State;
|
||||
}
|
||||
}
|
||||
|
|
@ -388,7 +393,7 @@ pub trait Instance: Unborrow<Target = Self> + sealed::Instance + 'static {
|
|||
macro_rules! impl_spim {
|
||||
($type:ident, $pac_type:ident, $irq:ident) => {
|
||||
impl crate::spim::sealed::Instance for peripherals::$type {
|
||||
fn regs() -> &'static pac::spim0::RegisterBlock {
|
||||
fn regs() -> &'static crate::spim::spim0::RegisterBlock {
|
||||
unsafe { &*pac::$pac_type::ptr() }
|
||||
}
|
||||
fn state() -> &'static crate::spim::sealed::State {
|
||||
|
|
|
|||
|
|
@ -9,8 +9,16 @@ use embassy::time::driver::{AlarmHandle, Driver};
|
|||
use crate::interrupt;
|
||||
use crate::pac;
|
||||
|
||||
fn rtc() -> &'static pac::rtc0::RegisterBlock {
|
||||
#[cfg(not(feature = "nrf9160"))]
|
||||
pub(crate) use pac::rtc0;
|
||||
#[cfg(feature = "nrf9160")]
|
||||
pub(crate) use pac::rtc0_ns as rtc0;
|
||||
|
||||
fn rtc() -> &'static rtc0::RegisterBlock {
|
||||
#[cfg(not(feature = "nrf9160"))]
|
||||
unsafe { &*pac::RTC1::ptr() }
|
||||
#[cfg(feature = "nrf9160")]
|
||||
unsafe { &*pac::RTC1_NS::ptr() }
|
||||
}
|
||||
|
||||
// RTC timekeeping works with something we call "periods", which are time intervals
|
||||
|
|
|
|||
|
|
@ -15,6 +15,11 @@ use crate::pac;
|
|||
use crate::ppi::Event;
|
||||
use crate::ppi::Task;
|
||||
|
||||
#[cfg(not(feature = "nrf9160"))]
|
||||
pub(crate) use pac::timer0;
|
||||
#[cfg(feature = "nrf9160")]
|
||||
pub(crate) use pac::timer0_ns as timer0;
|
||||
|
||||
pub(crate) mod sealed {
|
||||
|
||||
use super::*;
|
||||
|
|
@ -22,7 +27,7 @@ pub(crate) mod sealed {
|
|||
pub trait Instance {
|
||||
/// The number of CC registers this instance has.
|
||||
const CCS: usize;
|
||||
fn regs() -> &'static pac::timer0::RegisterBlock;
|
||||
fn regs() -> &'static timer0::RegisterBlock;
|
||||
/// Storage for the waker for CC register `n`.
|
||||
fn waker(n: usize) -> &'static AtomicWaker;
|
||||
}
|
||||
|
|
@ -40,8 +45,8 @@ macro_rules! impl_timer {
|
|||
($type:ident, $pac_type:ident, $irq:ident, $ccs:literal) => {
|
||||
impl crate::timer::sealed::Instance for peripherals::$type {
|
||||
const CCS: usize = $ccs;
|
||||
fn regs() -> &'static pac::timer0::RegisterBlock {
|
||||
unsafe { &*(pac::$pac_type::ptr() as *const pac::timer0::RegisterBlock) }
|
||||
fn regs() -> &'static crate::timer::timer0::RegisterBlock {
|
||||
unsafe { &*(pac::$pac_type::ptr() as *const crate::timer::timer0::RegisterBlock) }
|
||||
}
|
||||
fn waker(n: usize) -> &'static ::embassy::waitqueue::AtomicWaker {
|
||||
use ::embassy::waitqueue::AtomicWaker;
|
||||
|
|
|
|||
|
|
@ -24,6 +24,11 @@ use crate::gpio::Pin as GpioPin;
|
|||
use crate::pac;
|
||||
use crate::util::{slice_in_ram, slice_in_ram_or};
|
||||
|
||||
#[cfg(not(feature = "nrf9160"))]
|
||||
pub(crate) use pac::twim0;
|
||||
#[cfg(feature = "nrf9160")]
|
||||
pub(crate) use pac::twim0_ns as twim0;
|
||||
|
||||
pub enum Frequency {
|
||||
#[doc = "26738688: 100 kbps"]
|
||||
K100 = 26738688,
|
||||
|
|
@ -721,7 +726,7 @@ pub(crate) mod sealed {
|
|||
}
|
||||
|
||||
pub trait Instance {
|
||||
fn regs() -> &'static pac::twim0::RegisterBlock;
|
||||
fn regs() -> &'static twim0::RegisterBlock;
|
||||
fn state() -> &'static State;
|
||||
}
|
||||
}
|
||||
|
|
@ -733,7 +738,7 @@ pub trait Instance: Unborrow<Target = Self> + sealed::Instance + 'static {
|
|||
macro_rules! impl_twim {
|
||||
($type:ident, $pac_type:ident, $irq:ident) => {
|
||||
impl crate::twim::sealed::Instance for peripherals::$type {
|
||||
fn regs() -> &'static pac::twim0::RegisterBlock {
|
||||
fn regs() -> &'static crate::twim::twim0::RegisterBlock {
|
||||
unsafe { &*pac::$pac_type::ptr() }
|
||||
}
|
||||
fn state() -> &'static crate::twim::sealed::State {
|
||||
|
|
|
|||
|
|
@ -22,8 +22,13 @@ use crate::ppi::{AnyConfigurableChannel, ConfigurableChannel, Event, Ppi, Task};
|
|||
use crate::timer::Instance as TimerInstance;
|
||||
use crate::timer::{Frequency, Timer};
|
||||
|
||||
#[cfg(not(feature = "nrf9160"))]
|
||||
pub(crate) use pac::uarte0;
|
||||
#[cfg(feature = "nrf9160")]
|
||||
pub(crate) use pac::uarte0_ns as uarte0;
|
||||
|
||||
// Re-export SVD variants to allow user to directly set values.
|
||||
pub use pac::uarte0::{baudrate::BAUDRATE_A as Baudrate, config::PARITY_A as Parity};
|
||||
pub use uarte0::{baudrate::BAUDRATE_A as Baudrate, config::PARITY_A as Parity};
|
||||
|
||||
#[non_exhaustive]
|
||||
pub struct Config {
|
||||
|
|
@ -458,7 +463,7 @@ pub(crate) mod sealed {
|
|||
}
|
||||
|
||||
pub trait Instance {
|
||||
fn regs() -> &'static pac::uarte0::RegisterBlock;
|
||||
fn regs() -> &'static uarte0::RegisterBlock;
|
||||
fn state() -> &'static State;
|
||||
}
|
||||
}
|
||||
|
|
@ -470,7 +475,7 @@ pub trait Instance: Unborrow<Target = Self> + sealed::Instance + 'static + Send
|
|||
macro_rules! impl_uarte {
|
||||
($type:ident, $pac_type:ident, $irq:ident) => {
|
||||
impl crate::uarte::sealed::Instance for peripherals::$type {
|
||||
fn regs() -> &'static pac::uarte0::RegisterBlock {
|
||||
fn regs() -> &'static crate::uarte::uarte0::RegisterBlock {
|
||||
unsafe { &*pac::$pac_type::ptr() }
|
||||
}
|
||||
fn state() -> &'static crate::uarte::sealed::State {
|
||||
|
|
|
|||
|
|
@ -3,7 +3,13 @@
|
|||
//! This HAL implements a basic watchdog timer with 1..=8 handles.
|
||||
//! Once the watchdog has been started, it cannot be stopped.
|
||||
|
||||
use crate::pac::WDT;
|
||||
use crate::pac;
|
||||
|
||||
#[cfg(not(feature = "nrf9160"))]
|
||||
pub(crate) use pac::WDT;
|
||||
#[cfg(feature = "nrf9160")]
|
||||
pub(crate) use pac::WDT_NS as WDT;
|
||||
|
||||
use crate::peripherals;
|
||||
|
||||
const MIN_TICKS: u32 = 15;
|
||||
|
|
@ -58,7 +64,12 @@ impl Watchdog {
|
|||
let crv = config.timeout_ticks.max(MIN_TICKS);
|
||||
let rren = (1u32 << N) - 1;
|
||||
|
||||
if r.runstatus.read().runstatus().bit() {
|
||||
#[cfg(not(feature = "nrf9160"))]
|
||||
let runstatus = r.runstatus.read().runstatus().bit();
|
||||
#[cfg(feature = "nrf9160")]
|
||||
let runstatus = r.runstatus.read().runstatuswdt().bit();
|
||||
|
||||
if runstatus {
|
||||
let curr_config = r.config.read();
|
||||
if curr_config.halt().bit() != config.run_during_debug_halt
|
||||
|| curr_config.sleep().bit() != config.run_during_sleep
|
||||
|
|
|
|||
|
|
@ -3,4 +3,4 @@
|
|||
[toolchain]
|
||||
channel = "nightly-2021-08-18"
|
||||
components = [ "rust-src", "rustfmt" ]
|
||||
targets = [ "thumbv7em-none-eabi", "thumbv7m-none-eabi", "thumbv6m-none-eabi", "thumbv7em-none-eabihf", "wasm32-unknown-unknown" ]
|
||||
targets = [ "thumbv7em-none-eabi", "thumbv7m-none-eabi", "thumbv6m-none-eabi", "thumbv7em-none-eabihf", "thumbv8m.main-none-eabihf", "wasm32-unknown-unknown" ]
|
||||
|
|
|
|||
Loading…
Reference in a new issue