Address versioning and format issues raised by CI

This commit is contained in:
Karun 2024-04-22 12:36:17 -04:00
parent fd69247d70
commit 253f6c42ee
3 changed files with 49 additions and 9 deletions
embassy-stm32/src

View file

@ -101,10 +101,10 @@ pub mod sai;
pub mod sdmmc; pub mod sdmmc;
#[cfg(spi)] #[cfg(spi)]
pub mod spi; pub mod spi;
#[cfg(ucpd)]
pub mod ucpd;
#[cfg(tsc)] #[cfg(tsc)]
pub mod tsc; pub mod tsc;
#[cfg(ucpd)]
pub mod ucpd;
#[cfg(uid)] #[cfg(uid)]
pub mod uid; pub mod uid;
#[cfg(usart)] #[cfg(usart)]

View file

@ -27,13 +27,21 @@ pub enum TscIOPin {
Group6Io2, Group6Io2,
Group6Io3, Group6Io3,
Group6Io4, Group6Io4,
#[cfg(any(tsc_v2, tsc_v3))]
Group7Io1, Group7Io1,
#[cfg(any(tsc_v2, tsc_v3))]
Group7Io2, Group7Io2,
#[cfg(any(tsc_v2, tsc_v3))]
Group7Io3, Group7Io3,
#[cfg(any(tsc_v2, tsc_v3))]
Group7Io4, Group7Io4,
#[cfg(tsc_v3)]
Group8Io1, Group8Io1,
#[cfg(tsc_v3)]
Group8Io2, Group8Io2,
#[cfg(tsc_v3)]
Group8Io3, Group8Io3,
#[cfg(tsc_v3)]
Group8Io4, Group8Io4,
} }
@ -78,13 +86,21 @@ impl Into<u32> for TscIOPin {
TscIOPin::Group6Io2 => 0x00200000, TscIOPin::Group6Io2 => 0x00200000,
TscIOPin::Group6Io3 => 0x00400000, TscIOPin::Group6Io3 => 0x00400000,
TscIOPin::Group6Io4 => 0x00800000, TscIOPin::Group6Io4 => 0x00800000,
#[cfg(any(tsc_v2, tsc_v3))]
TscIOPin::Group7Io1 => 0x01000000, TscIOPin::Group7Io1 => 0x01000000,
#[cfg(any(tsc_v2, tsc_v3))]
TscIOPin::Group7Io2 => 0x02000000, TscIOPin::Group7Io2 => 0x02000000,
#[cfg(any(tsc_v2, tsc_v3))]
TscIOPin::Group7Io3 => 0x04000000, TscIOPin::Group7Io3 => 0x04000000,
#[cfg(any(tsc_v2, tsc_v3))]
TscIOPin::Group7Io4 => 0x08000000, TscIOPin::Group7Io4 => 0x08000000,
#[cfg(tsc_v3)]
TscIOPin::Group8Io1 => 0x10000000, TscIOPin::Group8Io1 => 0x10000000,
#[cfg(tsc_v3)]
TscIOPin::Group8Io2 => 0x20000000, TscIOPin::Group8Io2 => 0x20000000,
#[cfg(tsc_v3)]
TscIOPin::Group8Io3 => 0x40000000, TscIOPin::Group8Io3 => 0x40000000,
#[cfg(tsc_v3)]
TscIOPin::Group8Io4 => 0x80000000, TscIOPin::Group8Io4 => 0x80000000,
} }
} }

View file

@ -5,13 +5,14 @@
/// Enums defined for peripheral parameters /// Enums defined for peripheral parameters
pub mod enums; pub mod enums;
use crate::gpio::{low_level::AFType, AnyPin, Pull}; pub use enums::*;
use crate::{pac::tsc::Tsc as Regs, rcc::RccPeripheral};
use crate::gpio::{AFType, AnyPin, Pull};
use crate::pac::tsc::Tsc as Regs;
use crate::rcc::RccPeripheral;
use crate::{peripherals, Peripheral}; use crate::{peripherals, Peripheral};
use embassy_hal_internal::{into_ref, PeripheralRef}; use embassy_hal_internal::{into_ref, PeripheralRef};
pub use enums::*;
const TSC_NUM_GROUPS: u32 = 8; const TSC_NUM_GROUPS: u32 = 8;
/// Error type defined for TSC /// Error type defined for TSC
@ -68,7 +69,9 @@ pub enum Group {
Four, Four,
Five, Five,
Six, Six,
#[cfg(any(tsc_v2, tsc_v3))]
Seven, Seven,
#[cfg(tsc_v3)]
Eight, Eight,
} }
@ -81,7 +84,9 @@ impl Into<usize> for Group {
Group::Four => 3, Group::Four => 3,
Group::Five => 4, Group::Five => 4,
Group::Six => 5, Group::Six => 5,
#[cfg(any(tsc_v2, tsc_v3))]
Group::Seven => 6, Group::Seven => 6,
#[cfg(tsc_v3)]
Group::Eight => 7, Group::Eight => 7,
} }
} }
@ -175,7 +180,9 @@ pub struct Tsc<'d, T: Instance> {
g4: Option<PinGroup<'d, AnyPin>>, g4: Option<PinGroup<'d, AnyPin>>,
g5: Option<PinGroup<'d, AnyPin>>, g5: Option<PinGroup<'d, AnyPin>>,
g6: Option<PinGroup<'d, AnyPin>>, g6: Option<PinGroup<'d, AnyPin>>,
#[cfg(any(tsc_v2, tsc_v3))]
g7: Option<PinGroup<'d, AnyPin>>, g7: Option<PinGroup<'d, AnyPin>>,
#[cfg(tsc_v3)]
g8: Option<PinGroup<'d, AnyPin>>, g8: Option<PinGroup<'d, AnyPin>>,
state: State, state: State,
config: Config, config: Config,
@ -310,7 +317,20 @@ impl<'d, T: Instance> Tsc<'d, T> {
}; };
// Need to check valid pin configuration input // Need to check valid pin configuration input
Self::new_inner(peri, Some(g1), Some(g2), None, Some(g4), None, None, None, None, config) Self::new_inner(
peri,
Some(g1),
Some(g2),
None,
Some(g4),
None,
None,
#[cfg(any(tsc_v2, tsc_v3))]
None,
#[cfg(tsc_v3)]
None,
config,
)
} }
// fn configure_pin<'b, G: Pin>(pin: PeripheralRef<'b, G>, role: PinType) { // fn configure_pin<'b, G: Pin>(pin: PeripheralRef<'b, G>, role: PinType) {
@ -340,8 +360,8 @@ impl<'d, T: Instance> Tsc<'d, T> {
g4: Option<PinGroup<'d, AnyPin>>, g4: Option<PinGroup<'d, AnyPin>>,
g5: Option<PinGroup<'d, AnyPin>>, g5: Option<PinGroup<'d, AnyPin>>,
g6: Option<PinGroup<'d, AnyPin>>, g6: Option<PinGroup<'d, AnyPin>>,
g7: Option<PinGroup<'d, AnyPin>>, #[cfg(any(tsc_v2, tsc_v3))] g7: Option<PinGroup<'d, AnyPin>>,
g8: Option<PinGroup<'d, AnyPin>>, #[cfg(tsc_v3)] g8: Option<PinGroup<'d, AnyPin>>,
config: Config, config: Config,
) -> Self { ) -> Self {
into_ref!(peri); into_ref!(peri);
@ -411,7 +431,9 @@ impl<'d, T: Instance> Tsc<'d, T> {
g4, g4,
g5, g5,
g6, g6,
#[cfg(any(tsc_v2, tsc_v3))]
g7, g7,
#[cfg(tsc_v3)]
g8, g8,
state: State::Ready, state: State::Ready,
config, config,
@ -548,7 +570,9 @@ impl<'d, T: Instance> Tsc<'d, T> {
Group::Four => T::REGS.iogcsr().read().g4s(), Group::Four => T::REGS.iogcsr().read().g4s(),
Group::Five => T::REGS.iogcsr().read().g5s(), Group::Five => T::REGS.iogcsr().read().g5s(),
Group::Six => T::REGS.iogcsr().read().g6s(), Group::Six => T::REGS.iogcsr().read().g6s(),
#[cfg(any(tsc_v2, tsc_v3))]
Group::Seven => T::REGS.iogcsr().read().g7s(), Group::Seven => T::REGS.iogcsr().read().g7s(),
#[cfg(tsc_v3)]
Group::Eight => T::REGS.iogcsr().read().g8s(), Group::Eight => T::REGS.iogcsr().read().g8s(),
}; };
match status { match status {