NaxdyOrg/embassy
1
0
Fork 0
Code Issues Pull requests Projects Releases Packages Wiki Activity

stm32/spi: rename rxdma, txdma -> rx_dma, tx_dma.

Browse source
This commit is contained in:
Dario Nieuwenhuis 2024-04-15 21:56:08 +02:00
parent 09a284e959
commit 2eab099b85
1 changed files with 27 additions and 27 deletions

54
embassy-stm32/src/spi/mod.rs
View file

@ -97,8 +97,8 @@ pub struct Spi<'d, T: Instance, M: PeriMode> {
sck: Option<PeripheralRef<'d, AnyPin>>, sck: Option<PeripheralRef<'d, AnyPin>>,
mosi: Option<PeripheralRef<'d, AnyPin>>, mosi: Option<PeripheralRef<'d, AnyPin>>,
miso: Option<PeripheralRef<'d, AnyPin>>, miso: Option<PeripheralRef<'d, AnyPin>>,
txdma: Option<ChannelAndRequest<'d>>, tx_dma: Option<ChannelAndRequest<'d>>,
rxdma: Option<ChannelAndRequest<'d>>, rx_dma: Option<ChannelAndRequest<'d>>,
_phantom: PhantomData<M>, _phantom: PhantomData<M>,
current_word_size: word_impl::Config, current_word_size: word_impl::Config,
} }
@ -109,8 +109,8 @@ impl<'d, T: Instance, M: PeriMode> Spi<'d, T, M> {
sck: Option<PeripheralRef<'d, AnyPin>>, sck: Option<PeripheralRef<'d, AnyPin>>,
mosi: Option<PeripheralRef<'d, AnyPin>>, mosi: Option<PeripheralRef<'d, AnyPin>>,
miso: Option<PeripheralRef<'d, AnyPin>>, miso: Option<PeripheralRef<'d, AnyPin>>,
txdma: Option<ChannelAndRequest<'d>>, tx_dma: Option<ChannelAndRequest<'d>>,
rxdma: Option<ChannelAndRequest<'d>>, rx_dma: Option<ChannelAndRequest<'d>>,
config: Config, config: Config,
) -> Self { ) -> Self {
into_ref!(peri); into_ref!(peri);
@ -209,8 +209,8 @@ impl<'d, T: Instance, M: PeriMode> Spi<'d, T, M> {
sck, sck,
mosi, mosi,
miso, miso,
txdma, tx_dma,
rxdma, rx_dma,
current_word_size: <u8 as SealedWord>::CONFIG, current_word_size: <u8 as SealedWord>::CONFIG,
_phantom: PhantomData, _phantom: PhantomData,
} }
@ -479,8 +479,8 @@ impl<'d, T: Instance> Spi<'d, T, Async> {
sck: impl Peripheral<P = impl SckPin<T>> + 'd, sck: impl Peripheral<P = impl SckPin<T>> + 'd,
mosi: impl Peripheral<P = impl MosiPin<T>> + 'd, mosi: impl Peripheral<P = impl MosiPin<T>> + 'd,
miso: impl Peripheral<P = impl MisoPin<T>> + 'd, miso: impl Peripheral<P = impl MisoPin<T>> + 'd,
txdma: impl Peripheral<P = impl TxDma<T>> + 'd, tx_dma: impl Peripheral<P = impl TxDma<T>> + 'd,
rxdma: impl Peripheral<P = impl RxDma<T>> + 'd, rx_dma: impl Peripheral<P = impl RxDma<T>> + 'd,
config: Config, config: Config,
) -> Self { ) -> Self {
Self::new_inner( Self::new_inner(
@ -488,8 +488,8 @@ impl<'d, T: Instance> Spi<'d, T, Async> {
new_pin!(sck, AFType::OutputPushPull, Speed::VeryHigh, config.sck_pull_mode()), new_pin!(sck, AFType::OutputPushPull, Speed::VeryHigh, config.sck_pull_mode()),
new_pin!(mosi, AFType::OutputPushPull, Speed::VeryHigh), new_pin!(mosi, AFType::OutputPushPull, Speed::VeryHigh),
new_pin!(miso, AFType::Input, Speed::VeryHigh), new_pin!(miso, AFType::Input, Speed::VeryHigh),
new_dma!(txdma), new_dma!(tx_dma),
new_dma!(rxdma), new_dma!(rx_dma),
config, config,
) )
} }
@ -499,7 +499,7 @@ impl<'d, T: Instance> Spi<'d, T, Async> {
peri: impl Peripheral<P = T> + 'd, peri: impl Peripheral<P = T> + 'd,
sck: impl Peripheral<P = impl SckPin<T>> + 'd, sck: impl Peripheral<P = impl SckPin<T>> + 'd,
miso: impl Peripheral<P = impl MisoPin<T>> + 'd, miso: impl Peripheral<P = impl MisoPin<T>> + 'd,
rxdma: impl Peripheral<P = impl RxDma<T>> + 'd, rx_dma: impl Peripheral<P = impl RxDma<T>> + 'd,
config: Config, config: Config,
) -> Self { ) -> Self {
Self::new_inner( Self::new_inner(
@ -508,7 +508,7 @@ impl<'d, T: Instance> Spi<'d, T, Async> {
None, None,
new_pin!(miso, AFType::Input, Speed::VeryHigh), new_pin!(miso, AFType::Input, Speed::VeryHigh),
None, None,
new_dma!(rxdma), new_dma!(rx_dma),
config, config,
) )
} }
@ -518,7 +518,7 @@ impl<'d, T: Instance> Spi<'d, T, Async> {
peri: impl Peripheral<P = T> + 'd, peri: impl Peripheral<P = T> + 'd,
sck: impl Peripheral<P = impl SckPin<T>> + 'd, sck: impl Peripheral<P = impl SckPin<T>> + 'd,
mosi: impl Peripheral<P = impl MosiPin<T>> + 'd, mosi: impl Peripheral<P = impl MosiPin<T>> + 'd,
txdma: impl Peripheral<P = impl TxDma<T>> + 'd, tx_dma: impl Peripheral<P = impl TxDma<T>> + 'd,
config: Config, config: Config,
) -> Self { ) -> Self {
Self::new_inner( Self::new_inner(
@ -526,7 +526,7 @@ impl<'d, T: Instance> Spi<'d, T, Async> {
new_pin!(sck, AFType::OutputPushPull, Speed::VeryHigh, config.sck_pull_mode()), new_pin!(sck, AFType::OutputPushPull, Speed::VeryHigh, config.sck_pull_mode()),
new_pin!(mosi, AFType::OutputPushPull, Speed::VeryHigh), new_pin!(mosi, AFType::OutputPushPull, Speed::VeryHigh),
None, None,
new_dma!(txdma), new_dma!(tx_dma),
None, None,
config, config,
) )
@ -538,7 +538,7 @@ impl<'d, T: Instance> Spi<'d, T, Async> {
pub fn new_txonly_nosck( pub fn new_txonly_nosck(
peri: impl Peripheral<P = T> + 'd, peri: impl Peripheral<P = T> + 'd,
mosi: impl Peripheral<P = impl MosiPin<T>> + 'd, mosi: impl Peripheral<P = impl MosiPin<T>> + 'd,
txdma: impl Peripheral<P = impl TxDma<T>> + 'd, tx_dma: impl Peripheral<P = impl TxDma<T>> + 'd,
config: Config, config: Config,
) -> Self { ) -> Self {
Self::new_inner( Self::new_inner(
@ -546,7 +546,7 @@ impl<'d, T: Instance> Spi<'d, T, Async> {
None, None,
new_pin!(mosi, AFType::OutputPushPull, Speed::VeryHigh), new_pin!(mosi, AFType::OutputPushPull, Speed::VeryHigh),
None, None,
new_dma!(txdma), new_dma!(tx_dma),
None, None,
config, config,
) )
@ -556,8 +556,8 @@ impl<'d, T: Instance> Spi<'d, T, Async> {
/// Useful for on chip peripherals like SUBGHZ which are hardwired. /// Useful for on chip peripherals like SUBGHZ which are hardwired.
pub fn new_subghz( pub fn new_subghz(
peri: impl Peripheral<P = T> + 'd, peri: impl Peripheral<P = T> + 'd,
txdma: impl Peripheral<P = impl TxDma<T>> + 'd, tx_dma: impl Peripheral<P = impl TxDma<T>> + 'd,
rxdma: impl Peripheral<P = impl RxDma<T>> + 'd, rx_dma: impl Peripheral<P = impl RxDma<T>> + 'd,
) -> Self { ) -> Self {
// see RM0453 rev 1 section 7.2.13 page 291 // see RM0453 rev 1 section 7.2.13 page 291
// The SUBGHZSPI_SCK frequency is obtained by PCLK3 divided by two. // The SUBGHZSPI_SCK frequency is obtained by PCLK3 divided by two.
@ -569,17 +569,17 @@ impl<'d, T: Instance> Spi<'d, T, Async> {
config.bit_order = BitOrder::MsbFirst; config.bit_order = BitOrder::MsbFirst;
config.frequency = freq; config.frequency = freq;
Self::new_inner(peri, None, None, None, new_dma!(txdma), new_dma!(rxdma), config) Self::new_inner(peri, None, None, None, new_dma!(tx_dma), new_dma!(rx_dma), config)
} }
#[allow(dead_code)] #[allow(dead_code)]
pub(crate) fn new_internal( pub(crate) fn new_internal(
peri: impl Peripheral<P = T> + 'd, peri: impl Peripheral<P = T> + 'd,
txdma: impl Peripheral<P = impl TxDma<T>> + 'd, tx_dma: impl Peripheral<P = impl TxDma<T>> + 'd,
rxdma: impl Peripheral<P = impl RxDma<T>> + 'd, rx_dma: impl Peripheral<P = impl RxDma<T>> + 'd,
config: Config, config: Config,
) -> Self { ) -> Self {
Self::new_inner(peri, None, None, None, new_dma!(txdma), new_dma!(rxdma), config) Self::new_inner(peri, None, None, None, new_dma!(tx_dma), new_dma!(rx_dma), config)
} }
/// SPI write, using DMA. /// SPI write, using DMA.
@ -594,7 +594,7 @@ impl<'d, T: Instance> Spi<'d, T, Async> {
}); });
let tx_dst = T::REGS.tx_ptr(); let tx_dst = T::REGS.tx_ptr();
let tx_f = unsafe { self.txdma.as_mut().unwrap().write(data, tx_dst, Default::default()) }; let tx_f = unsafe { self.tx_dma.as_mut().unwrap().write(data, tx_dst, Default::default()) };
set_txdmaen(T::REGS, true); set_txdmaen(T::REGS, true);
T::REGS.cr1().modify(|w| { T::REGS.cr1().modify(|w| {
@ -632,12 +632,12 @@ impl<'d, T: Instance> Spi<'d, T, Async> {
let clock_byte_count = data.len(); let clock_byte_count = data.len();
let rx_src = T::REGS.rx_ptr(); let rx_src = T::REGS.rx_ptr();
let rx_f = unsafe { self.rxdma.as_mut().unwrap().read(rx_src, data, Default::default()) }; let rx_f = unsafe { self.rx_dma.as_mut().unwrap().read(rx_src, data, Default::default()) };
let tx_dst = T::REGS.tx_ptr(); let tx_dst = T::REGS.tx_ptr();
let clock_byte = 0x00u8; let clock_byte = 0x00u8;
let tx_f = unsafe { let tx_f = unsafe {
self.txdma self.tx_dma
.as_mut() .as_mut()
.unwrap() .unwrap()
.write_repeated(&clock_byte, clock_byte_count, tx_dst, Default::default()) .write_repeated(&clock_byte, clock_byte_count, tx_dst, Default::default())
@ -679,11 +679,11 @@ impl<'d, T: Instance> Spi<'d, T, Async> {
set_rxdmaen(T::REGS, true); set_rxdmaen(T::REGS, true);
let rx_src = T::REGS.rx_ptr(); let rx_src = T::REGS.rx_ptr();
let rx_f = unsafe { self.rxdma.as_mut().unwrap().read_raw(rx_src, read, Default::default()) }; let rx_f = unsafe { self.rx_dma.as_mut().unwrap().read_raw(rx_src, read, Default::default()) };
let tx_dst = T::REGS.tx_ptr(); let tx_dst = T::REGS.tx_ptr();
let tx_f = unsafe { let tx_f = unsafe {
self.txdma self.tx_dma
.as_mut() .as_mut()
.unwrap() .unwrap()
.write_raw(write, tx_dst, Default::default()) .write_raw(write, tx_dst, Default::default())