stm32/gpdma: clear all interrupts after reset.
Reset doesn't clear them, this causes subsequent transfers to instantly complete because the TC flag was set from before.
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@ -252,6 +252,7 @@ impl<'a, C: Channel> Transfer<'a, C> {
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super::dmamux::configure_dmamux(&mut *this.channel, request);
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ch.cr().write(|w| w.set_reset(true));
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ch.fcr().write(|w| w.0 = 0xFFFF_FFFF); // clear all irqs
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ch.llr().write(|_| {}); // no linked list
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ch.tr1().write(|w| {
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w.set_sdw(data_size.into());
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