clean-up example
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xoviat
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3 changed files with 65 additions and 129 deletions
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@ -18,7 +18,7 @@ defmt-error = []
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[dependencies]
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embassy = { version = "0.1.0", path = "../embassy", features = ["defmt", "defmt-trace"] }
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# embassy-stm32f4 = { version = "*", path = "../embassy-stm32f4", features = ["stm32f405"] }
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embassy-stm32f4 = { version = "*", path = "../embassy-stm32f4", features = ["stm32f405"] }
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defmt = "0.1.3"
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defmt-rtt = "0.1.0"
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@ -29,10 +29,11 @@ embedded-hal = { version = "0.2.4" }
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panic-probe = "0.1.0"
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stm32f4xx-hal = { version = "0.8.3", features = ["rt", "stm32f405"], git = "https://github.com/xoviat/stm32f4xx-hal.git", branch = "dma-is-done"}
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futures = { version = "0.3.8", default-features = false, features = ["async-await"] }
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cortex-m-rtic = "0.5" # { git = "https://github.com/rtic-rs/cortex-m-rtic", branch = "master"}
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cortex-m-rtic = "0.5"
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rtt-target = { version = "0.3", features = ["cortex-m"] }
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[[bin]]
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name = "dma_adc"
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path = "src/dma_adc.rs"
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name = "serial"
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path = "src/serial.rs"
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@ -1,125 +0,0 @@
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#![no_std]
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#![no_main]
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#![feature(lang_items)]
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use core::{
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panic::PanicInfo,
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sync::atomic::{compiler_fence, Ordering},
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};
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use cortex_m::singleton;
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use rtic::app;
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// use rtt_target::{rprintln, rtt_init_print};
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use stm32f4xx_hal::{
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dma::{config::DmaConfig, Channel0, PeripheralToMemory, Stream0, StreamsTuple, Transfer},
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pac::{ADC1, DMA2, RCC},
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prelude::*,
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};
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#[lang = "eh_personality"]
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extern "C" fn eh_personality() {}
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type DmaTransfer =
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Transfer<Stream0<DMA2>, Channel0, ADC1, PeripheralToMemory, &'static mut [u16; 128]>;
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#[app(device = stm32f4xx_hal::pac, peripherals = true)]
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const APP: () = {
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struct Resources {
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transfer: DmaTransfer,
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triple_buffer: Option<&'static mut [u16; 128]>,
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}
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#[init]
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fn init(cx: init::Context) -> init::LateResources {
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let rcc = cx.device.RCC.constrain();
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// rtt_init_print!();
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// rprintln!("Init");
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let _clocks = rcc
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.cfgr
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.sysclk(84.mhz())
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.pclk2(28.mhz())
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.pclk1(28.mhz())
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.freeze();
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let gpioa = cx.device.GPIOA.split();
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let _pa0 = gpioa.pa0.into_analog();
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let stream_0 = StreamsTuple::new(cx.device.DMA2).0;
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let config = DmaConfig::default()
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.transfer_complete_interrupt(true)
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.memory_increment(true)
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.double_buffer(true);
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let rcc = unsafe { &*RCC::ptr() };
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rcc.apb2enr.modify(|_, w| w.adc1en().enabled());
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rcc.apb2rstr.modify(|_, w| w.adcrst().set_bit());
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rcc.apb2rstr.modify(|_, w| w.adcrst().clear_bit());
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let adc = cx.device.ADC1;
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adc.cr2.modify(|_, w| {
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w.dma()
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.enabled()
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.cont()
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.continuous()
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.dds()
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.continuous()
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.adon()
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.enabled()
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});
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let first_buffer = singleton!(: [u16; 128] = [0; 128]).unwrap();
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let second_buffer = singleton!(: [u16; 128] = [0; 128]).unwrap();
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let triple_buffer = Some(singleton!(: [u16; 128] = [0; 128]).unwrap());
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let transfer = Transfer::init(stream_0, adc, first_buffer, Some(second_buffer), config);
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// rprintln!("Finished init");
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init::LateResources {
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transfer,
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triple_buffer,
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}
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}
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#[idle(resources = [transfer])]
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fn idle(mut cx: idle::Context) -> ! {
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cx.resources.transfer.lock(|shared| {
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shared.start(|adc| {
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adc.cr2.modify(|_, w| w.swstart().start());
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});
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});
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// rprintln!("DMA started");
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loop {
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compiler_fence(Ordering::SeqCst);
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}
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}
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#[task(binds = DMA2_STREAM0, priority = 2, resources = [transfer, triple_buffer])]
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fn dma(cx: dma::Context) {
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static mut COUNT: usize = 0;
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let triple = cx.resources.triple_buffer.take().unwrap();
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let buf = cx
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.resources
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.transfer
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.next_transfer(triple)
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.map_err(|_| {})
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.unwrap()
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.0;
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if *COUNT % (1 << 14) == 0 {
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// rprintln!("Buf: {:?}", &buf[0..10]);
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}
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*COUNT += 1;
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*cx.resources.triple_buffer = Some(buf);
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}
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};
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#[inline(never)]
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#[panic_handler]
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fn panic(info: &PanicInfo) -> ! {
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cortex_m::interrupt::disable();
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// rprintln!("{}", info);
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loop {
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compiler_fence(Ordering::SeqCst);
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}
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}
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60
examples-stm32f4/src/serial.rs
Normal file
60
examples-stm32f4/src/serial.rs
Normal file
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@ -0,0 +1,60 @@
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#![no_std]
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#![no_main]
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#![feature(trait_alias)]
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#![feature(type_alias_impl_trait)]
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// extern crate panic_halt;
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use cortex_m::singleton;
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use cortex_m_rt::entry;
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use embassy::executor::{task, Executor};
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use embassy::util::Forever;
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use embassy_stm32f4::serial;
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use stm32f4xx_hal::stm32;
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use stm32f4xx_hal::{prelude::*, serial::config};
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#[task]
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async fn run(dp: stm32::Peripherals, cp: cortex_m::Peripherals) {
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// https://gist.github.com/thalesfragoso/a07340c5df6eee3b04c42fdc69ecdcb1
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let gpioa = dp.GPIOA.split();
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let rcc = dp.RCC.constrain();
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let clocks = rcc
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.cfgr
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.use_hse(16.mhz())
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.sysclk(48.mhz())
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.pclk1(24.mhz())
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.freeze();
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let mut serial = serial::Uarte::new(
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gpioa.pa10.into_alternate_af7(),
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gpioa.pa9.into_alternate_af7(),
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dp.DMA2,
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dp.USART1,
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config::Parity::ParityNone,
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9600.bps(),
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clocks,
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);
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let buf = singleton!(: [u8; 30] = [0; 30]).unwrap();
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buf[5] = 0x01;
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serial.send(buf).await;
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}
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static EXECUTOR: Forever<Executor> = Forever::new();
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#[entry]
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fn main() -> ! {
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let dp = stm32::Peripherals::take().unwrap();
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let cp = cortex_m::peripheral::Peripherals::take().unwrap();
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let executor = EXECUTOR.put(Executor::new(cortex_m::asm::sev));
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executor.spawn(run(dp, cp));
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loop {
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executor.run();
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cortex_m::asm::wfe();
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}
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}
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