Merge #490
490: DCMI r=matoushybl a=matoushybl Co-authored-by: Matous Hybl <hyblmatous@gmail.com>
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5 changed files with 866 additions and 1 deletions
481
embassy-stm32/src/dcmi.rs
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481
embassy-stm32/src/dcmi.rs
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@ -0,0 +1,481 @@
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use core::marker::PhantomData;
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use core::task::Poll;
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use crate::gpio::sealed::Pin as __GpioPin;
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use crate::gpio::Pin as GpioPin;
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use embassy::interrupt::{Interrupt, InterruptExt};
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use embassy::util::Unborrow;
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use embassy::waitqueue::AtomicWaker;
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use embassy_hal_common::unborrow;
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use futures::future::poll_fn;
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/// The level on the VSync pin when the data is not valid on the parallel interface.
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#[derive(Clone, Copy, PartialEq)]
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pub enum VSyncDataInvalidLevel {
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Low,
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High,
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}
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/// The level on the VSync pin when the data is not valid on the parallel interface.
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#[derive(Clone, Copy, PartialEq)]
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pub enum HSyncDataInvalidLevel {
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Low,
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High,
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}
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#[derive(Clone, Copy, PartialEq)]
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pub enum PixelClockPolarity {
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RisingEdge,
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FallingEdge,
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}
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pub struct State {
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waker: AtomicWaker,
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}
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impl State {
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const fn new() -> State {
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State {
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waker: AtomicWaker::new(),
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}
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}
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}
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static STATE: State = State::new();
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#[derive(Debug, Eq, PartialEq, Copy, Clone)]
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#[cfg_attr(feature = "defmt", derive(defmt::Format))]
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#[non_exhaustive]
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pub enum Error {
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Overrun,
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PeripheralError,
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}
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pub struct Dcmi<'d, T: Instance, Dma: FrameDma> {
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inner: T,
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dma: Dma,
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phantom: PhantomData<&'d mut T>,
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}
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impl<'d, T, Dma> Dcmi<'d, T, Dma>
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where
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T: Instance,
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Dma: FrameDma,
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{
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pub fn new(
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peri: impl Unborrow<Target = T> + 'd,
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dma: impl Unborrow<Target = Dma> + 'd,
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vsync_level: VSyncDataInvalidLevel,
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hsync_level: HSyncDataInvalidLevel,
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pixclk_polarity: PixelClockPolarity,
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use_embedded_synchronization: bool,
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irq: impl Unborrow<Target = T::Interrupt> + 'd,
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d0: impl Unborrow<Target = impl D0Pin> + 'd,
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d1: impl Unborrow<Target = impl D1Pin> + 'd,
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d2: impl Unborrow<Target = impl D2Pin> + 'd,
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d3: impl Unborrow<Target = impl D3Pin> + 'd,
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d4: impl Unborrow<Target = impl D4Pin> + 'd,
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d5: impl Unborrow<Target = impl D5Pin> + 'd,
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d6: impl Unborrow<Target = impl D6Pin> + 'd,
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d7: impl Unborrow<Target = impl D7Pin> + 'd,
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d8: impl Unborrow<Target = impl D8Pin> + 'd,
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d9: impl Unborrow<Target = impl D9Pin> + 'd,
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d10: impl Unborrow<Target = impl D10Pin> + 'd,
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d11: impl Unborrow<Target = impl D11Pin> + 'd,
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d12: impl Unborrow<Target = impl D12Pin> + 'd,
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d13: impl Unborrow<Target = impl D13Pin> + 'd,
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v_sync: impl Unborrow<Target = impl VSyncPin> + 'd,
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h_sync: impl Unborrow<Target = impl HSyncPin> + 'd,
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pixclk: impl Unborrow<Target = impl PixClkPin> + 'd,
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) -> Self {
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T::reset();
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T::enable();
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unborrow!(
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peri, dma, irq, d0, d1, d2, d3, d4, d5, d6, d7, d8, d9, d10, d11, d12, d13, v_sync,
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h_sync, pixclk
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);
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d0.configure();
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d1.configure();
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d2.configure();
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d3.configure();
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d4.configure();
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d5.configure();
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d6.configure();
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d7.configure();
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d8.configure();
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d9.configure();
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d10.configure();
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d11.configure();
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d12.configure();
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d13.configure();
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v_sync.configure();
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h_sync.configure();
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pixclk.configure();
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let edm = match (
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d8.pin().is_some(),
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d9.pin().is_some(),
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d10.pin().is_some(),
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d11.pin().is_some(),
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d12.pin().is_some(),
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d13.pin().is_some(),
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) {
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(true, true, true, true, true, true) => 0b11, // 14 bits
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(true, true, true, true, false, false) => 0b10, // 12 bits
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(true, true, false, false, false, false) => 0b01, // 10 bits
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(false, false, false, false, false, false) => 0b00, // 8 bits
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_ => {
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panic!("Invalid pin configuration.");
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}
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};
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unsafe {
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peri.regs().cr().modify(|r| {
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r.set_cm(true); // disable continuous mode (snapshot mode)
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r.set_ess(use_embedded_synchronization);
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r.set_pckpol(pixclk_polarity == PixelClockPolarity::RisingEdge);
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r.set_vspol(vsync_level == VSyncDataInvalidLevel::High);
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r.set_hspol(hsync_level == HSyncDataInvalidLevel::High);
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r.set_fcrc(0x00); // capture every frame
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r.set_edm(edm); // extended data mode
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});
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}
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irq.set_handler(Self::on_interrupt);
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irq.unpend();
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irq.enable();
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Self {
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inner: peri,
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dma,
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phantom: PhantomData,
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}
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}
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unsafe fn on_interrupt(_: *mut ()) {
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let ris = crate::pac::DCMI.ris().read();
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if ris.err_ris() {
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error!("DCMI IRQ: Error.");
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crate::pac::DCMI.ier().modify(|ier| ier.set_err_ie(false));
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}
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if ris.ovr_ris() {
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error!("DCMI IRQ: Overrun.");
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crate::pac::DCMI.ier().modify(|ier| ier.set_ovr_ie(false));
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}
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if ris.frame_ris() {
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info!("DCMI IRQ: Frame captured.");
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crate::pac::DCMI.ier().modify(|ier| ier.set_frame_ie(false));
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}
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STATE.waker.wake();
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}
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unsafe fn toggle(enable: bool) {
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crate::pac::DCMI.cr().modify(|r| {
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r.set_enable(enable);
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r.set_capture(enable);
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})
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}
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fn enable_irqs() {
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unsafe {
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crate::pac::DCMI.ier().modify(|r| {
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r.set_err_ie(true);
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r.set_ovr_ie(true);
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r.set_frame_ie(true);
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});
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}
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}
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fn clear_interrupt_flags() {
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unsafe {
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crate::pac::DCMI.icr().write(|r| {
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r.set_ovr_isc(true);
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r.set_err_isc(true);
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r.set_frame_isc(true);
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})
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}
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}
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/// This method starts the capture and finishes when both the dma transfer and DCMI finish the frame transfer.
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/// The implication is that the input buffer size must be exactly the size of the captured frame.
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pub async fn capture(&mut self, buffer: &mut [u32]) -> Result<(), Error> {
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let channel = &mut self.dma;
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let request = channel.request();
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let r = self.inner.regs();
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let src = r.dr().ptr() as *mut u32;
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let dma_read = crate::dma::read(channel, request, src, buffer);
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Self::clear_interrupt_flags();
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Self::enable_irqs();
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unsafe { Self::toggle(true) };
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let result = poll_fn(|cx| {
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STATE.waker.register(cx.waker());
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let ris = unsafe { crate::pac::DCMI.ris().read() };
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if ris.err_ris() {
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unsafe {
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crate::pac::DCMI.icr().write(|r| {
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r.set_err_isc(true);
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})
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};
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Poll::Ready(Err(Error::PeripheralError))
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} else if ris.ovr_ris() {
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unsafe {
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crate::pac::DCMI.icr().write(|r| {
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r.set_ovr_isc(true);
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})
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};
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Poll::Ready(Err(Error::Overrun))
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} else if ris.frame_ris() {
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unsafe {
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crate::pac::DCMI.icr().write(|r| {
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r.set_frame_isc(true);
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})
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};
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Poll::Ready(Ok(()))
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} else {
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Poll::Pending
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}
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});
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let (_, result) = futures::future::join(dma_read, result).await;
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unsafe { Self::toggle(false) };
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result
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}
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}
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mod sealed {
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use super::*;
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use crate::rcc::RccPeripheral;
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pub trait Instance: RccPeripheral {
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fn regs(&self) -> crate::pac::dcmi::Dcmi;
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}
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pub trait FrameDma {
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fn request(&self) -> crate::dma::Request;
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}
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macro_rules! pin {
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($name:ident) => {
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pub trait $name: GpioPin {
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fn configure(&mut self);
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}
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};
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}
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macro_rules! optional_pin {
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($name:ident) => {
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pub trait $name: crate::gpio::OptionalPin {
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fn configure(&mut self);
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}
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};
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}
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pin!(D0Pin);
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pin!(D1Pin);
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pin!(D2Pin);
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pin!(D3Pin);
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pin!(D4Pin);
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pin!(D5Pin);
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pin!(D6Pin);
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pin!(D7Pin);
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optional_pin!(D8Pin);
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optional_pin!(D9Pin);
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optional_pin!(D10Pin);
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optional_pin!(D11Pin);
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optional_pin!(D12Pin);
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optional_pin!(D13Pin);
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optional_pin!(HSyncPin);
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optional_pin!(VSyncPin);
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pin!(PixClkPin);
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}
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pub trait Instance: sealed::Instance + 'static {
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type Interrupt: Interrupt;
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}
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pub trait FrameDma: sealed::FrameDma + crate::dma::Channel {}
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macro_rules! pin {
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($name:ident) => {
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pub trait $name: sealed::$name + 'static {}
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};
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}
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pin!(D0Pin);
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pin!(D1Pin);
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pin!(D2Pin);
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pin!(D3Pin);
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pin!(D4Pin);
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pin!(D5Pin);
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pin!(D6Pin);
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pin!(D7Pin);
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pin!(D8Pin);
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pin!(D9Pin);
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pin!(D10Pin);
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pin!(D11Pin);
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pin!(D12Pin);
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pin!(D13Pin);
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pin!(HSyncPin);
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pin!(VSyncPin);
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pin!(PixClkPin);
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// allow unused as U5 sources do not contain interrupt nor dma data
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#[allow(unused)]
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macro_rules! impl_peripheral {
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($inst:ident, $irq:ident) => {
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impl sealed::Instance for crate::peripherals::$inst {
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fn regs(&self) -> crate::pac::dcmi::Dcmi {
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crate::pac::$inst
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}
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}
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impl Instance for crate::peripherals::$inst {
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type Interrupt = crate::interrupt::$irq;
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}
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};
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}
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crate::pac::interrupts! {
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($inst:ident, dcmi, $block:ident, GLOBAL, $irq:ident) => {
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impl_peripheral!($inst, $irq);
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};
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}
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// allow unused as U5 sources do not contain interrupt nor dma data
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#[allow(unused)]
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macro_rules! impl_dma {
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($inst:ident, {dmamux: $dmamux:ident}, $signal:ident, $request:expr) => {
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impl<T> sealed::$signal for T
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where
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T: crate::dma::MuxChannel<Mux = crate::dma::$dmamux>,
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{
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fn request(&self) -> crate::dma::Request {
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$request
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}
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}
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impl<T> $signal for T where T: crate::dma::MuxChannel<Mux = crate::dma::$dmamux> {}
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};
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($inst:ident, {channel: $channel:ident}, $signal:ident, $request:expr) => {
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impl sealed::$signal for crate::peripherals::$channel {
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fn request(&self) -> crate::dma::Request {
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$request
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}
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}
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impl $signal for crate::peripherals::$channel {}
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};
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}
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crate::pac::peripheral_dma_channels! {
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($peri:ident, dcmi, $kind:ident, PSSI, $channel:tt, $request:expr) => {
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impl_dma!($peri, $channel, FrameDma, $request);
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};
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($peri:ident, dcmi, $kind:ident, DCMI, $channel:tt, $request:expr) => {
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impl_dma!($peri, $channel, FrameDma, $request);
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};
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}
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macro_rules! impl_pin {
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($pin:ident, $signal:ident, $af:expr) => {
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impl sealed::$signal for crate::peripherals::$pin {
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fn configure(&mut self) {
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// NOTE(unsafe) Exclusive access to the registers
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critical_section::with(|_| unsafe {
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self.set_as_af($af, crate::gpio::sealed::AFType::Input);
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self.block().ospeedr().modify(|w| {
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w.set_ospeedr(
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self.pin() as usize,
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crate::pac::gpio::vals::Ospeedr::VERYHIGHSPEED,
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)
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});
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})
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}
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}
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impl $signal for crate::peripherals::$pin {}
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};
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}
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macro_rules! impl_no_pin {
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($signal:ident) => {
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impl sealed::$signal for crate::gpio::NoPin {
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fn configure(&mut self) {}
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}
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impl $signal for crate::gpio::NoPin {}
|
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};
|
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}
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impl_no_pin!(D8Pin);
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impl_no_pin!(D9Pin);
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impl_no_pin!(D10Pin);
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impl_no_pin!(D11Pin);
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impl_no_pin!(D12Pin);
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impl_no_pin!(D13Pin);
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impl_no_pin!(HSyncPin);
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impl_no_pin!(VSyncPin);
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crate::pac::peripheral_pins!(
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($inst:ident, dcmi, DCMI, $pin:ident, D0, $af:expr) => {
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impl_pin!($pin, D0Pin, $af);
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};
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($inst:ident, dcmi, DCMI, $pin:ident, D1, $af:expr) => {
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impl_pin!($pin, D1Pin, $af);
|
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};
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($inst:ident, dcmi, DCMI, $pin:ident, D2, $af:expr) => {
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impl_pin!($pin, D2Pin, $af);
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};
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($inst:ident, dcmi, DCMI, $pin:ident, D3, $af:expr) => {
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impl_pin!($pin, D3Pin, $af);
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};
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($inst:ident, dcmi, DCMI, $pin:ident, D4, $af:expr) => {
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impl_pin!($pin, D4Pin, $af);
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};
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($inst:ident, dcmi, DCMI, $pin:ident, D5, $af:expr) => {
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impl_pin!($pin, D5Pin, $af);
|
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};
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($inst:ident, dcmi, DCMI, $pin:ident, D6, $af:expr) => {
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impl_pin!($pin, D6Pin, $af);
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};
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($inst:ident, dcmi, DCMI, $pin:ident, D7, $af:expr) => {
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impl_pin!($pin, D7Pin, $af);
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};
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($inst:ident, dcmi, DCMI, $pin:ident, D8, $af:expr) => {
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impl_pin!($pin, D8Pin, $af);
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};
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($inst:ident, dcmi, DCMI, $pin:ident, D9, $af:expr) => {
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impl_pin!($pin, D9Pin, $af);
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};
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($inst:ident, dcmi, DCMI, $pin:ident, D10, $af:expr) => {
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impl_pin!($pin, D10Pin, $af);
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};
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($inst:ident, dcmi, DCMI, $pin:ident, D11, $af:expr) => {
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impl_pin!($pin, D11Pin, $af);
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};
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($inst:ident, dcmi, DCMI, $pin:ident, D12, $af:expr) => {
|
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impl_pin!($pin, D12Pin, $af);
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};
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($inst:ident, dcmi, DCMI, $pin:ident, D13, $af:expr) => {
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impl_pin!($pin, D13Pin, $af);
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};
|
||||
($inst:ident, dcmi, DCMI, $pin:ident, HSYNC, $af:expr) => {
|
||||
impl_pin!($pin, HSyncPin, $af);
|
||||
};
|
||||
($inst:ident, dcmi, DCMI, $pin:ident, VSYNC, $af:expr) => {
|
||||
impl_pin!($pin, VSyncPin, $af);
|
||||
};
|
||||
($inst:ident, dcmi, DCMI, $pin:ident, PIXCLK, $af:expr) => {
|
||||
impl_pin!($pin, PixClkPin, $af);
|
||||
};
|
||||
);
|
||||
|
|
@ -32,6 +32,8 @@ pub mod can;
|
|||
pub mod dac;
|
||||
#[cfg(dbgmcu)]
|
||||
pub mod dbgmcu;
|
||||
#[cfg(dcmi)]
|
||||
pub mod dcmi;
|
||||
#[cfg(all(eth, feature = "net"))]
|
||||
pub mod eth;
|
||||
#[cfg(exti)]
|
||||
|
|
|
|||
|
|
@ -73,6 +73,7 @@ pub struct Config {
|
|||
pub pll2: PllConfig,
|
||||
pub pll3: PllConfig,
|
||||
pub enable_dma1: bool,
|
||||
pub enable_dma2: bool,
|
||||
}
|
||||
|
||||
pub struct Rcc<'d> {
|
||||
|
|
@ -334,6 +335,10 @@ impl<'d> Rcc<'d> {
|
|||
RCC.ahb1enr().modify(|w| w.set_dma1en(true));
|
||||
}
|
||||
|
||||
if self.config.enable_dma2 {
|
||||
RCC.ahb1enr().modify(|w| w.set_dma2en(true));
|
||||
}
|
||||
|
||||
CoreClocks {
|
||||
hclk: Hertz(rcc_hclk),
|
||||
pclk1: Hertz(rcc_pclk1),
|
||||
|
|
|
|||
|
|
@ -31,3 +31,41 @@ git = "https://github.com/smoltcp-rs/smoltcp"
|
|||
rev = "3644b94b82d9433313c75281fdc78942c2450bdf"
|
||||
default-features = false
|
||||
features = ["defmt"]
|
||||
|
||||
# cargo build/run
|
||||
[profile.dev]
|
||||
codegen-units = 1
|
||||
debug = 2
|
||||
debug-assertions = true # <-
|
||||
incremental = false
|
||||
opt-level = 3 # <-
|
||||
overflow-checks = true # <-
|
||||
|
||||
# cargo test
|
||||
[profile.test]
|
||||
codegen-units = 1
|
||||
debug = 2
|
||||
debug-assertions = true # <-
|
||||
incremental = false
|
||||
opt-level = 3 # <-
|
||||
overflow-checks = true # <-
|
||||
|
||||
# cargo build/run --release
|
||||
[profile.release]
|
||||
codegen-units = 1
|
||||
debug = 2
|
||||
debug-assertions = false # <-
|
||||
incremental = false
|
||||
lto = 'fat'
|
||||
opt-level = 3 # <-
|
||||
overflow-checks = false # <-
|
||||
|
||||
# cargo test --release
|
||||
[profile.bench]
|
||||
codegen-units = 1
|
||||
debug = 2
|
||||
debug-assertions = false # <-
|
||||
incremental = false
|
||||
lto = 'fat'
|
||||
opt-level = 3 # <-
|
||||
overflow-checks = false # <-
|
||||
339
examples/stm32h7/src/bin/camera.rs
Normal file
339
examples/stm32h7/src/bin/camera.rs
Normal file
|
|
@ -0,0 +1,339 @@
|
|||
#![no_std]
|
||||
#![no_main]
|
||||
#![feature(type_alias_impl_trait)]
|
||||
|
||||
use embassy::executor::Spawner;
|
||||
use embassy::time::{Duration, Timer};
|
||||
use embassy_stm32::dcmi::*;
|
||||
use embassy_stm32::gpio::{Level, NoPin, Output, Speed};
|
||||
use embassy_stm32::i2c::I2c;
|
||||
use embassy_stm32::interrupt;
|
||||
use embassy_stm32::rcc::{Mco, Mco1Source, McoClock};
|
||||
use embassy_stm32::time::U32Ext;
|
||||
use embassy_stm32::Peripherals;
|
||||
use embedded_hal::digital::v2::OutputPin;
|
||||
|
||||
use defmt_rtt as _; // global logger
|
||||
use panic_probe as _;
|
||||
|
||||
use core::sync::atomic::{AtomicUsize, Ordering};
|
||||
use embassy_stm32::Config;
|
||||
|
||||
defmt::timestamp! {"{=u64}", {
|
||||
static COUNT: AtomicUsize = AtomicUsize::new(0);
|
||||
// NOTE(no-CAS) `timestamps` runs with interrupts disabled
|
||||
let n = COUNT.load(Ordering::Relaxed);
|
||||
COUNT.store(n + 1, Ordering::Relaxed);
|
||||
n as u64
|
||||
}
|
||||
}
|
||||
|
||||
#[allow(unused)]
|
||||
pub fn config() -> Config {
|
||||
let mut config = Config::default();
|
||||
config.rcc.sys_ck = Some(400.mhz().into());
|
||||
config.rcc.hclk = Some(400.mhz().into());
|
||||
config.rcc.pll1.q_ck = Some(100.mhz().into());
|
||||
config.rcc.enable_dma1 = true;
|
||||
config.rcc.enable_dma2 = true;
|
||||
config.rcc.pclk1 = Some(100.mhz().into());
|
||||
config.rcc.pclk2 = Some(100.mhz().into());
|
||||
config.rcc.pclk3 = Some(100.mhz().into());
|
||||
config.rcc.pclk4 = Some(100.mhz().into());
|
||||
config
|
||||
}
|
||||
|
||||
use ov7725::*;
|
||||
|
||||
const WIDTH: usize = 100;
|
||||
const HEIGHT: usize = 100;
|
||||
|
||||
static mut FRAME: [u32; WIDTH * HEIGHT / 2] = [0u32; WIDTH * HEIGHT / 2];
|
||||
|
||||
#[embassy::main(config = "config()")]
|
||||
async fn main(_spawner: Spawner, p: Peripherals) {
|
||||
defmt::info!("Hello World!");
|
||||
let mco = Mco::new(p.MCO1, p.PA8, Mco1Source::Hsi, McoClock::Divided(3));
|
||||
|
||||
let mut led = Output::new(p.PE3, Level::High, Speed::Low);
|
||||
let i2c_irq = interrupt::take!(I2C1_EV);
|
||||
let cam_i2c = I2c::new(
|
||||
p.I2C1,
|
||||
p.PB8,
|
||||
p.PB9,
|
||||
i2c_irq,
|
||||
p.DMA1_CH1,
|
||||
p.DMA1_CH2,
|
||||
100u32.khz(),
|
||||
);
|
||||
|
||||
let mut camera = Ov7725::new(cam_i2c, mco);
|
||||
|
||||
defmt::unwrap!(camera.init().await);
|
||||
|
||||
let manufacturer_id = defmt::unwrap!(camera.read_manufacturer_id().await);
|
||||
let camera_id = defmt::unwrap!(camera.read_product_id().await);
|
||||
|
||||
defmt::info!(
|
||||
"manufacturer: 0x{:x}, pid: 0x{:x}",
|
||||
manufacturer_id,
|
||||
camera_id
|
||||
);
|
||||
|
||||
let dcmi_irq = interrupt::take!(DCMI);
|
||||
let mut dcmi = Dcmi::new(
|
||||
p.DCMI,
|
||||
p.DMA1_CH0,
|
||||
VSyncDataInvalidLevel::High,
|
||||
HSyncDataInvalidLevel::Low,
|
||||
PixelClockPolarity::RisingEdge,
|
||||
false,
|
||||
dcmi_irq,
|
||||
p.PC6,
|
||||
p.PC7,
|
||||
p.PE0,
|
||||
p.PE1,
|
||||
p.PE4,
|
||||
p.PD3,
|
||||
p.PE5,
|
||||
p.PE6,
|
||||
NoPin,
|
||||
NoPin,
|
||||
NoPin,
|
||||
NoPin,
|
||||
NoPin,
|
||||
NoPin,
|
||||
p.PB7,
|
||||
p.PA4,
|
||||
p.PA6,
|
||||
);
|
||||
|
||||
defmt::info!("attempting capture");
|
||||
defmt::unwrap!(dcmi.capture(unsafe { &mut FRAME }).await);
|
||||
|
||||
defmt::info!("captured frame: {:x}", unsafe { &FRAME });
|
||||
|
||||
defmt::info!("main loop running");
|
||||
loop {
|
||||
defmt::info!("high");
|
||||
defmt::unwrap!(led.set_high());
|
||||
Timer::after(Duration::from_millis(500)).await;
|
||||
|
||||
defmt::info!("low");
|
||||
defmt::unwrap!(led.set_low());
|
||||
Timer::after(Duration::from_millis(500)).await;
|
||||
}
|
||||
}
|
||||
|
||||
mod ov7725 {
|
||||
use core::marker::PhantomData;
|
||||
|
||||
use defmt::Format;
|
||||
use embassy::time::{Duration, Timer};
|
||||
use embassy_stm32::rcc::{Mco, McoInstance};
|
||||
use embassy_traits::i2c::I2c;
|
||||
|
||||
#[repr(u8)]
|
||||
pub enum RgbFormat {
|
||||
Gbr422 = 0,
|
||||
RGB565 = 1,
|
||||
RGB555 = 2,
|
||||
RGB444 = 3,
|
||||
}
|
||||
pub enum PixelFormat {
|
||||
Yuv,
|
||||
ProcessedRawBayer,
|
||||
Rgb(RgbFormat),
|
||||
RawBayer,
|
||||
}
|
||||
|
||||
impl From<PixelFormat> for u8 {
|
||||
fn from(raw: PixelFormat) -> Self {
|
||||
match raw {
|
||||
PixelFormat::Yuv => 0,
|
||||
PixelFormat::ProcessedRawBayer => 1,
|
||||
PixelFormat::Rgb(mode) => 2 | ((mode as u8) << 2),
|
||||
PixelFormat::RawBayer => 3,
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
#[derive(Clone, Copy)]
|
||||
#[repr(u8)]
|
||||
#[allow(unused)]
|
||||
pub enum Register {
|
||||
Gain = 0x00,
|
||||
Blue = 0x01,
|
||||
Red = 0x02,
|
||||
Green = 0x03,
|
||||
BAvg = 0x05,
|
||||
GAvg = 0x06,
|
||||
RAvg = 0x07,
|
||||
Aech = 0x08,
|
||||
Com2 = 0x09,
|
||||
PId = 0x0a,
|
||||
Ver = 0x0b,
|
||||
Com3 = 0x0c,
|
||||
Com4 = 0x0d,
|
||||
Com5 = 0x0e,
|
||||
Com6 = 0x0f,
|
||||
Aec = 0x10,
|
||||
ClkRc = 0x11,
|
||||
Com7 = 0x12,
|
||||
Com8 = 0x13,
|
||||
Com9 = 0x14,
|
||||
Com10 = 0x15,
|
||||
Reg16 = 0x16,
|
||||
HStart = 0x17,
|
||||
HSize = 0x18,
|
||||
VStart = 0x19,
|
||||
VSize = 0x1a,
|
||||
PShift = 0x1b,
|
||||
MidH = 0x1c,
|
||||
MidL = 0x1d,
|
||||
Laec = 0x1f,
|
||||
Com11 = 0x20,
|
||||
BdBase = 0x22,
|
||||
BdMStep = 0x23,
|
||||
Aew = 0x24,
|
||||
Aeb = 0x25,
|
||||
Vpt = 0x26,
|
||||
Reg28 = 0x28,
|
||||
HOutSize = 0x29,
|
||||
EXHCH = 0x2a,
|
||||
EXHCL = 0x2b,
|
||||
VOutSize = 0x2c,
|
||||
Advfl = 0x2d,
|
||||
Advfh = 0x2e,
|
||||
Yave = 0x2f,
|
||||
LumHTh = 0x30,
|
||||
LumLTh = 0x31,
|
||||
HRef = 0x32,
|
||||
DspCtrl4 = 0x67,
|
||||
DspAuto = 0xac,
|
||||
}
|
||||
|
||||
const CAM_ADDR: u8 = 0x21;
|
||||
|
||||
#[derive(Format)]
|
||||
pub enum Error<I2cError: Format> {
|
||||
I2c(I2cError),
|
||||
}
|
||||
|
||||
pub struct Ov7725<'d, Bus: I2c> {
|
||||
phantom: PhantomData<&'d ()>,
|
||||
bus: Bus,
|
||||
}
|
||||
|
||||
impl<'d, Bus> Ov7725<'d, Bus>
|
||||
where
|
||||
Bus: I2c,
|
||||
Bus::Error: Format,
|
||||
{
|
||||
pub fn new<T>(bus: Bus, _mco: Mco<T>) -> Self
|
||||
where
|
||||
T: McoInstance,
|
||||
{
|
||||
Self {
|
||||
phantom: PhantomData,
|
||||
bus,
|
||||
}
|
||||
}
|
||||
|
||||
pub async fn init(&mut self) -> Result<(), Error<Bus::Error>> {
|
||||
Timer::after(Duration::from_millis(500)).await;
|
||||
self.reset_regs().await?;
|
||||
Timer::after(Duration::from_millis(500)).await;
|
||||
self.set_pixformat().await?;
|
||||
self.set_resolution().await?;
|
||||
Ok(())
|
||||
}
|
||||
|
||||
pub async fn read_manufacturer_id(&mut self) -> Result<u16, Error<Bus::Error>> {
|
||||
Ok(u16::from_le_bytes([
|
||||
self.read(Register::MidL).await?,
|
||||
self.read(Register::MidH).await?,
|
||||
]))
|
||||
}
|
||||
|
||||
pub async fn read_product_id(&mut self) -> Result<u16, Error<Bus::Error>> {
|
||||
Ok(u16::from_le_bytes([
|
||||
self.read(Register::Ver).await?,
|
||||
self.read(Register::PId).await?,
|
||||
]))
|
||||
}
|
||||
|
||||
async fn reset_regs(&mut self) -> Result<(), Error<Bus::Error>> {
|
||||
self.write(Register::Com7, 0x80).await
|
||||
}
|
||||
|
||||
async fn set_pixformat(&mut self) -> Result<(), Error<Bus::Error>> {
|
||||
self.write(Register::DspCtrl4, 0).await?;
|
||||
let mut com7 = self.read(Register::Com7).await?;
|
||||
com7 |= u8::from(PixelFormat::Rgb(RgbFormat::RGB565));
|
||||
self.write(Register::Com7, com7).await?;
|
||||
Ok(())
|
||||
}
|
||||
|
||||
async fn set_resolution(&mut self) -> Result<(), Error<Bus::Error>> {
|
||||
let horizontal: u16 = super::WIDTH as u16;
|
||||
let vertical: u16 = super::HEIGHT as u16;
|
||||
|
||||
let h_high = (horizontal >> 2) as u8;
|
||||
let v_high = (vertical >> 1) as u8;
|
||||
let h_low = (horizontal & 0x03) as u8;
|
||||
let v_low = (vertical & 0x01) as u8;
|
||||
|
||||
self.write(Register::HOutSize, h_high).await?;
|
||||
self.write(Register::VOutSize, v_high).await?;
|
||||
self.write(Register::EXHCH, h_low | (v_low << 2)).await?;
|
||||
|
||||
self.write(Register::Com3, 0xd1).await?;
|
||||
|
||||
let com3 = self.read(Register::Com3).await?;
|
||||
let vflip = com3 & 0x80 > 0;
|
||||
|
||||
self.modify(Register::HRef, |reg| {
|
||||
reg & 0xbf | if vflip { 0x40 } else { 0x40 }
|
||||
})
|
||||
.await?;
|
||||
|
||||
if horizontal <= 320 || vertical <= 240 {
|
||||
self.write(Register::HStart, 0x3f).await?;
|
||||
self.write(Register::HSize, 0x50).await?;
|
||||
self.write(Register::VStart, 0x02).await?; // TODO vflip is subtracted in the original code
|
||||
self.write(Register::VSize, 0x78).await?;
|
||||
} else {
|
||||
defmt::panic!("VGA resolutions not yet supported.");
|
||||
}
|
||||
|
||||
Ok(())
|
||||
}
|
||||
|
||||
async fn read(&mut self, register: Register) -> Result<u8, Error<Bus::Error>> {
|
||||
let mut buffer = [0u8; 1];
|
||||
self.bus
|
||||
.write_read(CAM_ADDR, &[register as u8], &mut buffer[..1])
|
||||
.await
|
||||
.map_err(Error::I2c)?;
|
||||
Ok(buffer[0])
|
||||
}
|
||||
|
||||
async fn write(&mut self, register: Register, value: u8) -> Result<(), Error<Bus::Error>> {
|
||||
self.bus
|
||||
.write(CAM_ADDR, &[register as u8, value])
|
||||
.await
|
||||
.map_err(Error::I2c)
|
||||
}
|
||||
|
||||
async fn modify<F: FnOnce(u8) -> u8>(
|
||||
&mut self,
|
||||
register: Register,
|
||||
f: F,
|
||||
) -> Result<(), Error<Bus::Error>> {
|
||||
let value = self.read(register).await?;
|
||||
let value = f(value);
|
||||
self.write(register, value).await
|
||||
}
|
||||
}
|
||||
}
|
||||
Loading…
Reference in a new issue