Fix BDMA
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parent
bf4a38ac06
commit
48fc48ea7d
2 changed files with 23 additions and 4 deletions
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@ -11,7 +11,7 @@ use crate::dma::Request;
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use crate::pac;
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use crate::pac::bdma::vals;
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use super::{Word, WordSize};
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use super::{TransferOptions, Word, WordSize};
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impl From<WordSize> for vals::Size {
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fn from(raw: WordSize) -> Self {
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@ -55,7 +55,7 @@ foreach_dma_channel! {
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($channel_peri:ident, $dma_peri:ident, bdma, $channel_num:expr, $index:expr, $dmamux:tt) => {
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impl crate::dma::sealed::Channel for crate::peripherals::$channel_peri {
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unsafe fn start_write<W: Word>(&mut self, _request: Request, buf: *const[W], reg_addr: *mut W) {
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unsafe fn start_write<W: Word>(&mut self, _request: Request, buf: *const[W], reg_addr: *mut W, options: TransferOptions) {
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let (ptr, len) = super::slice_ptr_parts(buf);
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low_level_api::start_transfer(
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pac::$dma_peri,
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@ -68,6 +68,7 @@ foreach_dma_channel! {
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len,
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true,
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vals::Size::from(W::bits()),
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options,
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#[cfg(dmamux)]
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<Self as super::dmamux::sealed::MuxChannel>::DMAMUX_REGS,
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#[cfg(dmamux)]
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@ -76,7 +77,7 @@ foreach_dma_channel! {
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}
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unsafe fn start_write_repeated<W: Word>(&mut self, _request: Request, repeated: W, count: usize, reg_addr: *mut W) {
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unsafe fn start_write_repeated<W: Word>(&mut self, _request: Request, repeated: W, count: usize, reg_addr: *mut W, options: TransferOptions) {
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let buf = [repeated];
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low_level_api::start_transfer(
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pac::$dma_peri,
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@ -89,6 +90,7 @@ foreach_dma_channel! {
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count,
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false,
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vals::Size::from(W::bits()),
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options,
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#[cfg(dmamux)]
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<Self as super::dmamux::sealed::MuxChannel>::DMAMUX_REGS,
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#[cfg(dmamux)]
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@ -96,7 +98,7 @@ foreach_dma_channel! {
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)
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}
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unsafe fn start_read<W: Word>(&mut self, _request: Request, reg_addr: *const W, buf: *mut [W]) {
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unsafe fn start_read<W: Word>(&mut self, _request: Request, reg_addr: *const W, buf: *mut [W], options: TransferOptions) {
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let (ptr, len) = super::slice_ptr_parts_mut(buf);
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low_level_api::start_transfer(
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pac::$dma_peri,
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@ -109,6 +111,7 @@ foreach_dma_channel! {
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len,
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true,
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vals::Size::from(W::bits()),
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options,
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#[cfg(dmamux)]
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<Self as super::dmamux::sealed::MuxChannel>::DMAMUX_REGS,
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#[cfg(dmamux)]
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@ -155,9 +158,23 @@ mod low_level_api {
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mem_len: usize,
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incr_mem: bool,
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data_size: vals::Size,
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options: TransferOptions,
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#[cfg(dmamux)] dmamux_regs: pac::dmamux::Dmamux,
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#[cfg(dmamux)] dmamux_ch_num: u8,
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) {
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assert!(
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options.mburst == crate::dma::Burst::Single,
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"Burst mode not supported"
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);
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assert!(
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options.pburst == crate::dma::Burst::Single,
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"Burst mode not supported"
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);
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assert!(
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options.flow_ctrl == crate::dma::FlowControl::Dma,
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"Peripheral flow control not supported"
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);
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let ch = dma.ch(channel_number as _);
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reset_status(dma, channel_number);
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@ -129,6 +129,7 @@ impl Word for u32 {
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}
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}
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#[derive(Debug, PartialEq)]
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pub enum Burst {
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/// Single transfer
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Single,
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@ -140,6 +141,7 @@ pub enum Burst {
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Incr16,
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}
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#[derive(Debug, PartialEq)]
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pub enum FlowControl {
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/// Flow control by DMA
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Dma,
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