stm32: add tim4, tim5 support for time-driver (stm32f410 doesn't have tim2, tim3)

embassy-stm32/Cargo.toml

@@ -47,6 +47,8 @@ _time-driver = ["embassy/time-tick-32768hz"]
 time-driver-any = ["_time-driver"]
 time-driver-tim2 = ["_time-driver"]
 time-driver-tim3 = ["_time-driver"]
+time-driver-tim4 = ["_time-driver"]
+time-driver-tim5 = ["_time-driver"]
 
 # Reexport stm32-metapac at `embassy_stm32::pac`.
 # This is unstable because semver-minor (non-breaking) releases of embassy-stm32 may major-bump (breaking) the stm32-metapac version.

embassy-stm32/build.rs

@@ -146,13 +146,19 @@ fn main() {
         None => {}
         Some("tim2") => println!("cargo:rustc-cfg=time_driver_tim2"),
         Some("tim3") => println!("cargo:rustc-cfg=time_driver_tim3"),
+        Some("tim4") => println!("cargo:rustc-cfg=time_driver_tim4"),
+        Some("tim5") => println!("cargo:rustc-cfg=time_driver_tim5"),
         Some("any") => {
             if singletons.contains(&"TIM2".to_string()) {
                 println!("cargo:rustc-cfg=time_driver_tim2");
             } else if singletons.contains(&"TIM3".to_string()) {
                 println!("cargo:rustc-cfg=time_driver_tim3");
+            } else if singletons.contains(&"TIM4".to_string()) {
+                println!("cargo:rustc-cfg=time_driver_tim4");
+            } else if singletons.contains(&"TIM5".to_string()) {
+                println!("cargo:rustc-cfg=time_driver_tim5");
             } else {
-                panic!("time-driver-any requested, but the chip doesn't have TIM2 or TIM3.")
+                panic!("time-driver-any requested, but the chip doesn't have TIM2, TIM3, TIM4 or TIM5.")
             }
         }
         _ => panic!("unknown time_driver {:?}", time_driver),

embassy-stm32/src/time_driver.rs

@@ -22,6 +22,10 @@ const ALARM_COUNT: usize = 3;
 type T = peripherals::TIM2;
 #[cfg(time_driver_tim3)]
 type T = peripherals::TIM3;
+#[cfg(time_driver_tim4)]
+type T = peripherals::TIM4;
+#[cfg(time_driver_tim5)]
+type T = peripherals::TIM5;
 
 #[cfg(time_driver_tim2)]
 #[interrupt]
@@ -33,6 +37,16 @@ fn TIM2() {
 fn TIM3() {
     DRIVER.on_interrupt()
 }
+#[cfg(time_driver_tim4)]
+#[interrupt]
+fn TIM4() {
+    DRIVER.on_interrupt()
+}
+#[cfg(time_driver_tim5)]
+#[interrupt]
+fn TIM5() {
+    DRIVER.on_interrupt()
+}
 
 // Clock timekeeping works with something we call "periods", which are time intervals
 // of 2^15 ticks. The Clock counter value is 16 bits, so one "overflow cycle" is 2 periods.