nrf/twis: switch to new interrupt binding.
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parent
36319fc121
commit
5913553cb1
2 changed files with 38 additions and 29 deletions
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@ -3,6 +3,7 @@
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#![macro_use]
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use core::future::{poll_fn, Future};
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use core::marker::PhantomData;
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use core::sync::atomic::compiler_fence;
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use core::sync::atomic::Ordering::SeqCst;
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use core::task::Poll;
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@ -14,7 +15,7 @@ use embassy_time::{Duration, Instant};
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use crate::chip::{EASY_DMA_SIZE, FORCE_COPY_BUFFER_SIZE};
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use crate::gpio::Pin as GpioPin;
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use crate::interrupt::{Interrupt, InterruptExt};
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use crate::interrupt::{self, Interrupt, InterruptExt};
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use crate::util::slice_in_ram_or;
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use crate::{gpio, pac, Peripheral};
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@ -108,6 +109,31 @@ pub enum Command {
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Write(usize),
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}
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/// Interrupt handler.
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pub struct InterruptHandler<T: Instance> {
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_phantom: PhantomData<T>,
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}
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impl<T: Instance> interrupt::Handler<T::Interrupt> for InterruptHandler<T> {
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unsafe fn on_interrupt() {
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let r = T::regs();
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let s = T::state();
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if r.events_read.read().bits() != 0 || r.events_write.read().bits() != 0 {
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s.waker.wake();
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r.intenclr.modify(|_r, w| w.read().clear().write().clear());
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}
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if r.events_stopped.read().bits() != 0 {
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s.waker.wake();
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r.intenclr.modify(|_r, w| w.stopped().clear());
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}
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if r.events_error.read().bits() != 0 {
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s.waker.wake();
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r.intenclr.modify(|_r, w| w.error().clear());
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}
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}
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}
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/// TWIS driver.
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pub struct Twis<'d, T: Instance> {
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_p: PeripheralRef<'d, T>,
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@ -117,12 +143,12 @@ impl<'d, T: Instance> Twis<'d, T> {
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/// Create a new TWIS driver.
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pub fn new(
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twis: impl Peripheral<P = T> + 'd,
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irq: impl Peripheral<P = T::Interrupt> + 'd,
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_irq: impl interrupt::Binding<T::Interrupt, InterruptHandler<T>> + 'd,
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sda: impl Peripheral<P = impl GpioPin> + 'd,
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scl: impl Peripheral<P = impl GpioPin> + 'd,
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config: Config,
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) -> Self {
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into_ref!(twis, irq, sda, scl);
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into_ref!(twis, sda, scl);
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let r = T::regs();
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@ -178,31 +204,12 @@ impl<'d, T: Instance> Twis<'d, T> {
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// Generate suspend on read event
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r.shorts.write(|w| w.read_suspend().enabled());
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irq.set_handler(Self::on_interrupt);
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irq.unpend();
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irq.enable();
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unsafe { T::Interrupt::steal() }.unpend();
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unsafe { T::Interrupt::steal() }.enable();
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Self { _p: twis }
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}
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fn on_interrupt(_: *mut ()) {
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let r = T::regs();
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let s = T::state();
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if r.events_read.read().bits() != 0 || r.events_write.read().bits() != 0 {
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s.waker.wake();
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r.intenclr.modify(|_r, w| w.read().clear().write().clear());
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}
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if r.events_stopped.read().bits() != 0 {
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s.waker.wake();
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r.intenclr.modify(|_r, w| w.stopped().clear());
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}
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if r.events_error.read().bits() != 0 {
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s.waker.wake();
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r.intenclr.modify(|_r, w| w.error().clear());
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}
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}
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/// Set TX buffer, checking that it is in RAM and has suitable length.
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unsafe fn set_tx_buffer(&mut self, buffer: &[u8]) -> Result<(), Error> {
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slice_in_ram_or(buffer, Error::BufferNotInRAM)?;
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@ -6,19 +6,21 @@
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use defmt::*;
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use embassy_executor::Spawner;
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use embassy_nrf::interrupt;
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use embassy_nrf::twis::{self, Command, Twis};
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use embassy_nrf::{bind_interrupts, peripherals};
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use {defmt_rtt as _, panic_probe as _};
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bind_interrupts!(struct Irqs {
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SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0 => twis::InterruptHandler<peripherals::TWISPI0>;
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});
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#[embassy_executor::main]
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async fn main(_spawner: Spawner) {
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let p = embassy_nrf::init(Default::default());
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let irq = interrupt::take!(SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0);
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let mut config = twis::Config::default();
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// Set i2c address
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config.address0 = 0x55;
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let mut i2c = Twis::new(p.TWISPI0, irq, p.P0_03, p.P0_04, config);
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config.address0 = 0x55; // Set i2c address
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let mut i2c = Twis::new(p.TWISPI0, Irqs, p.P0_03, p.P0_04, config);
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info!("Listening...");
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loop {
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