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Add a single-column variant to gpio_rcc! macro table

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which includes just the set of registers that need to be
considered.

Then match against those registers with a single `modify(...)`
This commit is contained in:
Bob McWhirter 2021-07-23 11:16:17 -04:00
parent 13873df30b
commit 650f867b1c
2 changed files with 12 additions and 2 deletions
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6
embassy-stm32/src/gpio.rs
View file

@ -452,9 +452,13 @@ crate::pac::pins!(
pub(crate) unsafe fn init() {
crate::pac::gpio_rcc! {
($name:ident, $clock:ident, $en_reg:ident, $rst_reg:ident, $en_fn:ident, $rst_fn:ident) => {
($en_reg:ident) => {
crate::pac::RCC.$en_reg().modify(|reg| {
crate::pac::gpio_rcc! {
($name:ident, $clock:ident, $en_reg, $rst_reg:ident, $en_fn:ident, $rst_fn:ident) => {
reg.$en_fn(true);
};
}
});
};
}

6
stm32-metapac-gen/src/lib.rs
View file

@ -288,6 +288,7 @@ pub fn gen(options: Options) {
let mut dma_channel_counts: HashMap<String, u8> = HashMap::new();
let mut dbgmcu_table: Vec<Vec<String>> = Vec::new();
let mut gpio_rcc_table: Vec<Vec<String>> = Vec::new();
let mut gpio_regs: HashSet<String> = HashSet::new();
let gpio_base = core.peripherals.get(&"GPIOA".to_string()).unwrap().address;
let gpio_stride = 0x400;
@ -492,6 +493,7 @@ pub fn gen(options: Options) {
peripheral_rcc_table.push(row);
} else {
gpio_rcc_table.push(row);
gpio_regs.insert( enable_reg.to_ascii_lowercase() );
}
}
(None, Some(_)) => {
@ -508,6 +510,10 @@ pub fn gen(options: Options) {
dev.peripherals.push(ir_peri);
}
for reg in gpio_regs {
gpio_rcc_table.push( vec!( reg ) );
}
for (id, channel_info) in &core.dma_channels {
let mut row = Vec::new();
let dma_peri = core.peripherals.get(&channel_info.dma).unwrap();