Merge pull request #1870 from plaes/nrf-setconfig-trait-internally

nrf: Use SetConfig trait internally where possible
This commit is contained in:
Dario Nieuwenhuis 2023-09-10 21:19:15 +00:00 committed by GitHub
commit 77c357e744
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4 changed files with 13 additions and 82 deletions

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@ -189,42 +189,10 @@ impl<'d, T: Instance> Spim<'d, T> {
// Enable SPIM instance. // Enable SPIM instance.
r.enable.write(|w| w.enable().enabled()); r.enable.write(|w| w.enable().enabled());
// Configure mode. let mut spim = Self { _p: spim };
let mode = config.mode;
r.config.write(|w| {
match mode {
MODE_0 => {
w.order().msb_first();
w.cpol().active_high();
w.cpha().leading();
}
MODE_1 => {
w.order().msb_first();
w.cpol().active_high();
w.cpha().trailing();
}
MODE_2 => {
w.order().msb_first();
w.cpol().active_low();
w.cpha().leading();
}
MODE_3 => {
w.order().msb_first();
w.cpol().active_low();
w.cpha().trailing();
}
}
w // Apply runtime peripheral configuration
}); Self::set_config(&mut spim, &config);
// Configure frequency.
let frequency = config.frequency;
r.frequency.write(|w| w.frequency().variant(frequency));
// Set over-read character
let orc = config.orc;
r.orc.write(|w| unsafe { w.orc().bits(orc) });
// Disable all events interrupts // Disable all events interrupts
r.intenclr.write(|w| unsafe { w.bits(0xFFFF_FFFF) }); r.intenclr.write(|w| unsafe { w.bits(0xFFFF_FFFF) });
@ -232,7 +200,7 @@ impl<'d, T: Instance> Spim<'d, T> {
T::Interrupt::unpend(); T::Interrupt::unpend();
unsafe { T::Interrupt::enable() }; unsafe { T::Interrupt::enable() };
Self { _p: spim } spim
} }
fn prepare(&mut self, rx: *mut [u8], tx: *const [u8]) -> Result<(), Error> { fn prepare(&mut self, rx: *mut [u8], tx: *const [u8]) -> Result<(), Error> {

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@ -169,47 +169,10 @@ impl<'d, T: Instance> Spis<'d, T> {
// Enable SPIS instance. // Enable SPIS instance.
r.enable.write(|w| w.enable().enabled()); r.enable.write(|w| w.enable().enabled());
// Configure mode. let mut spis = Self { _p: spis };
let mode = config.mode;
r.config.write(|w| {
match mode {
MODE_0 => {
w.order().msb_first();
w.cpol().active_high();
w.cpha().leading();
}
MODE_1 => {
w.order().msb_first();
w.cpol().active_high();
w.cpha().trailing();
}
MODE_2 => {
w.order().msb_first();
w.cpol().active_low();
w.cpha().leading();
}
MODE_3 => {
w.order().msb_first();
w.cpol().active_low();
w.cpha().trailing();
}
}
w // Apply runtime peripheral configuration
}); Self::set_config(&mut spis, &config);
// Set over-read character.
let orc = config.orc;
r.orc.write(|w| unsafe { w.orc().bits(orc) });
// Set default character.
let def = config.def;
r.def.write(|w| unsafe { w.def().bits(def) });
// Configure auto-acquire on 'transfer end' event.
if config.auto_acquire {
r.shorts.write(|w| w.end_acquire().bit(true));
}
// Disable all events interrupts. // Disable all events interrupts.
r.intenclr.write(|w| unsafe { w.bits(0xFFFF_FFFF) }); r.intenclr.write(|w| unsafe { w.bits(0xFFFF_FFFF) });
@ -217,7 +180,7 @@ impl<'d, T: Instance> Spis<'d, T> {
T::Interrupt::unpend(); T::Interrupt::unpend();
unsafe { T::Interrupt::enable() }; unsafe { T::Interrupt::enable() };
Self { _p: spis } spis
} }
fn prepare(&mut self, rx: *mut [u8], tx: *const [u8]) -> Result<(), Error> { fn prepare(&mut self, rx: *mut [u8], tx: *const [u8]) -> Result<(), Error> {

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@ -57,7 +57,6 @@ impl<'d> Temp<'d> {
/// ```no_run /// ```no_run
/// use embassy_nrf::{bind_interrupts, temp}; /// use embassy_nrf::{bind_interrupts, temp};
/// use embassy_nrf::temp::Temp; /// use embassy_nrf::temp::Temp;
/// use embassy_time::{Duration, Timer};
/// ///
/// bind_interrupts!(struct Irqs { /// bind_interrupts!(struct Irqs {
/// TEMP => temp::InterruptHandler; /// TEMP => temp::InterruptHandler;

View file

@ -167,9 +167,10 @@ impl<'d, T: Instance> Twim<'d, T> {
// Enable TWIM instance. // Enable TWIM instance.
r.enable.write(|w| w.enable().enabled()); r.enable.write(|w| w.enable().enabled());
// Configure frequency. let mut twim = Self { _p: twim };
r.frequency
.write(|w| unsafe { w.frequency().bits(config.frequency as u32) }); // Apply runtime peripheral configuration
Self::set_config(&mut twim, &config);
// Disable all events interrupts // Disable all events interrupts
r.intenclr.write(|w| unsafe { w.bits(0xFFFF_FFFF) }); r.intenclr.write(|w| unsafe { w.bits(0xFFFF_FFFF) });
@ -177,7 +178,7 @@ impl<'d, T: Instance> Twim<'d, T> {
T::Interrupt::unpend(); T::Interrupt::unpend();
unsafe { T::Interrupt::enable() }; unsafe { T::Interrupt::enable() };
Self { _p: twim } twim
} }
/// Set TX buffer, checking that it is in RAM and has suitable length. /// Set TX buffer, checking that it is in RAM and has suitable length.