embassy-stm32: remove duplicated code for USART general configuration

This commit is contained in:
Guillaume MICHEL 2022-10-28 09:32:05 +02:00
parent f053bf742c
commit 79b49c6fae
2 changed files with 38 additions and 89 deletions

View file

@ -103,28 +103,15 @@ impl<'d, T: BasicInstance> BufferedUart<'d, T> {
let r = T::regs(); let r = T::regs();
configure(r, &config, T::frequency(), T::MULTIPLIER);
unsafe { unsafe {
rx.set_as_af(rx.af_num(), AFType::Input); rx.set_as_af(rx.af_num(), AFType::Input);
tx.set_as_af(tx.af_num(), AFType::OutputPushPull); tx.set_as_af(tx.af_num(), AFType::OutputPushPull);
}
r.cr2().write(|_w| {}); configure(r, &config, T::frequency(), T::MULTIPLIER, true, true);
r.cr1().write(|w| {
w.set_ue(true); unsafe {
w.set_te(true); r.cr1().modify(|w| {
w.set_re(true);
w.set_m0(if config.parity != Parity::ParityNone {
vals::M0::BIT9
} else {
vals::M0::BIT8
});
w.set_pce(config.parity != Parity::ParityNone);
w.set_ps(match config.parity {
Parity::ParityOdd => vals::Ps::ODD,
Parity::ParityEven => vals::Ps::EVEN,
_ => vals::Ps::EVEN,
});
w.set_rxneie(true); w.set_rxneie(true);
w.set_idleie(true); w.set_idleie(true);
}); });

View file

@ -146,33 +146,12 @@ impl<'d, T: BasicInstance, TxDma> UartTx<'d, T, TxDma> {
let r = T::regs(); let r = T::regs();
configure(r, &config, T::frequency(), T::MULTIPLIER);
unsafe { unsafe {
tx.set_as_af(tx.af_num(), AFType::OutputPushPull); tx.set_as_af(tx.af_num(), AFType::OutputPushPull);
r.cr2().write(|_w| {});
r.cr1().write(|w| {
// enable uart
w.set_ue(true);
// enable transceiver
w.set_te(true);
// configure word size
w.set_m0(if config.parity != Parity::ParityNone {
vals::M0::BIT9
} else {
vals::M0::BIT8
});
// configure parity
w.set_pce(config.parity != Parity::ParityNone);
w.set_ps(match config.parity {
Parity::ParityOdd => vals::Ps::ODD,
Parity::ParityEven => vals::Ps::EVEN,
_ => vals::Ps::EVEN,
});
});
} }
configure(r, &config, T::frequency(), T::MULTIPLIER, false, true);
// create state once! // create state once!
let _s = T::state(); let _s = T::state();
@ -269,37 +248,12 @@ impl<'d, T: BasicInstance, RxDma> UartRx<'d, T, RxDma> {
let r = T::regs(); let r = T::regs();
configure(r, &config, T::frequency(), T::MULTIPLIER);
unsafe { unsafe {
rx.set_as_af(rx.af_num(), AFType::Input); rx.set_as_af(rx.af_num(), AFType::Input);
r.cr2().write(|_w| {});
r.cr3().modify(|w| {
// enable Error Interrupt: (Frame error, Noise error, Overrun error)
w.set_eie(true);
});
r.cr1().write(|w| {
// enable uart
w.set_ue(true);
// enable receiver
w.set_re(true);
// configure word size
w.set_m0(if config.parity != Parity::ParityNone {
vals::M0::BIT9
} else {
vals::M0::BIT8
});
// configure parity
w.set_pce(config.parity != Parity::ParityNone);
w.set_ps(match config.parity {
Parity::ParityOdd => vals::Ps::ODD,
Parity::ParityEven => vals::Ps::EVEN,
_ => vals::Ps::EVEN,
});
});
} }
configure(r, &config, T::frequency(), T::MULTIPLIER, true, false);
irq.set_handler(Self::on_interrupt); irq.set_handler(Self::on_interrupt);
irq.unpend(); irq.unpend();
irq.enable(); irq.enable();
@ -669,31 +623,13 @@ impl<'d, T: BasicInstance, TxDma, RxDma> Uart<'d, T, TxDma, RxDma> {
let r = T::regs(); let r = T::regs();
configure(r, &config, T::frequency(), T::MULTIPLIER);
unsafe { unsafe {
rx.set_as_af(rx.af_num(), AFType::Input); rx.set_as_af(rx.af_num(), AFType::Input);
tx.set_as_af(tx.af_num(), AFType::OutputPushPull); tx.set_as_af(tx.af_num(), AFType::OutputPushPull);
r.cr2().write(|_w| {});
r.cr1().write(|w| {
w.set_ue(true);
w.set_te(true);
w.set_re(true);
w.set_m0(if config.parity != Parity::ParityNone {
vals::M0::BIT9
} else {
vals::M0::BIT8
});
w.set_pce(config.parity != Parity::ParityNone);
w.set_ps(match config.parity {
Parity::ParityOdd => vals::Ps::ODD,
Parity::ParityEven => vals::Ps::EVEN,
_ => vals::Ps::EVEN,
});
});
} }
configure(r, &config, T::frequency(), T::MULTIPLIER, true, true);
irq.set_handler(UartRx::<T, RxDma>::on_interrupt); irq.set_handler(UartRx::<T, RxDma>::on_interrupt);
irq.unpend(); irq.unpend();
irq.enable(); irq.enable();
@ -759,12 +695,38 @@ impl<'d, T: BasicInstance, TxDma, RxDma> Uart<'d, T, TxDma, RxDma> {
} }
} }
fn configure(r: Regs, config: &Config, pclk_freq: Hertz, multiplier: u32) { fn configure(r: Regs, config: &Config, pclk_freq: Hertz, multiplier: u32, enable_rx: bool, enable_tx: bool) {
if !enable_rx && !enable_tx {
panic!("USART: At least one of RX or TX should be enabled");
}
// TODO: better calculation, including error checking and OVER8 if possible. // TODO: better calculation, including error checking and OVER8 if possible.
let div = (pclk_freq.0 + (config.baudrate / 2)) / config.baudrate * multiplier; let div = (pclk_freq.0 + (config.baudrate / 2)) / config.baudrate * multiplier;
unsafe { unsafe {
r.brr().write_value(regs::Brr(div)); r.brr().write_value(regs::Brr(div));
r.cr2().write(|_w| {});
r.cr1().write(|w| {
// enable uart
w.set_ue(true);
// enable transceiver
w.set_te(enable_tx);
// enable receiver
w.set_re(enable_rx);
// configure word size
w.set_m0(if config.parity != Parity::ParityNone {
vals::M0::BIT9
} else {
vals::M0::BIT8
});
// configure parity
w.set_pce(config.parity != Parity::ParityNone);
w.set_ps(match config.parity {
Parity::ParityOdd => vals::Ps::ODD,
Parity::ParityEven => vals::Ps::EVEN,
_ => vals::Ps::EVEN,
});
});
} }
} }