nrf/uarte: use Peripheral, wait for stop on drop.
This commit is contained in:
Dario Nieuwenhuis
parent
0e8bb5dc0b
commit
7a41541ab2
1 changed files with 101 additions and 138 deletions
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@ -3,10 +3,11 @@
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use core::future::Future;
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use core::marker::PhantomData;
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use core::pin::Pin;
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use core::sync::atomic::{compiler_fence, Ordering};
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use core::sync::atomic::{compiler_fence, AtomicBool, Ordering};
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use core::task::Poll;
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use embassy::traits::uart::{Error, Read, Write};
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use embassy::util::{wake_on_interrupt, OnDrop, PeripheralBorrow};
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use embassy::util::{AtomicWaker, OnDrop, PeripheralBorrow};
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use embassy_extras::peripheral_shared::{Peripheral, PeripheralState};
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use embassy_extras::unborrow;
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use futures::future::poll_fn;
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@ -37,10 +38,18 @@ impl Default for Config {
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}
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}
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struct State<T: Instance> {
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peri: T,
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did_stoprx: AtomicBool,
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did_stoptx: AtomicBool,
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endrx_waker: AtomicWaker,
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endtx_waker: AtomicWaker,
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}
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/// Interface to the UARTE peripheral
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pub struct Uarte<'d, T: Instance> {
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peri: T,
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irq: T::Interrupt,
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inner: Peripheral<State<T>>,
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phantom: PhantomData<&'d mut T>,
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}
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@ -90,23 +99,85 @@ impl<'d, T: Instance> Uarte<'d, T> {
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r.baudrate.write(|w| w.baudrate().variant(config.baudrate));
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r.config.write(|w| w.parity().variant(config.parity));
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// Disable all interrupts
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r.intenclr.write(|w| unsafe { w.bits(0xFFFF_FFFF) });
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// Enable
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r.enable.write(|w| w.enable().enabled());
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Self {
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peri: uarte,
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irq,
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inner: Peripheral::new(
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irq,
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State {
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did_stoprx: AtomicBool::new(false),
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did_stoptx: AtomicBool::new(false),
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peri: uarte,
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endrx_waker: AtomicWaker::new(),
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endtx_waker: AtomicWaker::new(),
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},
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),
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phantom: PhantomData,
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}
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}
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fn inner(self: Pin<&mut Self>) -> Pin<&mut Peripheral<State<T>>> {
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unsafe { Pin::new_unchecked(&mut self.get_unchecked_mut().inner) }
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}
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}
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impl<T: Instance> PeripheralState for State<T> {
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type Interrupt = T::Interrupt;
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fn on_interrupt(&self) {
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info!("irq");
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let r = self.peri.regs();
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if r.events_endrx.read().bits() != 0 {
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self.endrx_waker.wake();
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r.intenclr.write(|w| w.endrx().clear());
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}
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if r.events_endtx.read().bits() != 0 {
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self.endtx_waker.wake();
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r.intenclr.write(|w| w.endtx().clear());
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}
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if r.events_rxto.read().bits() != 0 {
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r.intenclr.write(|w| w.rxto().clear());
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}
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if r.events_txstopped.read().bits() != 0 {
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r.intenclr.write(|w| w.txstopped().clear());
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}
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}
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}
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impl<'d, T: Instance> Drop for Uarte<'d, T> {
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impl<'a, T: Instance> Drop for Uarte<'a, T> {
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fn drop(&mut self) {
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let r = self.peri.regs();
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info!("uarte drop");
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let s = unsafe { Pin::new_unchecked(&mut self.inner) }.state();
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let r = s.peri.regs();
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let did_stoprx = s.did_stoprx.load(Ordering::Relaxed);
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let did_stoptx = s.did_stoptx.load(Ordering::Relaxed);
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info!("did_stoprx {} did_stoptx {}", did_stoprx, did_stoptx);
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// Wait for rxto or txstopped, if needed.
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r.intenset.write(|w| w.rxto().set().txstopped().set());
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while (did_stoprx && r.events_rxto.read().bits() == 0)
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|| (did_stoptx && r.events_txstopped.read().bits() == 0)
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{
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info!("uarte drop: wfe");
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cortex_m::asm::wfe();
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}
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cortex_m::asm::sev();
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// Finally we can disable!
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r.enable.write(|w| w.enable().disabled());
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// todo disable pins
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info!("uarte drop: done");
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// TODO: disable pins
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}
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}
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@ -114,25 +185,29 @@ impl<'d, T: Instance> Read for Uarte<'d, T> {
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#[rustfmt::skip]
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type ReadFuture<'a> where Self: 'a = impl Future<Output = Result<(), Error>> + 'a;
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fn read<'a>(self: Pin<&'a mut Self>, rx_buffer: &'a mut [u8]) -> Self::ReadFuture<'a> {
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async move {
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let this = unsafe { self.get_unchecked_mut() };
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fn read<'a>(mut self: Pin<&'a mut Self>, rx_buffer: &'a mut [u8]) -> Self::ReadFuture<'a> {
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self.as_mut().inner().register_interrupt();
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async move {
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let ptr = rx_buffer.as_ptr();
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let len = rx_buffer.len();
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assert!(len <= EASY_DMA_SIZE);
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let r = this.peri.regs();
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let s = self.inner().state();
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let r = s.peri.regs();
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let did_stoprx = &s.did_stoprx;
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let drop = OnDrop::new(move || {
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info!("read drop: stopping");
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r.intenclr.write(|w| w.endrx().clear());
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r.events_rxto.reset();
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r.tasks_stoprx.write(|w| unsafe { w.bits(1) });
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// TX is stopped almost instantly, spinning is fine.
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while r.events_endrx.read().bits() == 0 {}
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info!("read drop: stopped");
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did_stoprx.store(true, Ordering::Relaxed);
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});
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r.rxd.ptr.write(|w| unsafe { w.ptr().bits(ptr as u32) });
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@ -146,21 +221,17 @@ impl<'d, T: Instance> Read for Uarte<'d, T> {
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trace!("startrx");
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r.tasks_startrx.write(|w| unsafe { w.bits(1) });
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let irq = &mut this.irq;
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poll_fn(|cx| {
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s.endrx_waker.register(cx.waker());
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if r.events_endrx.read().bits() != 0 {
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r.events_endrx.reset();
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return Poll::Ready(());
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}
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wake_on_interrupt(irq, cx.waker());
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Poll::Pending
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})
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.await;
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compiler_fence(Ordering::SeqCst);
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r.intenclr.write(|w| w.endrx().clear());
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s.did_stoprx.store(false, Ordering::Relaxed);
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drop.defuse();
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Ok(())
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@ -172,26 +243,30 @@ impl<'d, T: Instance> Write for Uarte<'d, T> {
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#[rustfmt::skip]
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type WriteFuture<'a> where Self: 'a = impl Future<Output = Result<(), Error>> + 'a;
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fn write<'a>(self: Pin<&'a mut Self>, tx_buffer: &'a [u8]) -> Self::WriteFuture<'a> {
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async move {
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let this = unsafe { self.get_unchecked_mut() };
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fn write<'a>(mut self: Pin<&'a mut Self>, tx_buffer: &'a [u8]) -> Self::WriteFuture<'a> {
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self.as_mut().inner().register_interrupt();
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async move {
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let ptr = tx_buffer.as_ptr();
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let len = tx_buffer.len();
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assert!(len <= EASY_DMA_SIZE);
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// TODO: panic if buffer is not in SRAM
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let r = this.peri.regs();
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let s = self.inner().state();
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let r = s.peri.regs();
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let did_stoptx = &s.did_stoptx;
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let drop = OnDrop::new(move || {
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info!("write drop: stopping");
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r.intenclr.write(|w| w.endtx().clear());
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r.events_txstopped.reset();
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r.tasks_stoptx.write(|w| unsafe { w.bits(1) });
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// TX is stopped almost instantly, spinning is fine.
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while r.events_endtx.read().bits() == 0 {}
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info!("write drop: stopped");
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did_stoptx.store(true, Ordering::Relaxed);
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});
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r.txd.ptr.write(|w| unsafe { w.ptr().bits(ptr as u32) });
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@ -205,21 +280,17 @@ impl<'d, T: Instance> Write for Uarte<'d, T> {
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trace!("starttx");
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r.tasks_starttx.write(|w| unsafe { w.bits(1) });
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let irq = &mut this.irq;
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poll_fn(|cx| {
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s.endtx_waker.register(cx.waker());
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if r.events_endtx.read().bits() != 0 {
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r.events_endtx.reset();
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return Poll::Ready(());
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}
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wake_on_interrupt(irq, cx.waker());
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Poll::Pending
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})
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.await;
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compiler_fence(Ordering::SeqCst);
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r.intenclr.write(|w| w.endtx().clear());
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s.did_stoptx.store(false, Ordering::Relaxed);
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drop.defuse();
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Ok(())
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@ -227,114 +298,6 @@ impl<'d, T: Instance> Write for Uarte<'d, T> {
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}
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}
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/*
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/// Future for the [`Uarte::send()`] method.
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pub struct SendFuture<'a, T>
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where
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T: Instance,
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{
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uarte: &'a mut Uarte<T>,
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buf: &'a [u8],
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}
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impl<'a, T> Drop for SendFuture<'a, T>
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where
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T: Instance,
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{
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fn drop(self: &mut Self) {
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if self.uarte.tx_started() {
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trace!("stoptx");
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// Stop the transmitter to minimize the current consumption.
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self.uarte.peri.events_txstarted.reset();
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self.uarte.peri.tasks_stoptx.write(|w| unsafe { w.bits(1) });
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// TX is stopped almost instantly, spinning is fine.
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while !T::state().tx_done.signaled() {}
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}
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}
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}
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/// Future for the [`Uarte::receive()`] method.
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pub struct ReceiveFuture<'a, T>
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where
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T: Instance,
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{
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uarte: &'a mut Uarte<T>,
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buf: &'a mut [u8],
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}
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impl<'a, T> Drop for ReceiveFuture<'a, T>
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where
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T: Instance,
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{
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fn drop(self: &mut Self) {
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if self.uarte.rx_started() {
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trace!("stoprx (drop)");
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self.uarte.peri.events_rxstarted.reset();
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self.uarte.peri.tasks_stoprx.write(|w| unsafe { w.bits(1) });
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embassy_extras::low_power_wait_until(|| T::state().rx_done.signaled())
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}
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}
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}
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impl<'a, T> Future for ReceiveFuture<'a, T>
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where
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T: Instance,
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{
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type Output = Result<(), embassy::traits::uart::Error>;
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fn poll(self: core::pin::Pin<&mut Self>, cx: &mut Context<'_>) -> Poll<Self::Output> {
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let Self { uarte, buf } = unsafe { self.get_unchecked_mut() };
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match T::state().rx_done.poll_wait(cx) {
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Poll::Pending if !uarte.rx_started() => {
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let ptr = buf.as_ptr();
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let len = buf.len();
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assert!(len <= EASY_DMA_SIZE);
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uarte.enable();
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compiler_fence(Ordering::SeqCst);
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r.rxd.ptr.write(|w| unsafe { w.ptr().bits(ptr as u32) });
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r.rxd.maxcnt.write(|w| unsafe { w.maxcnt().bits(len as _) });
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trace!("startrx");
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uarte.peri.tasks_startrx.write(|w| unsafe { w.bits(1) });
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while !uarte.rx_started() {} // Make sure reception has started
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Poll::Pending
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}
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Poll::Pending => Poll::Pending,
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Poll::Ready(_) => Poll::Ready(Ok(())),
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}
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}
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}
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/// Future for the [`receive()`] method.
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impl<'a, T> ReceiveFuture<'a, T>
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where
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T: Instance,
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{
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/// Stops the ongoing reception and returns the number of bytes received.
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pub async fn stop(self) -> usize {
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let len = if self.uarte.rx_started() {
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trace!("stoprx (stop)");
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self.uarte.peri.events_rxstarted.reset();
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self.uarte.peri.tasks_stoprx.write(|w| unsafe { w.bits(1) });
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T::state().rx_done.wait().await
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} else {
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// Transfer was stopped before it even started. No bytes were sent.
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0
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};
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len as _
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}
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}
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*/
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mod sealed {
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use super::*;
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